From: uros Date: Mon, 14 Mar 2011 18:57:11 +0000 (+0000) Subject: * config/i386/i386.md (ROUND_FLOOR): New constant. X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=commitdiff_plain;h=475f05b7d9b813884ecab35dbd691cc3ee19c1c2 * config/i386/i386.md (ROUND_FLOOR): New constant. (ROUND_CEIL): Ditto. (ROUND_TRUNC): Ditto. (ROUND_MXCSR): Ditto. (ROUND_NO_EXC): Ditto. (rint2): Use new defines instead of numerical constants. (floor2): Ditto. (ceil2): Ditto. (btrunc2): Ditto. * config/i386/i386-builtin-types.def: Define ROUND function type aliases. * config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_{FLOOR,CEIL,TRUNC,RINT}{PS,PD}{,256} defines. (struct builtin_description): Add __builtin_ia32_{floor,ceil,trunc,rint}{pd,ps}{,256} descriptions. (ix86_expand_sse_round): New static function. (ix86_expand_args_builtin): Call ix86_expand_sse_round for ROUND function types. (ix86_builtin_vectorized_function): Handle BUILT_IN_{FLOOR,CEIL,TRUNC,RINT}{,F} builtins. testsuite/ChangeLog: * gcc.target/i386/sse4_1-floor-vec.c: New test. * gcc.target/i386/sse4_1-ceil-vec.c: Ditto. * gcc.target/i386/sse4_1-trunc-vec.c: Ditto. * gcc-target/i386/sse4_1-rint-vec.c: Ditto. * gcc.target/i386/sse4_1-floorf-vec.c: Ditto. * gcc.target/i386/sse4_1-ceilf-vec.c: Ditto. * gcc.target/i386/sse4_1-truncf-vec.c: Ditto. * gcc.target/i386/sse4_1-rintf-vec.c: Ditto. * gcc.target/i386/avx-floor-vec.c: Ditto. * gcc.target/i386/avx-ceil-vec.c: Ditto. * gcc.target/i386/avx-trunc-vec.c: Ditto. * gcc.target/i386/avx-rint-vec.c: Ditto. * gcc.target/i386/avx-floorf-vec.c: Ditto. * gcc.target/i386/avx-ceilf-vec.c: Ditto. * gcc.target/i386/avx-truncf-vec.c: Ditto. * gcc.target/i386/avx-rintf-vec.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@170953 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 07aa11916bb..9a4f888359a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,26 @@ +2011-03-14 Uros Bizjak + + * config/i386/i386.md (ROUND_FLOOR): New constant. + (ROUND_CEIL): Ditto. + (ROUND_TRUNC): Ditto. + (ROUND_MXCSR): Ditto. + (ROUND_NO_EXC): Ditto. + (rint2): Use new defines instead of numerical constants. + (floor2): Ditto. + (ceil2): Ditto. + (btrunc2): Ditto. + * config/i386/i386-builtin-types.def: Define ROUND function type + aliases. + * config/i386/i386.c (enum ix86_builtins): Add + IX86_BUILTIN_{FLOOR,CEIL,TRUNC,RINT}{PS,PD}{,256} defines. + (struct builtin_description): Add + __builtin_ia32_{floor,ceil,trunc,rint}{pd,ps}{,256} descriptions. + (ix86_expand_sse_round): New static function. + (ix86_expand_args_builtin): Call ix86_expand_sse_round for ROUND + function types. + (ix86_builtin_vectorized_function): Handle + BUILT_IN_{FLOOR,CEIL,TRUNC,RINT}{,F} builtins. + 2011-03-14 Tom Tromey * c-parser.c (c_parser_asm_string_literal): Clear @@ -22,8 +45,7 @@ 2011-03-14 Jakub Jelinek PR bootstrap/48102 - * graphite-cloog-compat.h (build_cloog_prog): Remove STATE - parameter. + * graphite-cloog-compat.h (build_cloog_prog): Remove STATE parameter. 2011-03-14 Andreas Tobler @@ -321,7 +343,8 @@ PR lto/47497 * lto-symtab.c (lto_cgraph_replace_node): Do not set thunk.alias. (lto_symtab_merge_cgraph_nodes_1): Update thunk.alias pointers here. - * cgraph.h (cgraph_same_body_alias, cgraph_add_thunk): Add node pointers. + * cgraph.h (cgraph_same_body_alias, cgraph_add_thunk): + Add node pointers. * cgraph.c (cgraph_same_body_alias_1, cgraph_same_body_alias, cgraph_add_thunk): Add node pointers. * lto-cgraph.c (lto_output_node): Verify that thunks&aliases are @@ -332,8 +355,8 @@ 2011-03-04 Changpeng Fang * config/i386/i386.opt (mprefer-avx128): New flag. - * config/i386/i386.c (ix86_preferred_simd_mode): Prefer 128-bit mode - when the flag -mprefer-avx128 is on. + * config/i386/i386.c (ix86_preferred_simd_mode): Prefer 128-bit AVX + modes when the flag -mprefer-avx128 is on. 2011-03-04 Richard Sandiford diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def index 05a7f546803..d4b3e824db2 100644 --- a/gcc/config/i386/i386-builtin-types.def +++ b/gcc/config/i386/i386-builtin-types.def @@ -377,6 +377,11 @@ DEF_FUNCTION_TYPE (V16QI, V16QI, INT, V16QI, INT, INT) DEF_FUNCTION_TYPE (V8QI, QI, QI, QI, QI, QI, QI, QI, QI) +DEF_FUNCTION_TYPE_ALIAS (V2DF_FTYPE_V2DF, ROUND) +DEF_FUNCTION_TYPE_ALIAS (V4DF_FTYPE_V4DF, ROUND) +DEF_FUNCTION_TYPE_ALIAS (V4SF_FTYPE_V4SF, ROUND) +DEF_FUNCTION_TYPE_ALIAS (V8SF_FTYPE_V8SF, ROUND) + DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DF_V2DF, PTEST) DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DI_V2DI, PTEST) DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V4DF_V4DF, PTEST) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 82d999beb92..9673524b33c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -23916,6 +23916,15 @@ enum ix86_builtins IX86_BUILTIN_ROUNDSD, IX86_BUILTIN_ROUNDSS, + IX86_BUILTIN_FLOORPD, + IX86_BUILTIN_CEILPD, + IX86_BUILTIN_TRUNCPD, + IX86_BUILTIN_RINTPD, + IX86_BUILTIN_FLOORPS, + IX86_BUILTIN_CEILPS, + IX86_BUILTIN_TRUNCPS, + IX86_BUILTIN_RINTPS, + IX86_BUILTIN_PTESTZ, IX86_BUILTIN_PTESTC, IX86_BUILTIN_PTESTNZC, @@ -24083,6 +24092,15 @@ enum ix86_builtins IX86_BUILTIN_ROUNDPD256, IX86_BUILTIN_ROUNDPS256, + IX86_BUILTIN_FLOORPD256, + IX86_BUILTIN_CEILPD256, + IX86_BUILTIN_TRUNCPD256, + IX86_BUILTIN_RINTPD256, + IX86_BUILTIN_FLOORPS256, + IX86_BUILTIN_CEILPS256, + IX86_BUILTIN_TRUNCPS256, + IX86_BUILTIN_RINTPS256, + IX86_BUILTIN_UNPCKHPD256, IX86_BUILTIN_UNPCKLPD256, IX86_BUILTIN_UNPCKHPS256, @@ -25105,6 +25123,16 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundsd, "__builtin_ia32_roundsd", IX86_BUILTIN_ROUNDSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT }, { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundss, "__builtin_ia32_roundss", IX86_BUILTIN_ROUNDSS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_floorpd", IX86_BUILTIN_FLOORPD, (enum rtx_code) ROUND_FLOOR, (int) V2DF_FTYPE_V2DF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_ceilpd", IX86_BUILTIN_CEILPD, (enum rtx_code) ROUND_CEIL, (int) V2DF_FTYPE_V2DF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_truncpd", IX86_BUILTIN_TRUNCPD, (enum rtx_code) ROUND_TRUNC, (int) V2DF_FTYPE_V2DF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundpd, "__builtin_ia32_rintpd", IX86_BUILTIN_RINTPD, (enum rtx_code) ROUND_MXCSR, (int) V2DF_FTYPE_V2DF_ROUND }, + + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundps, "__builtin_ia32_floorps", IX86_BUILTIN_FLOORPS, (enum rtx_code) ROUND_FLOOR, (int) V4SF_FTYPE_V4SF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundps, "__builtin_ia32_ceilps", IX86_BUILTIN_CEILPS, (enum rtx_code) ROUND_CEIL, (int) V4SF_FTYPE_V4SF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundps, "__builtin_ia32_truncps", IX86_BUILTIN_TRUNCPS, (enum rtx_code) ROUND_TRUNC, (int) V4SF_FTYPE_V4SF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_roundps, "__builtin_ia32_rintps", IX86_BUILTIN_RINTPS, (enum rtx_code) ROUND_MXCSR, (int) V4SF_FTYPE_V4SF_ROUND }, + { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_ptest, "__builtin_ia32_ptestz128", IX86_BUILTIN_PTESTZ, EQ, (int) INT_FTYPE_V2DI_V2DI_PTEST }, { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_ptest, "__builtin_ia32_ptestc128", IX86_BUILTIN_PTESTC, LTU, (int) INT_FTYPE_V2DI_V2DI_PTEST }, { OPTION_MASK_ISA_ROUND, CODE_FOR_sse4_1_ptest, "__builtin_ia32_ptestnzc128", IX86_BUILTIN_PTESTNZC, GTU, (int) INT_FTYPE_V2DI_V2DI_PTEST }, @@ -25217,6 +25245,16 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundpd256, "__builtin_ia32_roundpd256", IX86_BUILTIN_ROUNDPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_INT }, { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundps256, "__builtin_ia32_roundps256", IX86_BUILTIN_ROUNDPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_INT }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundpd256, "__builtin_ia32_floorpd256", IX86_BUILTIN_FLOORPD256, (enum rtx_code) ROUND_FLOOR, (int) V4DF_FTYPE_V4DF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundpd256, "__builtin_ia32_ceilpd256", IX86_BUILTIN_CEILPD256, (enum rtx_code) ROUND_CEIL, (int) V4DF_FTYPE_V4DF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundpd256, "__builtin_ia32_truncpd256", IX86_BUILTIN_TRUNCPD256, (enum rtx_code) ROUND_TRUNC, (int) V4DF_FTYPE_V4DF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundpd256, "__builtin_ia32_rintpd256", IX86_BUILTIN_RINTPD256, (enum rtx_code) ROUND_MXCSR, (int) V4DF_FTYPE_V4DF_ROUND }, + + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundps256, "__builtin_ia32_floorps256", IX86_BUILTIN_FLOORPS256, (enum rtx_code) ROUND_FLOOR, (int) V8SF_FTYPE_V8SF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundps256, "__builtin_ia32_ceilps256", IX86_BUILTIN_CEILPS256, (enum rtx_code) ROUND_CEIL, (int) V8SF_FTYPE_V8SF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundps256, "__builtin_ia32_truncps256", IX86_BUILTIN_TRUNCPS256, (enum rtx_code) ROUND_TRUNC, (int) V8SF_FTYPE_V8SF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_roundps256, "__builtin_ia32_rintps256", IX86_BUILTIN_RINTPS256, (enum rtx_code) ROUND_MXCSR, (int) V8SF_FTYPE_V8SF_ROUND }, + { OPTION_MASK_ISA_AVX, CODE_FOR_avx_unpckhpd256, "__builtin_ia32_unpckhpd256", IX86_BUILTIN_UNPCKHPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF }, { OPTION_MASK_ISA_AVX, CODE_FOR_avx_unpcklpd256, "__builtin_ia32_unpcklpd256", IX86_BUILTIN_UNPCKLPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF }, { OPTION_MASK_ISA_AVX, CODE_FOR_avx_unpckhps256, "__builtin_ia32_unpckhps256", IX86_BUILTIN_UNPCKHPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF }, @@ -26216,6 +26254,39 @@ ix86_expand_sse_comi (const struct builtin_description *d, tree exp, return SUBREG_REG (target); } +/* Subroutine of ix86_expand_args_builtin to take care of round insns. */ + +static rtx +ix86_expand_sse_round (const struct builtin_description *d, tree exp, + rtx target) +{ + rtx pat; + tree arg0 = CALL_EXPR_ARG (exp, 0); + rtx op1, op0 = expand_normal (arg0); + enum machine_mode tmode = insn_data[d->icode].operand[0].mode; + enum machine_mode mode0 = insn_data[d->icode].operand[1].mode; + + if (optimize || target == 0 + || GET_MODE (target) != tmode + || !insn_data[d->icode].operand[0].predicate (target, tmode)) + target = gen_reg_rtx (tmode); + + if (VECTOR_MODE_P (mode0)) + op0 = safe_vector_operand (op0, mode0); + + if ((optimize && !register_operand (op0, mode0)) + || !insn_data[d->icode].operand[0].predicate (op0, mode0)) + op0 = copy_to_mode_reg (mode0, op0); + + op1 = GEN_INT (d->comparison); + + pat = GEN_FCN (d->icode) (target, op0, op1); + if (! pat) + return 0; + emit_insn (pat); + return target; +} + /* Subroutine of ix86_expand_builtin to take care of ptest insns. */ static rtx @@ -26485,6 +26556,11 @@ ix86_expand_args_builtin (const struct builtin_description *d, switch ((enum ix86_builtin_func_type) d->flag) { + case V2DF_FTYPE_V2DF_ROUND: + case V4DF_FTYPE_V4DF_ROUND: + case V4SF_FTYPE_V4SF_ROUND: + case V8SF_FTYPE_V8SF_ROUND: + return ix86_expand_sse_round (d, exp, target); case INT_FTYPE_V8SF_V8SF_PTEST: case INT_FTYPE_V4DI_V4DI_PTEST: case INT_FTYPE_V4DF_V4DF_PTEST: @@ -27581,6 +27657,118 @@ ix86_builtin_vectorized_function (tree fndecl, tree type_out, } break; + case BUILT_IN_FLOOR: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == DFmode && in_mode == DFmode) + { + if (out_n == 2 && in_n == 2) + return ix86_builtins[IX86_BUILTIN_FLOORPD]; + else if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_FLOORPD256]; + } + break; + + case BUILT_IN_FLOORF: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == SFmode && in_mode == SFmode) + { + if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_FLOORPS]; + else if (out_n == 8 && in_n == 8) + return ix86_builtins[IX86_BUILTIN_FLOORPS256]; + } + break; + + case BUILT_IN_CEIL: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == DFmode && in_mode == DFmode) + { + if (out_n == 2 && in_n == 2) + return ix86_builtins[IX86_BUILTIN_CEILPD]; + else if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_CEILPD256]; + } + break; + + case BUILT_IN_CEILF: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == SFmode && in_mode == SFmode) + { + if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_CEILPS]; + else if (out_n == 8 && in_n == 8) + return ix86_builtins[IX86_BUILTIN_CEILPS256]; + } + break; + + case BUILT_IN_TRUNC: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == DFmode && in_mode == DFmode) + { + if (out_n == 2 && in_n == 2) + return ix86_builtins[IX86_BUILTIN_TRUNCPD]; + else if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_TRUNCPD256]; + } + break; + + case BUILT_IN_TRUNCF: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == SFmode && in_mode == SFmode) + { + if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_TRUNCPS]; + else if (out_n == 8 && in_n == 8) + return ix86_builtins[IX86_BUILTIN_TRUNCPS256]; + } + break; + + case BUILT_IN_RINT: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == DFmode && in_mode == DFmode) + { + if (out_n == 2 && in_n == 2) + return ix86_builtins[IX86_BUILTIN_RINTPD]; + else if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_RINTPD256]; + } + break; + + case BUILT_IN_RINTF: + /* The round insn does not trap on denormals. */ + if (flag_trapping_math) + break; + + if (out_mode == SFmode && in_mode == SFmode) + { + if (out_n == 4 && in_n == 4) + return ix86_builtins[IX86_BUILTIN_RINTPS]; + else if (out_n == 8 && in_n == 8) + return ix86_builtins[IX86_BUILTIN_RINTPS256]; + } + break; + case BUILT_IN_FMA: if (out_mode == DFmode && in_mode == DFmode) { diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a17ab7aceee..12470eae14e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -272,6 +272,15 @@ UNSPECV_SPLIT_STACK_RETURN ]) +;; Constants to represent rounding modes in the ROUND instruction +(define_constants + [(ROUND_FLOOR 0x1) + (ROUND_CEIL 0x2) + (ROUND_TRUNC 0x3) + (ROUND_MXCSR 0x4) + (ROUND_NO_EXC 0x8) + ]) + ;; Constants to represent pcomtrue/pcomfalse variants (define_constants [(PCOM_FALSE 0) @@ -14573,7 +14582,7 @@ FAIL; if (TARGET_ROUND) emit_insn (gen_sse4_1_round2 - (operands[0], operands[1], GEN_INT (0x04))); + (operands[0], operands[1], GEN_INT (ROUND_MXCSR))); else ix86_expand_rint (operand0, operand1); } @@ -14819,7 +14828,7 @@ FAIL; if (TARGET_ROUND) emit_insn (gen_sse4_1_round2 - (operands[0], operands[1], GEN_INT (0x01))); + (operands[0], operands[1], GEN_INT (ROUND_FLOOR))); else if (TARGET_64BIT || (mode != DFmode)) ix86_expand_floorceil (operand0, operand1, true); else @@ -15074,7 +15083,7 @@ { if (TARGET_ROUND) emit_insn (gen_sse4_1_round2 - (operands[0], operands[1], GEN_INT (0x02))); + (operands[0], operands[1], GEN_INT (ROUND_CEIL))); else if (optimize_insn_for_size_p ()) FAIL; else if (TARGET_64BIT || (mode != DFmode)) @@ -15329,7 +15338,7 @@ { if (TARGET_ROUND) emit_insn (gen_sse4_1_round2 - (operands[0], operands[1], GEN_INT (0x03))); + (operands[0], operands[1], GEN_INT (ROUND_TRUNC))); else if (optimize_insn_for_size_p ()) FAIL; else if (TARGET_64BIT || (mode != DFmode)) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index be3157c2227..1206685e859 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,22 @@ +2011-03-14 Uros Bizjak + + * gcc.target/i386/sse4_1-floor-vec.c: New test. + * gcc.target/i386/sse4_1-ceil-vec.c: Ditto. + * gcc.target/i386/sse4_1-trunc-vec.c: Ditto. + * gcc-target/i386/sse4_1-rint-vec.c: Ditto. + * gcc.target/i386/sse4_1-floorf-vec.c: Ditto. + * gcc.target/i386/sse4_1-ceilf-vec.c: Ditto. + * gcc.target/i386/sse4_1-truncf-vec.c: Ditto. + * gcc.target/i386/sse4_1-rintf-vec.c: Ditto. + * gcc.target/i386/avx-floor-vec.c: Ditto. + * gcc.target/i386/avx-ceil-vec.c: Ditto. + * gcc.target/i386/avx-trunc-vec.c: Ditto. + * gcc.target/i386/avx-rint-vec.c: Ditto. + * gcc.target/i386/avx-floorf-vec.c: Ditto. + * gcc.target/i386/avx-ceilf-vec.c: Ditto. + * gcc.target/i386/avx-truncf-vec.c: Ditto. + * gcc.target/i386/avx-rintf-vec.c: Ditto. + 2011-03-14 Tom Tromey * gcc.dg/Woverlength-strings-pedantic-c90-asm.c: New file. @@ -27,8 +46,8 @@ 2011-03-12 Peter Bergner PR target/48053 - * gcc/testsuite/gcc.target/powerpc/pr48053-1.c: New test. - * gcc/testsuite/gcc.target/powerpc/pr48053-2.c: Likewise. + * gcc.target/powerpc/pr48053-1.c: New test. + * gcc.target/powerpc/pr48053-2.c: Likewise. 2011-03-12 Thomas Koenig diff --git a/gcc/testsuite/gcc.target/i386/avx-ceil-vec.c b/gcc/testsuite/gcc.target/i386/avx-ceil-vec.c new file mode 100644 index 00000000000..e917e31b4ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ceil-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern double ceil (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceil (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceil (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-ceilf-vec.c b/gcc/testsuite/gcc.target/i386/avx-ceilf-vec.c new file mode 100644 index 00000000000..ef316214d8a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-ceilf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern float ceilf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceilf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceilf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-floor-vec.c b/gcc/testsuite/gcc.target/i386/avx-floor-vec.c new file mode 100644 index 00000000000..55f8f14c090 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-floor-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern double floor (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floor (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floor (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-floorf-vec.c b/gcc/testsuite/gcc.target/i386/avx-floorf-vec.c new file mode 100644 index 00000000000..00348114c8c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-floorf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern float floorf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floorf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floorf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-rint-vec.c b/gcc/testsuite/gcc.target/i386/avx-rint-vec.c new file mode 100644 index 00000000000..dc8c61017c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-rint-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern double rint (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = rint (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != rint (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-rintf-vec.c b/gcc/testsuite/gcc.target/i386/avx-rintf-vec.c new file mode 100644 index 00000000000..4d77bf25b29 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-rintf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern float rintf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = rintf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != rintf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-trunc-vec.c b/gcc/testsuite/gcc.target/i386/avx-trunc-vec.c new file mode 100644 index 00000000000..0b37eb4e04a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-trunc-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern double trunc (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = trunc (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != trunc (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx-truncf-vec.c b/gcc/testsuite/gcc.target/i386/avx-truncf-vec.c new file mode 100644 index 00000000000..099ff824624 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-truncf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx" } */ +/* { dg-require-effective-target avx } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "avx-check.h" + +#include + +extern float truncf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = truncf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != truncf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ceil-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-ceil-vec.c new file mode 100644 index 00000000000..886dd77c206 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ceil-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern double ceil (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceil (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceil (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-ceilf-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-ceilf-vec.c new file mode 100644 index 00000000000..41d59d74eac --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-ceilf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern float ceilf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceilf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceilf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-floor-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-floor-vec.c new file mode 100644 index 00000000000..02ebe62ec7b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-floor-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern double floor (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floor (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floor (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-floorf-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-floorf-vec.c new file mode 100644 index 00000000000..6704892df53 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-floorf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern float floorf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floorf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floorf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-rint-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-rint-vec.c new file mode 100644 index 00000000000..8df5717a23d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-rint-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern double rint (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = rint (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != rint (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-rintf-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-rintf-vec.c new file mode 100644 index 00000000000..9c97c35bed9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-rintf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern float rintf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = rintf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != rintf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-trunc-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-trunc-vec.c new file mode 100644 index 00000000000..e82dec93f88 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-trunc-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern double trunc (double); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = trunc (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != trunc (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-truncf-vec.c b/gcc/testsuite/gcc.target/i386/sse4_1-truncf-vec.c new file mode 100644 index 00000000000..6a267ca94d6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse4_1-truncf-vec.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse4.1" } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#include "sse4_1-check.h" + +#include + +extern float truncf (float); + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +sse4_1_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = truncf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != truncf (a[i])) + abort(); +}