From: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Mon, 10 Mar 2008 13:33:07 +0000 (+0000)
Subject: 	* ChangeLog: Remove merge marker.
X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=commitdiff_plain;h=2f6e3388029b5bcef82a24c7c315867468e29ffa

	* ChangeLog: Remove merge marker.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@133077 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6e5619f9d9b..052d6169dc5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -21,7 +21,7 @@
 2008-03-09  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/35496
-	* config/i386/i386.c (ix86_constant_algnment): Compute alignment using
+	* config/i386/i386.c (ix86_constant_alignment): Compute alignment using
 	ALIGN_MODE_128 for VECTOR_CST and INTEGER_CST in addition to REAL_CST.
 
 2008-03-09  Ira Rosen  <irar@il.ibm.com>
@@ -416,7 +416,6 @@
 	transformations for modes that have signed zeros.
 	* ifcvt.c (noce_try_abs): Ditto.
 
->>>>>>> .r132956
 2008-03-04  Joseph Myers  <joseph@codesourcery.com>
 
 	* config/i386/i386.c (override_options): Force
@@ -1772,8 +1771,7 @@
 	(OPTION_MASK_ISA_SSE5_UNSET): Likewise.
 	(OPTION_MASK_ISA_SSE4): Removed.
 	(ix86_handle_option): Turn on bits in ix86_isa_flags and
-	ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for
-	-mXXX.
+	ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for -mXXX.
 	(override_options): Don't turn on implied SSE/MMX bits in
 	ix86_isa_flags.