From: rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 8 Jul 2004 06:08:52 +0000 (+0000)
Subject:         * expmed.c (emit_store_flag): Also special-case double-word
X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=commitdiff_plain;h=2986c3244f204d919d8b058f38918de768c11140

    * expmed.c (emit_store_flag): Also special-case double-word
        (in-)equality comparison against -1.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@84268 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7e6ccaa7ab8..74463e757b7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
 2004-07-06 Jan Beulich <jbeulich@novell.com>
                                                                                 
+        * expmed.c (emit_store_flag): Also special-case double-word
+        (in-)equality comparison against -1.
+
 	* config/i386/i386.c (ix86_gimplify_va_arg): Don't need temporary for
 	passing arguments the containers for which are registers.
 
diff --git a/gcc/expmed.c b/gcc/expmed.c
index 6ee291370d0..ba3c9a6f83b 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -4602,27 +4602,29 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1,
       break;
     }
 
-  /* If we are comparing a double-word integer with zero, we can convert
-     the comparison into one involving a single word.  */
+  /* If we are comparing a double-word integer with zero or -1, we can
+     convert the comparison into one involving a single word.  */
   if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD * 2
       && GET_MODE_CLASS (mode) == MODE_INT
-      && op1 == const0_rtx
       && (!MEM_P (op0) || ! MEM_VOLATILE_P (op0)))
     {
-      if (code == EQ || code == NE)
+      if ((code == EQ || code == NE)
+	  && (op1 == const0_rtx || op1 == constm1_rtx))
 	{
 	  rtx op00, op01, op0both;
 
-	  /* Do a logical OR of the two words and compare the result.  */
+	  /* Do a logical OR or AND of the two words and compare the result.  */
 	  op00 = simplify_gen_subreg (word_mode, op0, mode, 0);
 	  op01 = simplify_gen_subreg (word_mode, op0, mode, UNITS_PER_WORD);
-	  op0both = expand_binop (word_mode, ior_optab, op00, op01,
-				  NULL_RTX, unsignedp, OPTAB_DIRECT);
+	  op0both = expand_binop (word_mode,
+				  op1 == const0_rtx ? ior_optab : and_optab,
+				  op00, op01, NULL_RTX, unsignedp, OPTAB_DIRECT);
+
 	  if (op0both != 0)
 	    return emit_store_flag (target, code, op0both, op1, word_mode,
 				    unsignedp, normalizep);
 	}
-      else if (code == LT || code == GE)
+      else if ((code == LT || code == GE) && op1 == const0_rtx)
 	{
 	  rtx op0h;