From: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Mon, 27 Aug 2007 14:14:31 +0000 (+0000)
Subject: gcc/
X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=commitdiff_plain;h=26042839c02f05e50576246506f80fdd2fae0937

gcc/

2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/31385
	* config/i386/i386.h (VALID_DFP_MODE_P): New.
	* config/i386/i386.c (ix86_hard_regno_mode_ok): Allow DFP in
	GPR.

gcc/testsuite/

2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/31385
	* gcc.dg/dfp/pr31385.c: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127833 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e88e7c95765..91d1bfa9d55 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,13 @@
+2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/31385
+	* config/i386/i386.h (VALID_DFP_MODE_P): New.
+	* config/i386/i386.c (ix86_hard_regno_mode_ok): Allow DFP in
+	GPR.
+
 2007-08-27  Sandra Loosemore  <sandra@codesourcery.com>
 	    David Ung  <davidu@mips.com>
-            Nigel Stephens <nigel@mips.com>
+	    Nigel Stephens <nigel@mips.com>
 
 	Separate target-specific initialization from general
 	back-end initialization.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 42684db4499..7fdae6c7136 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -20568,6 +20568,8 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode)
     return 1;
   else if (VALID_FP_MODE_P (mode))
     return 1;
+  else if (VALID_DFP_MODE_P (mode))
+    return 1;
   /* Lots of MMX code casts 8 byte vector modes to DImode.  If we then go
      on to use that value in smaller contexts, this can easily force a
      pseudo to be allocated to GENERAL_REGS.  Since this is no worse than
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 471e342d0da..93e24dd90fb 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1088,6 +1088,9 @@ do {									\
    place emms and femms instructions.  */
 #define UNITS_PER_SIMD_WORD (TARGET_SSE ? 16 : UNITS_PER_WORD)
 
+#define VALID_DFP_MODE_P(MODE)						\
+    ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
+
 #define VALID_FP_MODE_P(MODE)						\
     ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode		\
      || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode)	\
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d48907ce4fb..301693a76f7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/31385
+	* gcc.dg/dfp/pr31385.c: New.
+
 2007-08-27  Uros Bizjak  <ubizjak@gmail.com>
 
 	* gcc.dg/unsigned-long-compare.c: Remove target selector.
diff --git a/gcc/testsuite/gcc.dg/dfp/pr31385.c b/gcc/testsuite/gcc.dg/dfp/pr31385.c
new file mode 100644
index 00000000000..63a23c4bb75
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/dfp/pr31385.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu99 -O2" } */
+
+typedef _Decimal32 fp_t;
+
+extern fp_t g(fp_t);
+
+fp_t
+bug(fp_t x)
+{
+    fp_t result;
+    int n;
+    fp_t f, f3, y, z;
+
+    n = 0;
+    y = 1.DF;
+    f = g(x);
+
+    if (f < 0.DF)
+        f = -f;
+
+    f3 = 2.DF;
+
+    z = (y + y + f / (y * y));
+    y = (z + z) / (9.DF) + f3 / (z * z);
+
+    result = y;
+
+    return (result);
+}