* i386.h (ix86_tune_indices): Add X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL.

	(TARGET_SOFTWARE_PREFETCHING_BENEFICIAL): New macor.
	* i386.c (initial_ix86_tune_features): Add X86_SOFTARE_PREFETCHING_BENEFICIAL.
	(software_prefetching_beneficial_p): Remove predicate.
	(ix86_option_override_internal): Use new macro.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@173533 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b239163..6534bbc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2011-05-06  Jan Hubicka  <jh@suse.cz>
 
+       * i386.h (ix86_tune_indices): Add X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL.
+       (TARGET_SOFTWARE_PREFETCHING_BENEFICIAL): New macor.
+       * i386.c (initial_ix86_tune_features): Add X86_SOFTARE_PREFETCHING_BENEFICIAL.
+       (software_prefetching_beneficial_p): Remove predicate.
+       (ix86_option_override_internal): Use new macro.
+
+2011-05-06  Jan Hubicka  <jh@suse.cz>
+
        * ipa-inline.c (update_callee_keys): Don't reset node growth cache.
 
 2011-05-06  Jan Hubicka  <jh@suse.cz>

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 786bc6d..7b0afb1 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2083,6 +2083,11 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
   /* X86_TUNE_VECTORIZE_DOUBLE: Enable double precision vector
      instructions.  */
   ~m_ATOM,
+
+  /* X86_SOFTARE_PREFETCHING_BENEFICIAL: Enable software prefetching
+     at -O3.  For the moment, the prefetching seems badly tuned for Intel
+     chips.  */
+  m_K6_GEODE | m_AMD_MULTIPLE
 };
 
 /* Feature tests against the various architecture variations.  */
@@ -3257,27 +3262,6 @@ ix86_target_string (int isa, int flags, const char *arch, const char *tune,
   return ret;
 }
 
-/* Return TRUE if software prefetching is beneficial for the
-   given CPU. */
-
-static bool
-software_prefetching_beneficial_p (void)
-{
-  switch (ix86_tune)
-    {
-    case PROCESSOR_GEODE:
-    case PROCESSOR_K6:
-    case PROCESSOR_ATHLON:
-    case PROCESSOR_K8:
-    case PROCESSOR_AMDFAM10:
-    case PROCESSOR_BTVER1:
-      return true;
-
-    default:
-      return false;
-    }
-}
-
 /* Return true, if profiling code should be emitted before
    prologue. Otherwise it returns false.
    Note: For x86 with "hotfix" it is sorried.  */
@@ -4205,7 +4189,7 @@ ix86_option_override_internal (bool main_args_p)
   if (flag_prefetch_loop_arrays < 0
       && HAVE_prefetch
       && optimize >= 3
-      && software_prefetching_beneficial_p ())
+      && TARGET_SOFTWARE_PREFETCHING_BENEFICIAL)
     flag_prefetch_loop_arrays = 1;
 
   /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0)

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 5baa2b8..4137ecc 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -322,6 +322,7 @@ enum ix86_tune_indices {
   X86_TUNE_FUSE_CMP_AND_BRANCH,
   X86_TUNE_OPT_AGU,
   X86_TUNE_VECTORIZE_DOUBLE,
+  X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL,
 
   X86_TUNE_LAST
 };
@@ -418,6 +419,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
 #define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU]
 #define TARGET_VECTORIZE_DOUBLE \
        ix86_tune_features[X86_TUNE_VECTORIZE_DOUBLE]
+#define TARGET_SOFTWARE_PREFETCHING_BENEFICIAL \
+       ix86_tune_features[X86_TUNE_SOFTWARE_PREFETCHING_BENEFICIAL]
 
 /* Feature tests against the various architecture variations.  */
 enum ix86_arch_indices {