* config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove.

	(xtensa_valid_move, xtensa_preferred_reload_class): Define.
	* config/xtensa/xtensa.c (non_acc_reg_operand): Remove.
	(xtensa_valid_move, xtensa_preferred_reload_class): Define to
	prevent use of sp as a reload register.
	(xtensa_emit_move_sequence): Use xtensa_valid_move instead of
	non_acc_reg_operand.
	* config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand.
	(PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class.
	* config/xtensa/xtensa.md (movsi_internal, movhi_internal,
	movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@51201 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 984e498..1616ef6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2002-03-22  Bob Wilson  <bob.wilson@acm.org>
+
+       * config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove.
+       (xtensa_valid_move, xtensa_preferred_reload_class): Define.
+       * config/xtensa/xtensa.c (non_acc_reg_operand): Remove.
+       (xtensa_valid_move, xtensa_preferred_reload_class): Define to
+       prevent use of sp as a reload register.
+       (xtensa_emit_move_sequence): Use xtensa_valid_move instead of
+       non_acc_reg_operand.
+       * config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand.
+       (PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class.
+       * config/xtensa/xtensa.md (movsi_internal, movhi_internal,
+       movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand.
+
 2002-03-22  Neil Booth  <neil@daikokuya.demon.co.uk>
 
         * cpphash.h (struct cpp_reader): Remove mls_line and mls_col.

diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h
index bb18e3a..76cf73c 100644 (file)
--- a/gcc/config/xtensa/xtensa-protos.h
+++ b/gcc/config/xtensa/xtensa-protos.h
@@ -43,7 +43,7 @@ extern int add_operand PARAMS ((rtx, enum machine_mode));
 extern int arith_operand PARAMS ((rtx, enum machine_mode));
 extern int nonimmed_operand PARAMS ((rtx, enum machine_mode));
 extern int mem_operand PARAMS ((rtx, enum machine_mode));
-extern int non_acc_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int xtensa_valid_move PARAMS ((enum machine_mode, rtx *operands));
 extern int mask_operand PARAMS ((rtx, enum machine_mode));
 extern int extui_fldsz_operand PARAMS ((rtx, enum machine_mode));
 extern int sext_operand PARAMS ((rtx, enum machine_mode));
@@ -87,6 +87,8 @@ extern void xtensa_output_literal
   PARAMS ((FILE *, rtx, enum machine_mode, int labelno));
 extern void xtensa_reorg PARAMS ((rtx));
 extern rtx xtensa_builtin_saveregs PARAMS ((void));
+extern enum reg_class xtensa_preferred_reload_class
+  PARAMS ((rtx, enum reg_class));
 extern enum reg_class xtensa_secondary_reload_class
   PARAMS ((enum reg_class, enum machine_mode, rtx, int));
 extern int a7_overlap_mentioned_p PARAMS ((rtx x));

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index fe7e9f3..e24525b 100644 (file)
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -440,12 +440,32 @@ mem_operand (op, mode)
 
 
 int
-non_acc_reg_operand (op, mode)
-     rtx op;
+xtensa_valid_move (mode, operands)
      enum machine_mode mode;
+     rtx *operands;
 {
-  if (register_operand (op, mode))
-    return !ACC_REG_P (xt_true_regnum (op));
+  /* Either the destination or source must be a register, and the
+     MAC16 accumulator doesn't count.  */
+
+  if (register_operand (operands[0], mode))
+    {
+      int dst_regnum = xt_true_regnum (operands[0]);
+
+      /* The stack pointer can only be assigned with a MOVSP opcode. */
+      if (dst_regnum == STACK_POINTER_REGNUM)
+       return (mode == SImode
+               && register_operand (operands[1], mode)
+               && !ACC_REG_P (xt_true_regnum (operands[1])));
+
+      if (!ACC_REG_P (dst_regnum))
+       return true;
+    }
+  else if (register_operand (operands[1], mode))
+    {
+      int src_regnum = xt_true_regnum (operands[1]);
+      if (!ACC_REG_P (src_regnum))
+       return true;
+    }
   return FALSE;
 }
 
@@ -1239,8 +1259,7 @@ xtensa_emit_move_sequence (operands, mode)
 
   if (!(reload_in_progress | reload_completed))
     {
-      if (!non_acc_reg_operand (operands[0], mode)
-         && !non_acc_reg_operand (operands[1], mode))
+      if (!xtensa_valid_move (mode, operands))
        operands[1] = force_reg (mode, operands[1]);
 
       /* Check if this move is copying an incoming argument in a7.  If
@@ -2539,6 +2558,22 @@ xtensa_va_arg (valist, type)
 
 
 enum reg_class
+xtensa_preferred_reload_class (x, class)
+     rtx x;
+     enum reg_class class;
+{
+  if (CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
+    return NO_REGS;
+
+  /* Don't use sp for reloads! */
+  if (class == AR_REGS)
+    return GR_REGS;
+
+  return class;
+}
+
+
+enum reg_class
 xtensa_secondary_reload_class (class, mode, x, isoutput)
      enum reg_class class;
      enum machine_mode mode ATTRIBUTE_UNUSED;

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 0c7646b..15b57cc 100644 (file)
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -708,12 +708,8 @@ extern enum reg_class xtensa_char_to_class[256];
    : ((CODE) == 'U') ? !constantpool_mem_p (OP)                                \
    : FALSE)
 
-/* Given an rtx X being reloaded into a reg required to be
-   in class CLASS, return the class of reg to actually use.  */
 #define PREFERRED_RELOAD_CLASS(X, CLASS)                               \
-  (CONSTANT_P (X)                                                      \
-   ? (GET_CODE (X) == CONST_DOUBLE) ? NO_REGS : (CLASS)                        \
-   : (CLASS))
+  xtensa_preferred_reload_class (X, CLASS)
 
 #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS)                                \
   (CLASS)
@@ -1511,7 +1507,6 @@ typedef struct xtensa_args {
   {"add_operand",              { REG, CONST_INT, SUBREG }},            \
   {"arith_operand",            { REG, CONST_INT, SUBREG }},            \
   {"nonimmed_operand",         { REG, SUBREG, MEM }},                  \
-  {"non_acc_reg_operand",      { REG, SUBREG }},                       \
   {"mem_operand",              { MEM }},                               \
   {"mask_operand",             { REG, CONST_INT, SUBREG }},            \
   {"extui_fldsz_operand",      { CONST_INT }},                         \

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index e261b77..771edd5 100644 (file)
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -1009,8 +1009,7 @@
 (define_insn "movsi_internal"
   [(set (match_operand:SI 0 "nonimmed_operand" "=D,D,D,D,R,R,a,q,a,a,a,U,*a,*A")
        (match_operand:SI 1 "move_operand" "M,D,d,R,D,d,r,r,I,T,U,r,*A,*r"))]
-  "non_acc_reg_operand (operands[0], SImode)
-   || non_acc_reg_operand (operands[1], SImode)"
+  "xtensa_valid_move (SImode, operands)"
   "@
    movi.n\\t%0, %x1
    mov.n\\t%0, %1
@@ -1045,8 +1044,7 @@
 (define_insn "movhi_internal"
   [(set (match_operand:HI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
        (match_operand:HI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
-  "non_acc_reg_operand (operands[0], HImode)
-   || non_acc_reg_operand (operands[1], HImode)"
+  "xtensa_valid_move (HImode, operands)"
   "@
    movi.n\\t%0, %x1
    mov.n\\t%0, %1
@@ -1075,8 +1073,7 @@
 (define_insn "movqi_internal"
   [(set (match_operand:QI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
        (match_operand:QI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
-  "non_acc_reg_operand (operands[0], QImode)
-   || non_acc_reg_operand (operands[1], QImode)"
+  "xtensa_valid_move (QImode, operands)"
   "@
    movi.n\\t%0, %x1
    mov.n\\t%0, %1