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PR target/35349
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 24 Feb 2008 19:17:15 +0000 (19:17 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 24 Feb 2008 19:17:15 +0000 (19:17 +0000)
        * gcc.c-torture/execute/20050604-1.x: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@132596 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.c-torture/execute/20050604-1.x [new file with mode: 0644]

index c220dc9..fa45cfb 100644 (file)
@@ -1,5 +1,10 @@
 2008-02-24  Uros Bizjak  <ubizjak@gmail.com>
 
+       PR target/35349
+       * gcc.c-torture/execute/20050604-1.x: New file.
+
+2008-02-24  Uros Bizjak  <ubizjak@gmail.com>
+
        * gcc.target/i386/pr22076.c: Update number of mov insns
        for PIC targets.
        * gcc.target/i386/pr34256.c: Ditto.
diff --git a/gcc/testsuite/gcc.c-torture/execute/20050604-1.x b/gcc/testsuite/gcc.c-torture/execute/20050604-1.x
new file mode 100644 (file)
index 0000000..f5b4aaa
--- /dev/null
@@ -0,0 +1,9 @@
+# This testcase generates MMX instructions together with x87 instructions.
+# Currently, there is no "emms" generated to switch between register sets,
+# so the testcase fails for targets where MMX insns are enabled.
+
+if { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } {
+       set additional_flags "-mno-mmx"
+}
+
+return 0