}
/* Output code for INSN to convert a float to a signed int. OPERANDS
- are the insn operands. The output may be [SD]Imode and the input
+ are the insn operands. The output may be [HSD]Imode and the input
operand may be [SDX]Fmode. */
const char *
output_asm_insn ("mov{l}\t{%2, %0|%0, %2}", xops);
output_asm_insn ("mov{l}\t{%3, %1|%1, %3}", xops);
}
- else
+ else if (GET_MODE (operands[0]) == SImode)
output_asm_insn ("mov{l}\t{%3, %0|%0, %3}", operands);
+ else
+ output_asm_insn ("mov{w}\t{%3, %0|%0, %3}", operands);
}
return "";
(set (match_dup 0) (match_dup 3))]
"")
+;; Signed conversion to HImode.
+
+(define_expand "fix_truncxfhi2"
+ [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
+ (fix:HI (match_operand:XF 1 "register_operand" "")))
+ (clobber (match_dup 2))
+ (clobber (match_dup 3))
+ (clobber (match_scratch:SI 4 ""))])]
+ "TARGET_80387"
+ "operands[2] = assign_386_stack_local (SImode, 0);
+ operands[3] = assign_386_stack_local (HImode, 1);")
+
+(define_expand "fix_truncdfhi2"
+ [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
+ (fix:HI (match_operand:DF 1 "register_operand" "")))
+ (clobber (match_dup 2))
+ (clobber (match_dup 3))
+ (clobber (match_scratch:SI 4 ""))])]
+ "TARGET_80387"
+ "operands[2] = assign_386_stack_local (SImode, 0);
+ operands[3] = assign_386_stack_local (HImode, 1);")
+
+(define_expand "fix_truncsfhi2"
+ [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
+ (fix:HI (match_operand:SF 1 "register_operand" "")))
+ (clobber (match_dup 2))
+ (clobber (match_dup 3))
+ (clobber (match_scratch:SI 4 ""))])]
+ "TARGET_80387"
+ "operands[2] = assign_386_stack_local (SImode, 0);
+ operands[3] = assign_386_stack_local (HImode, 1);")
+
+(define_insn "*fix_trunchi_1"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=m,?r")
+ (fix:HI (match_operand 1 "register_operand" "f,f")))
+ (clobber (match_operand:SI 2 "memory_operand" "=o,o"))
+ (clobber (match_operand:HI 3 "memory_operand" "=m,m"))
+ (clobber (match_scratch:SI 4 "=&r,r"))]
+ "TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
+ "* return output_fix_trunc (insn, operands);"
+ [(set_attr "type" "multi")])
+
+(define_split
+ [(set (match_operand:HI 0 "register_operand" "")
+ (fix:HI (match_operand 1 "register_operand" "")))
+ (clobber (match_operand:SI 2 "memory_operand" ""))
+ (clobber (match_operand:HI 3 "memory_operand" ""))
+ (clobber (match_scratch:SI 4 ""))]
+ "reload_completed"
+ [(parallel [(set (match_dup 3) (fix:HI (match_dup 1)))
+ (clobber (match_dup 2))
+ (clobber (match_dup 3))
+ (clobber (match_dup 4))])
+ (set (match_dup 0) (match_dup 3))]
+ "")
+
;; %% Not used yet.
(define_insn "x86_fnstcw_1"
[(set (match_operand:HI 0 "memory_operand" "=m")