PR target/51002

	PR target/51345
	* config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__):
	Enclose parts using __SP_H__ in !defined (__AVR_HAVE_8BIT_SP__).
	Add FIXME comments.
	* config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on): Set
	insn condition to !AVR_HAVE_8BIT_SP.
	* config/avr/avr.c (output_movhi): "clr%B0" instead of "in
	%B0,__SP_H__" if AVR_HAVE_8BIT_SP.
	(avr_file_start): Only print "__SP_H__ = 0x3e" if !AVR_HAVE_8BIT_SP.
	* config/avr/avr-devices.c (avr_mcu_types): ATtiny4313 and
	AT86RF401 have a 16-bit SP (their manual is bogus).

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@181936 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 240f7ca..fdb61d0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2011-12-02  Georg-Johann Lay  <avr@gjlay.de>
+
+       PR target/51002
+       PR target/51345
+       * config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__):
+       Enclose parts using __SP_H__ in !defined (__AVR_HAVE_8BIT_SP__).
+       Add FIXME comments.
+       * config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on): Set
+       insn condition to !AVR_HAVE_8BIT_SP.
+       * config/avr/avr.c (output_movhi): "clr%B0" instead of "in
+       %B0,__SP_H__" if AVR_HAVE_8BIT_SP.
+       (avr_file_start): Only print "__SP_H__ = 0x3e" if !AVR_HAVE_8BIT_SP.
+       * config/avr/avr-devices.c (avr_mcu_types): ATtiny4313 and
+       AT86RF401 have a 16-bit SP (their manual is bogus).
+
 2011-11-25  Richard Sandiford  <richard.sandiford@linaro.org>
 
        Backport from mainline:

diff --git a/gcc/config/avr/avr-devices.c b/gcc/config/avr/avr-devices.c
index b50d6f9..b565a60 100755 (executable)
--- a/gcc/config/avr/avr-devices.c
+++ b/gcc/config/avr/avr-devices.c
@@ -70,7 +70,7 @@ const struct mcu_type_s avr_mcu_types[] = {
   { "attiny2313a",          ARCH_AVR25, "__AVR_ATtiny2313A__",      1, 0x0060, "tn2313a" },
   { "attiny24",             ARCH_AVR25, "__AVR_ATtiny24__",         1, 0x0060, "tn24" },
   { "attiny24a",            ARCH_AVR25, "__AVR_ATtiny24A__",        1, 0x0060, "tn24a" },
-  { "attiny4313",           ARCH_AVR25, "__AVR_ATtiny4313__",       1, 0x0060, "tn4313" },
+  { "attiny4313",           ARCH_AVR25, "__AVR_ATtiny4313__",       0, 0x0060, "tn4313" },
   { "attiny44",             ARCH_AVR25, "__AVR_ATtiny44__",         0, 0x0060, "tn44" },
   { "attiny44a",            ARCH_AVR25, "__AVR_ATtiny44A__",        0, 0x0060, "tn44a" },
   { "attiny84",             ARCH_AVR25, "__AVR_ATtiny84__",         0, 0x0060, "tn84" },
@@ -88,7 +88,7 @@ const struct mcu_type_s avr_mcu_types[] = {
   { "attiny87",             ARCH_AVR25, "__AVR_ATtiny87__",         0, 0x0100, "tn87" },
   { "attiny48",             ARCH_AVR25, "__AVR_ATtiny48__",         0, 0x0100, "tn48" },
   { "attiny88",             ARCH_AVR25, "__AVR_ATtiny88__",         0, 0x0100, "tn88" },
-  { "at86rf401",            ARCH_AVR25, "__AVR_AT86RF401__",        1, 0x0060, "86401" },
+  { "at86rf401",            ARCH_AVR25, "__AVR_AT86RF401__",        0, 0x0060, "86401" },
     /* Classic, > 8K, <= 64K.  */
   { "avr3",                 ARCH_AVR3, NULL,                        0, 0x0060, "43355" },
   { "at43usb355",           ARCH_AVR3, "__AVR_AT43USB355__",        0, 0x0060, "43355" },

diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index a2fc2c7..b5a61a3 100644 (file)
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -1879,9 +1879,12 @@ output_movhi (rtx insn, rtx operands[], int *l)
            }
          else if (test_hard_reg_class (STACK_REG, src))
            {
-             *l = 2;   
-             return (AS2 (in,%A0,__SP_L__) CR_TAB
-                     AS2 (in,%B0,__SP_H__));
+              *l = 2;
+              return AVR_HAVE_8BIT_SP
+                ? (AS2 (in,%A0,__SP_L__) CR_TAB
+                   AS1 (clr,%B0))
+                : (AS2 (in,%A0,__SP_L__) CR_TAB
+                   AS2 (in,%B0,__SP_H__));
            }
 
          if (AVR_HAVE_MOVW)
@@ -5173,10 +5176,10 @@ avr_file_start (void)
 
   default_file_start ();
 
-/*  fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
-  fputs ("__SREG__ = 0x3f\n"
-        "__SP_H__ = 0x3e\n"
-        "__SP_L__ = 0x3d\n", asm_out_file);
+  fputs ("__SREG__ = 0x3f\n", asm_out_file);
+  if (!AVR_HAVE_8BIT_SP)
+    fputs ("__SP_H__ = 0x3e\n", asm_out_file);
+  fputs ("__SP_L__ = 0x3d\n", asm_out_file);
   
   fputs ("__tmp_reg__ = 0\n" 
          "__zero_reg__ = 1\n", asm_out_file);

diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index 1fc6fee..bff4f6e 100644 (file)
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -299,7 +299,7 @@
   [(set (match_operand:HI 0 "stack_register_operand" "=q")
         (unspec_volatile:HI [(match_operand:HI 1 "register_operand"  "r")] 
                            UNSPECV_WRITE_SP_IRQ_OFF))]
-  ""
+  "!AVR_HAVE_8BIT_SP"
   "out __SP_H__, %B1
        out __SP_L__, %A1"
   [(set_attr "length" "2")
@@ -309,7 +309,7 @@
   [(set (match_operand:HI 0 "stack_register_operand" "=q")
         (unspec_volatile:HI [(match_operand:HI 1 "register_operand"  "r")] 
                            UNSPECV_WRITE_SP_IRQ_ON))]
-  ""
+  "!AVR_HAVE_8BIT_SP"
   "cli
         out __SP_H__, %B1
        sei

diff --git a/gcc/config/avr/libgcc.S b/gcc/config/avr/libgcc.S
index ac8e5cd..89bd378 100644 (file)
--- a/gcc/config/avr/libgcc.S
+++ b/gcc/config/avr/libgcc.S
@@ -582,6 +582,15 @@ __prologue_saves__:
        push r17
        push r28
        push r29
+#if defined (__AVR_HAVE_8BIT_SP__)
+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level
+;;        so this lines are dead code.  To make it work, devices without
+;;        SP_H must get their own multilib(s), see PR51345.
+       in      r28,__SP_L__
+       sub     r28,r26
+       clr     r29
+       out     __SP_L__,r28
+#else
        in      r28,__SP_L__
        in      r29,__SP_H__
        sub     r28,r26
@@ -591,6 +600,7 @@ __prologue_saves__:
        out     __SP_H__,r29
        out     __SREG__,__tmp_reg__
        out     __SP_L__,r28
+#endif
 #if defined (__AVR_HAVE_EIJMP_EICALL__)
        eijmp
 #else
@@ -625,6 +635,15 @@ __epilogue_restores__:
        ldd     r16,Y+4
        ldd     r17,Y+3
        ldd     r26,Y+2
+#if defined (__AVR_HAVE_8BIT_SP__)
+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level
+;;        so this lines are dead code.  To make it work, devices without
+;;        SP_H must get their own multilib(s).
+       ldd     r29,Y+1
+       add     r28,r30
+       out     __SP_L__,r28
+       mov     r28, r26
+#else
        ldd     r27,Y+1
        add     r28,r30
        adc     r29,__zero_reg__
@@ -635,6 +654,7 @@ __epilogue_restores__:
        out     __SP_L__,r28
        mov_l   r28, r26
        mov_h   r29, r27
+#endif
        ret
 .endfunc
 #endif /* defined (L_epilogue) */