* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,

	gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
	-m64.
	* gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
	gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
	gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97731 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e70b4b2..5715b0e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2005-04-06  Joseph S. Myers  <joseph@codesourcery.com>
+
+       * gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,
+       gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
+       -m64.
+       * gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
+       gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
+       gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.
+
 2005-04-06  Mark Mitchell  <mark@codesourcery.com>
 
        PR c++/20212

diff --git a/gcc/testsuite/gcc.dg/i386-387-7.c b/gcc/testsuite/gcc.dg/i386-387-7.c
index 210917a..1a40cd7 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-387-7.c
+++ b/gcc/testsuite/gcc.dg/i386-387-7.c
@@ -1,5 +1,6 @@
 /* Verify that 387 fsincos instruction is generated.  */
 /* { dg-do compile { target "i?86-*-*" } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O -ffast-math -march=i686" } */
 /* { dg-final { scan-assembler "fsincos" } } */
 

diff --git a/gcc/testsuite/gcc.dg/i386-3dnowA-1.c b/gcc/testsuite/gcc.dg/i386-3dnowA-1.c
index 2ae1a04..b5327b3 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-3dnowA-1.c
+++ b/gcc/testsuite/gcc.dg/i386-3dnowA-1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
 
 /* Test that the intrinsics compile with optimization.  All of them are

diff --git a/gcc/testsuite/gcc.dg/i386-3dnowA-2.c b/gcc/testsuite/gcc.dg/i386-3dnowA-2.c
index d8ed6cb..ea336af 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-3dnowA-2.c
+++ b/gcc/testsuite/gcc.dg/i386-3dnowA-2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
 
 /* Test that the intrinsics compile without optimization.  All of them are

diff --git a/gcc/testsuite/gcc.dg/loop-3.c b/gcc/testsuite/gcc.dg/loop-3.c
index 3cc6643..f7ceadd 100644 (file)
--- a/gcc/testsuite/gcc.dg/loop-3.c
+++ b/gcc/testsuite/gcc.dg/loop-3.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-options "-O3" } */
-/* { dg-options "-O3 -mtune=i386" { target i?86-*-* } } */
+/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
 
 #if defined(STACK_SIZE) && (STACK_SIZE < 65536)
 # define BYTEMEM_SIZE 10000L

diff --git a/gcc/testsuite/gcc.dg/pr12092-1.c b/gcc/testsuite/gcc.dg/pr12092-1.c
index 8f38a4a..1b29452 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr12092-1.c
+++ b/gcc/testsuite/gcc.dg/pr12092-1.c
@@ -1,6 +1,7 @@
 /* PR rtl-optimization/12092  */
 /* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
 /* { dg-do compile { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
 
 void DecodeAC(int index,int *matrix)

diff --git a/gcc/testsuite/gcc.dg/short-compare-1.c b/gcc/testsuite/gcc.dg/short-compare-1.c
index 6a4e388..7ecca24 100644 (file)
--- a/gcc/testsuite/gcc.dg/short-compare-1.c
+++ b/gcc/testsuite/gcc.dg/short-compare-1.c
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
 /* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
 
 extern void abort(void);

diff --git a/gcc/testsuite/gcc.dg/short-compare-2.c b/gcc/testsuite/gcc.dg/short-compare-2.c
index 1c5963c..736e151 100644 (file)
--- a/gcc/testsuite/gcc.dg/short-compare-2.c
+++ b/gcc/testsuite/gcc.dg/short-compare-2.c
@@ -4,7 +4,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
 /* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
 
 extern void abort();

diff --git a/gcc/testsuite/gcc.dg/smod-1.c b/gcc/testsuite/gcc.dg/smod-1.c
index 268b43b..e75978a 100644 (file)
--- a/gcc/testsuite/gcc.dg/smod-1.c
+++ b/gcc/testsuite/gcc.dg/smod-1.c
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-std=c99" } */
-/* { dg-options "-std=c99 -mtune=i486" { target i?86-*-* } } */
+/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
 
 #include <limits.h>
 

diff --git a/gcc/testsuite/gcc.dg/torture/badshift.c b/gcc/testsuite/gcc.dg/torture/badshift.c
index d656ed6..dec71cf 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/badshift.c
+++ b/gcc/testsuite/gcc.dg/torture/badshift.c
@@ -2,7 +2,7 @@
 
 /* { dg-do run } */
 /* { dg-options "" } */
-/* { dg-options "-march=i386" { target i?86-*-* } } */
+/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
 
 /* We used to optimize the DImode shift-by-32 to zero because in combine
    we turned: