+2003-05-02 David Edelsohn <edelsohn@gnu.org>
+
+ * config/rs6000/{603.md,6xx.md,7450.md,7xx.md,rs64.md}: Decrease
+ number of automata.
+
+ * config/rs6000/rs6000.c (symbol_ref_operand): Check
+ SYMBOL_REF_FUNCTION_P on AIX.
+ (current_file_function_operand): Same.
+ * config/rs6000/rs6000.md (call,call_value): Force non-function
+ symbol_ref into register on AIX.
+
2003-05-02 Alan Modra <amodra@bigpond.net.au>
* calls.c (struct arg_data): Move offset, slot_offset, size and
;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
;; MA 02111-1307, USA.
-(define_automaton "ppc603,ppc603fp,ppc603other")
+(define_automaton "ppc603,ppc603fp")
(define_cpu_unit "iu_603" "ppc603")
(define_cpu_unit "fpu_603" "ppc603fp")
-(define_cpu_unit "lsu_603,bpu_603,sru_603" "ppc603other")
+(define_cpu_unit "lsu_603,bpu_603,sru_603" "ppc603")
;; PPC603/PPC603e 32-bit IU, LSU, FPU, BPU, SRU
;; Max issue 3 insns/clock cycle (includes 1 branch)
;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
;; MA 02111-1307, USA.
-(define_automaton "ppc6xx,ppc6xxfp,ppc6xxfp2,ppc6xxother")
+(define_automaton "ppc6xx,ppc6xxfp,ppc6xxfp2")
(define_cpu_unit "iu1_6xx,iu2_6xx,mciu_6xx" "ppc6xx")
(define_cpu_unit "fpu_6xx" "ppc6xxfp")
(define_cpu_unit "fpu1_6xx,fpu2_6xx" "ppc6xxfp2")
-(define_cpu_unit "lsu_6xx,bpu_6xx,cru_6xx" "ppc6xxother")
+(define_cpu_unit "lsu_6xx,bpu_6xx,cru_6xx" "ppc6xx")
;; PPC604 32-bit 2xSCIU, MCIU, LSU, FPU, BPU
;; PPC604e 32-bit 2xSCIU, MCIU, LSU, FPU, BPU, CRU
;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
;; MA 02111-1307, USA.
-(define_automaton "ppc7450,ppc7450fp,ppc7450other,ppc7450vec")
+(define_automaton "ppc7450,ppc7450fp,ppc7450vec")
(define_cpu_unit "iu1_7450,iu2_7450,iu3_7450,mciu_7450" "ppc7450")
(define_cpu_unit "fpu_7450" "ppc7450fp")
-(define_cpu_unit "lsu_7450,bpu_7450" "ppc7450other")
+(define_cpu_unit "lsu_7450,bpu_7450" "ppc7450")
(define_cpu_unit "du1_7450,du2_7450,du3_7450" "ppc7450")
(define_cpu_unit "vecsmpl_7450,veccmplx_7450,vecflt_7450,vecperm_7450" "ppc7450vec")
(define_cpu_unit "vdu1_7450,vdu2_7450" "ppc7450vec")
;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
;; MA 02111-1307, USA.
-(define_automaton "ppc7xx,ppc7xxfp,ppc7xxother,ppc7xxvec")
+(define_automaton "ppc7xx,ppc7xxfp")
(define_cpu_unit "iu1_7xx,iu2_7xx" "ppc7xx")
(define_cpu_unit "fpu_7xx" "ppc7xxfp")
-(define_cpu_unit "lsu_7xx,bpu_7xx,sru_7xx" "ppc7xxother")
+(define_cpu_unit "lsu_7xx,bpu_7xx,sru_7xx" "ppc7xx")
(define_cpu_unit "du1_7xx,du2_7xx" "ppc7xx")
-(define_cpu_unit "veccmplx_7xx,vecperm_7xx,vdu_7xx" "ppc7xxvec")
+(define_cpu_unit "veccmplx_7xx,vecperm_7xx,vdu_7xx" "ppc7xx")
;; PPC740/PPC750/PPC7400 32-bit 2xIU, LSU, SRU, FPU, BPU
;; IU1 can perform all integer operations
if (mode != VOIDmode && GET_MODE (op) != mode)
return 0;
- return (GET_CODE (op) == SYMBOL_REF);
+ return (GET_CODE (op) == SYMBOL_REF
+ && (DEFAULT_ABI != ABI_AIX || SYMBOL_REF_FUNCTION_P (op)));
}
/* Return 1 if the operand, used inside a MEM, is a valid first argument
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
- if (GET_CODE (op) == SYMBOL_REF
- && (SYMBOL_REF_LOCAL_P (op)
- || (op == XEXP (DECL_RTL (current_function_decl), 0))))
- {
-#ifdef ENABLE_CHECKING
- if (!SYMBOL_REF_FUNCTION_P (op))
- abort ();
-#endif
- return 1;
- }
- return 0;
+ return (GET_CODE (op) == SYMBOL_REF
+ && (DEFAULT_ABI != ABI_AIX || SYMBOL_REF_FUNCTION_P (op))
+ && (SYMBOL_REF_LOCAL_P (op)
+ || (op == XEXP (DECL_RTL (current_function_decl), 0))));
}
/* Return 1 if this operand is a valid input for a move insn. */
operands[0] = XEXP (operands[0], 0);
if (GET_CODE (operands[0]) != SYMBOL_REF
+ || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[0]))
|| (INTVAL (operands[2]) & CALL_LONG) != 0)
{
if (INTVAL (operands[2]) & CALL_LONG)
operands[1] = XEXP (operands[1], 0);
if (GET_CODE (operands[1]) != SYMBOL_REF
+ || (DEFAULT_ABI == ABI_AIX && !SYMBOL_REF_FUNCTION_P (operands[1]))
|| (INTVAL (operands[3]) & CALL_LONG) != 0)
{
if (INTVAL (operands[3]) & CALL_LONG)
;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
;; MA 02111-1307, USA.
-(define_automaton "rs64,rs64fp,rs64other")
+(define_automaton "rs64,rs64fp")
(define_cpu_unit "iu_rs64" "rs64")
(define_cpu_unit "mciu_rs64" "rs64")
(define_cpu_unit "fpu_rs64" "rs64fp")
-(define_cpu_unit "lsu_rs64,bpu_rs64" "rs64other")
+(define_cpu_unit "lsu_rs64,bpu_rs64" "rs64")
;; RS64a 64-bit IU, LSU, FPU, BPU