- case 0: return \"mov.n\\t%0, %1\;mov.n\\t%D0, %D1\";
- case 2: return \"%v0s32i.n\\t%1, %0\;s32i.n\\t%D1, %N0\";
- case 3: return \"mov\\t%0, %1\;mov\\t%D0, %D1\";
- case 5: return \"%v0s32i\\t%1, %0\;s32i\\t%D1, %N0\";
-
- case 1:
- case 4:
- /* Check if the first half of the destination register is used
- in the source address. If so, reverse the order of the loads
- so that the source address doesn't get clobbered until it is
- no longer needed. */
-
- dstreg = operands[0];
- if (GET_CODE (dstreg) == SUBREG)
- dstreg = SUBREG_REG (dstreg);
- if (GET_CODE (dstreg) != REG)
- abort();
-
- if (reg_mentioned_p (dstreg, operands[1]))
- {
- switch (which_alternative)
- {
- case 1: return \"%v1l32i.n\\t%D0, %N1\;l32i.n\\t%0, %1\";
- case 4: return \"%v1l32i\\t%D0, %N1\;l32i\\t%0, %1\";
- }
- }
- else
- {
- switch (which_alternative)
- {
- case 1: return \"%v1l32i.n\\t%0, %1\;l32i.n\\t%D0, %N1\";
- case 4: return \"%v1l32i\\t%0, %1\;l32i\\t%D0, %N1\";
- }
- }
+ rtx tmp;
+ tmp = operands[0], operands[0] = operands[1], operands[1] = tmp;
+ tmp = operands[2], operands[2] = operands[3], operands[3] = tmp;