* config/i386/sse.md (copysign<mode>3): Use "and-not" SSE instruction

	instead of "and" with inverted sign bit mask value.  Use
	"nonimmediate_operand" for operand 1 and operand 2 predicate.
	Allocate registers only for operand 4 and operand 5.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@149691 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 812c794..b87b62a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,7 +1,9 @@
-2009-07-15 Uros Bizjak  <ubizjak@gmail.com>
+2009-07-15  Uros Bizjak  <ubizjak@gmail.com>
 
-       * config/i386/sse.md (copysign<mode>3): Allocate registers only for
-       operands[5] and operands[6].
+       * config/i386/sse.md (copysign<mode>3): Use "and-not" SSE instruction
+       instead of "and" with inverted sign bit mask value.  Use
+       "nonimmediate_operand" for operand 1 and operand 2 predicate.
+       Allocate registers only for operand 4 and operand 5.
 
 2009-07-15  Jakub Jelinek  <jakub@redhat.com>
 

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index cde91e4..ce83029 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1595,21 +1595,21 @@
    (set_attr "mode" "<MODE>")])
 
 (define_expand "copysign<mode>3"
-  [(set (match_dup 5)
-       (and:SSEMODEF2P (match_operand:SSEMODEF2P 1 "register_operand" "")
-                       (match_dup 3)))
-   (set (match_dup 6)
-       (and:SSEMODEF2P (match_operand:SSEMODEF2P 2 "register_operand" "")
-                       (match_dup 4)))
+  [(set (match_dup 4)
+       (and:SSEMODEF2P 
+         (not:SSEMODEF2P (match_dup 3))
+         (match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")))
+   (set (match_dup 5)
+       (and:SSEMODEF2P (match_dup 3)
+                       (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "")))
    (set (match_operand:SSEMODEF2P 0 "register_operand" "")
-       (ior:SSEMODEF2P (match_dup 5) (match_dup 6)))]
+       (ior:SSEMODEF2P (match_dup 4) (match_dup 5)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
 {
-  operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 1);
-  operands[4] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0);
+  operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0);
 
+  operands[4] = gen_reg_rtx (<MODE>mode);
   operands[5] = gen_reg_rtx (<MODE>mode);
-  operands[6] = gen_reg_rtx (<MODE>mode);
 })
 
 ;; Also define scalar versions.  These are used for abs, neg, and