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* arm.md (minmax_arithsi): Reject all eliminable registers, not just
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 1 Apr 2005 10:44:59 +0000 (10:44 +0000)
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Fri, 1 Apr 2005 10:44:59 +0000 (10:44 +0000)
the frame and argument pointers.
(strqi_preinc, strqi_predec, loadqi_preinc, loadqi_predec): Likewise.
(loadqisi_preinc, loadqisi_predec, strsi_preinc): Likewise.
(strsi_predec, loadsi_preinc, loadsi_predec): Likewise.
(strqi_shiftpreinc, strqi_shiftpredec, loadqi_shiftpreinc): Likewise.
(loadqi_shiftpredec, strsi_shiftpreinc, strsi_shiftpredec): Likewise.
(loadsi_shiftpreinc, loadsi_shiftpredec): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97380 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm.md

index 0a78483..06f562d 100644 (file)
@@ -1,3 +1,14 @@
+2005-04-01  Richard Earnshaw  <richard.earnshaw@arm.com>
+
+       * arm.md (minmax_arithsi): Reject all eliminable registers, not just
+       the frame and argument pointers.
+       (strqi_preinc, strqi_predec, loadqi_preinc, loadqi_predec): Likewise.
+       (loadqisi_preinc, loadqisi_predec, strsi_preinc): Likewise.
+       (strsi_predec, loadsi_preinc, loadsi_predec): Likewise.
+       (strqi_shiftpreinc, strqi_shiftpredec, loadqi_shiftpreinc): Likewise.
+       (loadqi_shiftpredec, strsi_shiftpreinc, strsi_shiftpredec): Likewise.
+       (loadsi_shiftpreinc, loadsi_shiftpredec): Likewise.
+
 2005-04-01  Danny Smith  <dannysmith@users.sourceforge.net>
 
        * config/i386/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Define,
index f258466..f86ce20 100644 (file)
            (match_operand:SI 3 "arm_rhs_operand" "rI,rI")])
          (match_operand:SI 1 "s_register_operand" "0,?r")]))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM
-   && (GET_CODE (operands[1]) != REG
-       || (REGNO(operands[1]) != FRAME_POINTER_REGNUM
-           && REGNO(operands[1]) != ARG_POINTER_REGNUM))"
+  "TARGET_ARM && !arm_eliminable_register (operands[1])"
   "*
   {
     enum rtx_code code = GET_CODE (operands[4]);
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "str%?b\\t%3, [%0, %2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (minus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "str%?b\\t%3, [%0, -%2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?b\\t%3, [%0, %2]!"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (minus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?b\\t%3, [%0, -%2]!"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?b\\t%3, [%0, %2]!\\t%@ z_extendqisi"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (minus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?b\\t%3, [%0, -%2]!\\t%@ z_extendqisi"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "str%?\\t%3, [%0, %2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (minus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "str%?\\t%3, [%0, -%2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?\\t%3, [%0, %2]!"
   [(set_attr "type" "load1")
    (set_attr "predicable" "yes")]
    (set (match_operand:SI 0 "s_register_operand" "=r")
        (minus:SI (match_dup 1) (match_dup 2)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && (GET_CODE (operands[2]) != REG
-       || REGNO (operands[2]) != FRAME_POINTER_REGNUM)"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[2])"
   "ldr%?\\t%3, [%0, -%2]!"
   [(set_attr "type" "load1")
    (set_attr "predicable" "yes")]
        (plus:SI (match_op_dup 2 [(match_dup 3) (match_dup 4)])
                 (match_dup 1)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "str%?b\\t%5, [%0, %3%S2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
        (minus:SI (match_dup 1) (match_op_dup 2 [(match_dup 3)
                                                 (match_dup 4)])))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "str%?b\\t%5, [%0, -%3%S2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
        (plus:SI (match_op_dup 2 [(match_dup 3) (match_dup 4)])
                 (match_dup 1)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "ldr%?b\\t%5, [%0, %3%S2]!"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
        (minus:SI (match_dup 1) (match_op_dup 2 [(match_dup 3)
                                                 (match_dup 4)])))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "ldr%?b\\t%5, [%0, -%3%S2]!"
   [(set_attr "type" "load_byte")
    (set_attr "predicable" "yes")]
        (plus:SI (match_op_dup 2 [(match_dup 3) (match_dup 4)])
                 (match_dup 1)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "str%?\\t%5, [%0, %3%S2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
        (minus:SI (match_dup 1) (match_op_dup 2 [(match_dup 3)
                                                 (match_dup 4)])))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "str%?\\t%5, [%0, -%3%S2]!"
   [(set_attr "type" "store1")
    (set_attr "predicable" "yes")]
        (plus:SI (match_op_dup 2 [(match_dup 3) (match_dup 4)])
                 (match_dup 1)))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "ldr%?\\t%5, [%0, %3%S2]!"
   [(set_attr "type" "load1")
    (set_attr "predicable" "yes")]
        (minus:SI (match_dup 1) (match_op_dup 2 [(match_dup 3)
                                                 (match_dup 4)])))]
   "TARGET_ARM
-   && REGNO (operands[0]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[1]) != FRAME_POINTER_REGNUM
-   && REGNO (operands[3]) != FRAME_POINTER_REGNUM"
+   && !arm_eliminable_register (operands[0])
+   && !arm_eliminable_register (operands[1])
+   && !arm_eliminable_register (operands[3])"
   "ldr%?\\t%5, [%0, -%3%S2]!"
   [(set_attr "type" "load1")
    (set_attr "predicable" "yes")])