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2006-09-19 Paul Brook <paul@codesourcery.com>
authorpbrook <pbrook@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 19 Sep 2006 13:19:24 +0000 (13:19 +0000)
committerpbrook <pbrook@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 19 Sep 2006 13:19:24 +0000 (13:19 +0000)
PR target/28516
gcc/
* config/arm/arm.c (arm_unwind_emit_set): Handle reg = sp + const.

gcc/testsuite/
* gcc.dg/nested-func-5.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@117056 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/nested-func-5.c [new file with mode: 0644]

index 515e4f9..030f172 100644 (file)
@@ -1,3 +1,8 @@
+2006-09-19  Paul Brook  <paul@codesourcery.com>
+
+       PR target/28516
+       * config/arm/arm.c (arm_unwind_emit_set): Handle reg = sp + const.
+
 2006-09-17  Zdenek Dvorak <dvorakz@suse.cz>
 
        PR tree-optimization/28887
index a36c0d7..ff5831f 100644 (file)
@@ -15415,6 +15415,15 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
          /* Move from sp to reg.  */
          asm_fprintf (asm_out_file, "\t.movsp %r\n", REGNO (e0));
        }
+     else if (GET_CODE (e1) == PLUS
+             && GET_CODE (XEXP (e1, 0)) == REG
+             && REGNO (XEXP (e1, 0)) == SP_REGNUM
+             && GET_CODE (XEXP (e1, 1)) == CONST_INT)
+       {
+         /* Set reg to offset from sp.  */
+         asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n",
+                      REGNO (e0), (int)INTVAL(XEXP (e1, 1)));
+       }
       else
        abort ();
       break;
index f5d9a7a..e643d1d 100644 (file)
@@ -1,3 +1,8 @@
+2006-09-19  Paul Brook  <paul@codesourcery.com>
+
+       PR target/28516
+       * gcc.dg/nested-func-5.c: New test.
+
 2006-09-19  Ben Elliston  <bje@au.ibm.com>
 
        * lib/target-supports.exp (check_effective_target_tls): Compile
diff --git a/gcc/testsuite/gcc.dg/nested-func-5.c b/gcc/testsuite/gcc.dg/nested-func-5.c
new file mode 100644 (file)
index 0000000..5076dbd
--- /dev/null
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-fexceptions" } */
+/* PR28516: ICE generating ARM unwind directives for nested functions.  */
+
+void ex(int (*)(void));
+void foo(int i)
+{
+  int bar(void)
+  {
+    return i;
+  }
+  ex(bar);
+}