NONJUMP_INSN_P, CALL_P, LABEL_P and NOTE_P predicates instead of
GET_CODE macro. Use IN_RANGE macro where appropriate.
* config/alpha/alpha.h: Ditto.
* config/alpha/alpha.md: Ditto.
* config/alpha/constraints.md: Ditto.
* config/alpha/predicates.md: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@146550
138bc75d-0d04-0410-961f-
82ee72b054a4
+2009-04-22 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/alpha/alpha.c: Use REG_P, MEM_P, CONST_INT_P, JUMP_P,
+ NONJUMP_INSN_P, CALL_P, LABEL_P and NOTE_P predicates instead of
+ GET_CODE macro. Use IN_RANGE macro where appropriate.
+ * config/alpha/alpha.h: Ditto.
+ * config/alpha/alpha.md: Ditto.
+ * config/alpha/constraints.md: Ditto.
+ * config/alpha/predicates.md: Ditto.
+
2009-04-22 Paolo Bonzini <bonzini@gnu.org>
* defaults.h (GO_IF_MODE_DEPENDENT_ADDRESS): Provide empty default.
2009-04-22 Paolo Bonzini <bonzini@gnu.org>
* defaults.h (GO_IF_MODE_DEPENDENT_ADDRESS): Provide empty default.
(find_basic_blocks_1): Delete.
(find_basic_blocks): Delete.
* except.c (finish_eh_generation): Make static. Move comment from
(find_basic_blocks_1): Delete.
(find_basic_blocks): Delete.
* except.c (finish_eh_generation): Make static. Move comment from
- except.h here. Remove find_basic_blocks references from
- comments.
+ except.h here. Remove find_basic_blocks references from comments.
* except.h (finish_eh_generation): Delete.
* basic-block.h (find_basic_blocks): Delete.
* config/sh/sh.c (sh_output_mi_thunk): Delete a "#if 0" block.
* except.h (finish_eh_generation): Delete.
* basic-block.h (find_basic_blocks): Delete.
* config/sh/sh.c (sh_output_mi_thunk): Delete a "#if 0" block.
* tree-switch-conversion.c (build_constructors): Split a long line.
(constructor_contains_same_values_p): New function.
* tree-switch-conversion.c (build_constructors): Split a long line.
(constructor_contains_same_values_p): New function.
- (build_one_array): Create assigns of constants if possible, do not call
- mark_sym_for_renaming, call update_stmt.
+ (build_one_array): Create assigns of constants if possible, do not
+ call mark_sym_for_renaming, call update_stmt.
(build_arrays): Call make_ssa_name (create_tmp_var ()) instead of
make_rename_temp. Do not call mark_symbols_for_renaming, call
update_stmt.
(build_arrays): Call make_ssa_name (create_tmp_var ()) instead of
make_rename_temp. Do not call mark_symbols_for_renaming, call
update_stmt.
2009-04-21 Richard Guenther <rguenther@suse.de>
PR tree-optimization/39827
2009-04-21 Richard Guenther <rguenther@suse.de>
PR tree-optimization/39827
- * tree-ssa-phiprop.c (propagate_with_phi): Check SSA_NAME
- is in range.
+ * tree-ssa-phiprop.c (propagate_with_phi): Check SSA_NAME is in range.
(tree_ssa_phiprop): Pass the correct array size.
2009-04-21 Uros Bizjak <ubizjak@gmail.com>
(tree_ssa_phiprop): Pass the correct array size.
2009-04-21 Uros Bizjak <ubizjak@gmail.com>
rtx tmp = op;
if (GET_CODE (tmp) == SUBREG)
tmp = SUBREG_REG (tmp);
rtx tmp = op;
if (GET_CODE (tmp) == SUBREG)
tmp = SUBREG_REG (tmp);
- if (GET_CODE (tmp) == REG
&& REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
{
op = reg_equiv_memory_loc[REGNO (tmp)];
&& REGNO (tmp) >= FIRST_PSEUDO_REGISTER)
{
op = reg_equiv_memory_loc[REGNO (tmp)];
tmp = NEXT_INSN (tmp);
if (!tmp)
return NULL_RTX;
tmp = NEXT_INSN (tmp);
if (!tmp)
return NULL_RTX;
- if (GET_CODE (tmp) == JUMP_INSN
&& GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC)
return PATTERN (tmp);
return NULL_RTX;
&& GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC)
return PATTERN (tmp);
return NULL_RTX;
/* If this is an ldq_u type address, discard the outer AND. */
if (mode == DImode
&& GET_CODE (x) == AND
/* If this is an ldq_u type address, discard the outer AND. */
if (mode == DImode
&& GET_CODE (x) == AND
- && GET_CODE (XEXP (x, 1)) == CONST_INT
+ && CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) == -8)
x = XEXP (x, 0);
&& INTVAL (XEXP (x, 1)) == -8)
x = XEXP (x, 0);
{
if (! strict
&& NONSTRICT_REG_OK_FP_BASE_P (x)
{
if (! strict
&& NONSTRICT_REG_OK_FP_BASE_P (x)
- && GET_CODE (ofs) == CONST_INT)
return true;
if ((strict
? STRICT_REG_OK_FOR_BASE_P (x)
return true;
if ((strict
? STRICT_REG_OK_FOR_BASE_P (x)
valid offset, compute the high part of the constant and add it to
the register. Then our address is (plus temp low-part-const). */
if (GET_CODE (x) == PLUS
valid offset, compute the high part of the constant and add it to
the register. Then our address is (plus temp low-part-const). */
if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 0)) == REG
- && GET_CODE (XEXP (x, 1)) == CONST_INT
+ && REG_P (XEXP (x, 0))
+ && CONST_INT_P (XEXP (x, 1))
&& ! CONSTANT_ADDRESS_P (XEXP (x, 1)))
{
addend = INTVAL (XEXP (x, 1));
&& ! CONSTANT_ADDRESS_P (XEXP (x, 1)))
{
addend = INTVAL (XEXP (x, 1));
if (can_create_pseudo_p ()
&& GET_CODE (x) == CONST
&& GET_CODE (XEXP (x, 0)) == PLUS
if (can_create_pseudo_p ()
&& GET_CODE (x) == CONST
&& GET_CODE (XEXP (x, 0)) == PLUS
- && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (XEXP (x, 0), 1)))
{
addend = INTVAL (XEXP (XEXP (x, 0), 1));
x = force_reg (Pmode, XEXP (XEXP (x, 0), 0));
{
addend = INTVAL (XEXP (XEXP (x, 0), 1));
x = force_reg (Pmode, XEXP (XEXP (x, 0), 0));
our address. */
if (can_create_pseudo_p ()
&& GET_CODE (x) == PLUS
our address. */
if (can_create_pseudo_p ()
&& GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 0)) == REG
&& GET_CODE (XEXP (x, 1)) == CONST
&& GET_CODE (XEXP (XEXP (x, 1), 0)) == PLUS
&& GET_CODE (XEXP (x, 1)) == CONST
&& GET_CODE (XEXP (XEXP (x, 1), 0)) == PLUS
- && GET_CODE (XEXP (XEXP (XEXP (x, 1), 0), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (XEXP (XEXP (x, 1), 0), 1)))
{
addend = INTVAL (XEXP (XEXP (XEXP (x, 1), 0), 1));
x = expand_simple_binop (Pmode, PLUS, XEXP (x, 0),
{
addend = INTVAL (XEXP (XEXP (XEXP (x, 1), 0), 1));
x = expand_simple_binop (Pmode, PLUS, XEXP (x, 0),
/* We must recognize output that we have already generated ourselves. */
if (GET_CODE (x) == PLUS
&& GET_CODE (XEXP (x, 0)) == PLUS
/* We must recognize output that we have already generated ourselves. */
if (GET_CODE (x) == PLUS
&& GET_CODE (XEXP (x, 0)) == PLUS
- && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
- && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
- && GET_CODE (XEXP (x, 1)) == CONST_INT)
+ && REG_P (XEXP (XEXP (x, 0), 0))
+ && CONST_INT_P (XEXP (XEXP (x, 0), 1))
+ && CONST_INT_P (XEXP (x, 1)))
{
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
{
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
splitting the addend across an ldah and the mem insn. This
cuts number of extra insns needed from 3 to 1. */
if (GET_CODE (x) == PLUS
splitting the addend across an ldah and the mem insn. This
cuts number of extra insns needed from 3 to 1. */
if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 0)) == REG
&& REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (REGNO (XEXP (x, 0)))
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
&& REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (REGNO (XEXP (x, 0)))
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
return false;
case ASHIFT:
return false;
case ASHIFT:
- if (GET_CODE (XEXP (x, 1)) == CONST_INT
+ if (CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) <= 3)
{
*total = COSTS_N_INSNS (1);
&& INTVAL (XEXP (x, 1)) <= 3)
{
*total = COSTS_N_INSNS (1);
return false;
case FLOAT_EXTEND:
return false;
case FLOAT_EXTEND:
- if (GET_CODE (XEXP (x, 0)) == MEM)
+ if (MEM_P (XEXP (x, 0)))
*total = 0;
else
*total = cost_data->fp_add;
*total = 0;
else
*total = cost_data->fp_add;
rtx base;
HOST_WIDE_INT disp, offset;
rtx base;
HOST_WIDE_INT disp, offset;
- gcc_assert (GET_CODE (ref) == MEM);
+ gcc_assert (MEM_P (ref));
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
rtx base;
HOST_WIDE_INT offset = 0;
rtx base;
HOST_WIDE_INT offset = 0;
- gcc_assert (GET_CODE (ref) == MEM);
+ gcc_assert (MEM_P (ref));
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
if (reload_in_progress
&& ! memory_address_p (GET_MODE (ref), XEXP (ref, 0)))
return rclass;
/* These sorts of constants we can easily drop to memory. */
return rclass;
/* These sorts of constants we can easily drop to memory. */
- if (GET_CODE (x) == CONST_INT
|| GET_CODE (x) == CONST_DOUBLE
|| GET_CODE (x) == CONST_VECTOR)
{
|| GET_CODE (x) == CONST_DOUBLE
|| GET_CODE (x) == CONST_VECTOR)
{
{
rtx x = *xp, orig = (rtx) data;
{
rtx x = *xp, orig = (rtx) data;
- if (GET_CODE (x) != MEM)
return 0;
MEM_VOLATILE_P (x) = MEM_VOLATILE_P (orig);
return 0;
MEM_VOLATILE_P (x) = MEM_VOLATILE_P (orig);
/* If we can't make any pseudos, TARGET is an SImode hard register, we
can't load this constant in one insn, do this in DImode. */
if (!can_create_pseudo_p () && mode == SImode
/* If we can't make any pseudos, TARGET is an SImode hard register, we
can't load this constant in one insn, do this in DImode. */
if (!can_create_pseudo_p () && mode == SImode
- && GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER)
+ && REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER)
{
result = alpha_emit_set_const_1 (target, mode, c, 1, no_output);
if (result)
{
result = alpha_emit_set_const_1 (target, mode, c, 1, no_output);
if (result)
x = simplify_subreg (DImode, x, GET_MODE (x), 0);
x = simplify_subreg (DImode, x, GET_MODE (x), 0);
- if (GET_CODE (x) == CONST_INT)
{
i0 = INTVAL (x);
i1 = -(i0 < 0);
{
i0 = INTVAL (x);
i1 = -(i0 < 0);
rtx tmp;
/* If the output is not a register, the input must be. */
rtx tmp;
/* If the output is not a register, the input must be. */
- if (GET_CODE (operands[0]) == MEM
+ if (MEM_P (operands[0])
&& ! reg_or_0_operand (operands[1], mode))
operands[1] = force_reg (mode, operands[1]);
&& ! reg_or_0_operand (operands[1], mode))
operands[1] = force_reg (mode, operands[1]);
return false;
/* Split large integers. */
return false;
/* Split large integers. */
- if (GET_CODE (operands[1]) == CONST_INT
+ if (CONST_INT_P (operands[1])
|| GET_CODE (operands[1]) == CONST_DOUBLE
|| GET_CODE (operands[1]) == CONST_VECTOR)
{
|| GET_CODE (operands[1]) == CONST_DOUBLE
|| GET_CODE (operands[1]) == CONST_VECTOR)
{
get_aligned_mem (operands[1], &aligned_mem, &bitnum);
subtarget = operands[0];
get_aligned_mem (operands[1], &aligned_mem, &bitnum);
subtarget = operands[0];
- if (GET_CODE (subtarget) == REG)
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
temp2 = gen_reg_rtx (DImode);
subtarget = operands[0];
temp2 = gen_reg_rtx (DImode);
subtarget = operands[0];
- if (GET_CODE (subtarget) == REG)
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
/* ??? Don't do this when comparing against symbols, otherwise
we'll reduce (&x == 0x1234) to (&x-0x1234 == 0), which will
be declared false out of hand (at least for non-weak). */
/* ??? Don't do this when comparing against symbols, otherwise
we'll reduce (&x == 0x1234) to (&x-0x1234 == 0), which will
be declared false out of hand (at least for non-weak). */
- else if (GET_CODE (op1) == CONST_INT
+ else if (CONST_INT_P (op1)
&& (code == EQ || code == NE)
&& !(symbolic_operand (op0, VOIDmode)
&& (code == EQ || code == NE)
&& !(symbolic_operand (op0, VOIDmode)
- || (GET_CODE (op0) == REG && REG_POINTER (op0))))
+ || (REG_P (op0) && REG_POINTER (op0))))
{
rtx n_op1 = GEN_INT (-INTVAL (op1));
{
rtx n_op1 = GEN_INT (-INTVAL (op1));
- gcc_assert (GET_CODE (operands[i]) == CONST_INT);
+ gcc_assert (CONST_INT_P (operands[i]));
/* FALLTHRU */
case DImode:
reg = gen_rtx_REG (DImode, regno);
/* FALLTHRU */
case DImode:
reg = gen_rtx_REG (DImode, regno);
/* Look for additional alignment information from recorded register info. */
tmp = XEXP (orig_src, 0);
/* Look for additional alignment information from recorded register info. */
tmp = XEXP (orig_src, 0);
- if (GET_CODE (tmp) == REG)
src_align = MAX (src_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
src_align = MAX (src_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
- && GET_CODE (XEXP (tmp, 0)) == REG
- && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+ && REG_P (XEXP (tmp, 0))
+ && CONST_INT_P (XEXP (tmp, 1)))
{
unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
{
unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
}
tmp = XEXP (orig_dst, 0);
}
tmp = XEXP (orig_dst, 0);
- if (GET_CODE (tmp) == REG)
dst_align = MAX (dst_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
dst_align = MAX (dst_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
- && GET_CODE (XEXP (tmp, 0)) == REG
- && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+ && REG_P (XEXP (tmp, 0))
+ && CONST_INT_P (XEXP (tmp, 1)))
{
unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
{
unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
/* Look for stricter alignment. */
tmp = XEXP (orig_dst, 0);
/* Look for stricter alignment. */
tmp = XEXP (orig_dst, 0);
- if (GET_CODE (tmp) == REG)
align = MAX (align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
align = MAX (align, REGNO_POINTER_ALIGN (REGNO (tmp)));
else if (GET_CODE (tmp) == PLUS
- && GET_CODE (XEXP (tmp, 0)) == REG
- && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
+ && REG_P (XEXP (tmp, 0))
+ && CONST_INT_P (XEXP (tmp, 1)))
{
HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
{
HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
x = XVECEXP (x, 0, 0);
lituse = "lituse_tlsldm";
}
x = XVECEXP (x, 0, 0);
lituse = "lituse_tlsldm";
}
- else if (GET_CODE (x) == CONST_INT)
+ else if (CONST_INT_P (x))
lituse = "lituse_jsr";
else
{
lituse = "lituse_jsr";
else
{
break;
case 'r':
/* If this operand is the constant zero, write it as "$31". */
break;
case 'r':
/* If this operand is the constant zero, write it as "$31". */
- if (GET_CODE (x) == REG)
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (x == CONST0_RTX (GET_MODE (x)))
fprintf (file, "$31");
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (x == CONST0_RTX (GET_MODE (x)))
fprintf (file, "$31");
case 'R':
/* Similar, but for floating-point. */
case 'R':
/* Similar, but for floating-point. */
- if (GET_CODE (x) == REG)
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (x == CONST0_RTX (GET_MODE (x)))
fprintf (file, "$f31");
fprintf (file, "%s", reg_names[REGNO (x)]);
else if (x == CONST0_RTX (GET_MODE (x)))
fprintf (file, "$f31");
case 'N':
/* Write the 1's complement of a constant. */
case 'N':
/* Write the 1's complement of a constant. */
- if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%N value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x));
output_operand_lossage ("invalid %%N value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (x));
case 'P':
/* Write 1 << C, for a constant C. */
case 'P':
/* Write 1 << C, for a constant C. */
- if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%P value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x));
output_operand_lossage ("invalid %%P value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT) 1 << INTVAL (x));
case 'h':
/* Write the high-order 16 bits of a constant, sign-extended. */
case 'h':
/* Write the high-order 16 bits of a constant, sign-extended. */
- if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%h value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16);
output_operand_lossage ("invalid %%h value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) >> 16);
case 'L':
/* Write the low-order 16 bits of a constant, sign-extended. */
case 'L':
/* Write the low-order 16 bits of a constant, sign-extended. */
- if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%L value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
output_operand_lossage ("invalid %%L value");
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff);
}
fprintf (file, HOST_WIDE_INT_PRINT_DEC, mask & 0xff);
}
- else if (GET_CODE (x) == CONST_INT)
+ else if (CONST_INT_P (x))
{
HOST_WIDE_INT mask = 0, value = INTVAL (x);
{
HOST_WIDE_INT mask = 0, value = INTVAL (x);
case 'M':
/* 'b', 'w', 'l', or 'q' as the value of the constant. */
case 'M':
/* 'b', 'w', 'l', or 'q' as the value of the constant. */
- if (GET_CODE (x) != CONST_INT
|| (INTVAL (x) != 8 && INTVAL (x) != 16
&& INTVAL (x) != 32 && INTVAL (x) != 64))
output_operand_lossage ("invalid %%M value");
|| (INTVAL (x) != 8 && INTVAL (x) != 16
&& INTVAL (x) != 32 && INTVAL (x) != 64))
output_operand_lossage ("invalid %%M value");
case 'U':
/* Similar, except do it from the mask. */
case 'U':
/* Similar, except do it from the mask. */
- if (GET_CODE (x) == CONST_INT)
{
HOST_WIDE_INT value = INTVAL (x);
{
HOST_WIDE_INT value = INTVAL (x);
/* Write the constant value divided by 8 for little-endian mode or
(56 - value) / 8 for big-endian mode. */
/* Write the constant value divided by 8 for little-endian mode or
(56 - value) / 8 for big-endian mode. */
- if (GET_CODE (x) != CONST_INT
|| (unsigned HOST_WIDE_INT) INTVAL (x) >= (WORDS_BIG_ENDIAN
? 56
: 64)
|| (unsigned HOST_WIDE_INT) INTVAL (x) >= (WORDS_BIG_ENDIAN
? 56
: 64)
case 'S':
/* Same, except compute (64 - c) / 8 */
case 'S':
/* Same, except compute (64 - c) / 8 */
- if (GET_CODE (x) != CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
&& (INTVAL (x) & 7) != 8)
output_operand_lossage ("invalid %%s value");
&& (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
&& (INTVAL (x) & 7) != 8)
output_operand_lossage ("invalid %%s value");
case 'A':
/* Write "_u" for unaligned access. */
case 'A':
/* Write "_u" for unaligned access. */
- if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
+ if (MEM_P (x) && GET_CODE (XEXP (x, 0)) == AND)
fprintf (file, "_u");
break;
case 0:
fprintf (file, "_u");
break;
case 0:
- if (GET_CODE (x) == REG)
fprintf (file, "%s", reg_names[REGNO (x)]);
fprintf (file, "%s", reg_names[REGNO (x)]);
- else if (GET_CODE (x) == MEM)
output_address (XEXP (x, 0));
else if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == UNSPEC)
{
output_address (XEXP (x, 0));
else if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == UNSPEC)
{
addr = XEXP (addr, 0);
if (GET_CODE (addr) == PLUS
addr = XEXP (addr, 0);
if (GET_CODE (addr) == PLUS
- && GET_CODE (XEXP (addr, 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (addr, 1)))
{
offset = INTVAL (XEXP (addr, 1));
addr = XEXP (addr, 0);
{
offset = INTVAL (XEXP (addr, 1));
addr = XEXP (addr, 0);
insn = get_last_insn ();
if (!INSN_P (insn))
insn = prev_active_insn (insn);
insn = get_last_insn ();
if (!INSN_P (insn))
insn = prev_active_insn (insn);
- if (GET_CODE (insn) == CALL_INSN)
output_asm_insn (get_insn_template (CODE_FOR_nop, NULL), NULL);
#if TARGET_ABI_OSF
output_asm_insn (get_insn_template (CODE_FOR_nop, NULL), NULL);
#if TARGET_ABI_OSF
for (i = get_insns (); i ; i = NEXT_INSN (i))
{
for (i = get_insns (); i ; i = NEXT_INSN (i))
{
- if (GET_CODE (i) == NOTE)
{
switch (NOTE_KIND (i))
{
{
switch (NOTE_KIND (i))
{
{
if (alpha_tp == ALPHA_TP_FUNC)
{
{
if (alpha_tp == ALPHA_TP_FUNC)
{
- if (GET_CODE (i) == JUMP_INSN
&& GET_CODE (PATTERN (i)) == RETURN)
goto close_shadow;
}
&& GET_CODE (PATTERN (i)) == RETURN)
goto close_shadow;
}
}
if ((exception_nesting > 0 || alpha_tp >= ALPHA_TP_FUNC)
}
if ((exception_nesting > 0 || alpha_tp >= ALPHA_TP_FUNC)
- && GET_CODE (i) == INSN
&& GET_CODE (PATTERN (i)) != USE
&& GET_CODE (PATTERN (i)) != CLOBBER
&& get_attr_trap (i) == TRAP_YES)
&& GET_CODE (PATTERN (i)) != USE
&& GET_CODE (PATTERN (i)) != CLOBBER
&& get_attr_trap (i) == TRAP_YES)
len += 4;
/* Haifa doesn't do well scheduling branches. */
len += 4;
/* Haifa doesn't do well scheduling branches. */
- if (GET_CODE (insn) == JUMP_INSN)
goto next_and_done;
next:
goto next_and_done;
next:
/* Haifa doesn't do well scheduling branches. */
/* ??? If this is predicted not-taken, slotting continues, except
that no more IBR, FBR, or JSR insns may be slotted. */
/* Haifa doesn't do well scheduling branches. */
/* ??? If this is predicted not-taken, slotting continues, except
that no more IBR, FBR, or JSR insns may be slotted. */
- if (GET_CODE (insn) == JUMP_INSN)
goto next_and_done;
next:
goto next_and_done;
next:
ofs = prev_in_use = 0;
i = get_insns ();
ofs = prev_in_use = 0;
i = get_insns ();
- if (GET_CODE (i) == NOTE)
i = next_nonnote_insn (i);
ldgp = alpha_function_needs_gp ? 8 : 0;
i = next_nonnote_insn (i);
ldgp = alpha_function_needs_gp ? 8 : 0;
next = (*next_group) (i, &in_use, &len);
/* When we see a label, resync alignment etc. */
next = (*next_group) (i, &in_use, &len);
/* When we see a label, resync alignment etc. */
- if (GET_CODE (i) == CODE_LABEL)
{
unsigned int new_align = 1 << label_to_alignment (i);
{
unsigned int new_align = 1 << label_to_alignment (i);
rtx prev, where;
where = prev = prev_nonnote_insn (i);
rtx prev, where;
where = prev = prev_nonnote_insn (i);
- if (!where || GET_CODE (where) != CODE_LABEL)
+ if (!where || !LABEL_P (where))
where = i;
/* Can't realign between a call and its gp reload. */
if (! (TARGET_EXPLICIT_RELOCS
where = i;
/* Can't realign between a call and its gp reload. */
if (! (TARGET_EXPLICIT_RELOCS
- && prev && GET_CODE (prev) == CALL_INSN))
+ && prev && CALL_P (prev)))
{
emit_insn_before (gen_realign (GEN_INT (new_log_align)), where);
align = 1 << new_log_align;
{
emit_insn_before (gen_realign (GEN_INT (new_log_align)), where);
align = 1 << new_log_align;
where = prev_nonnote_insn (i);
if (where)
{
where = prev_nonnote_insn (i);
if (where)
{
- if (GET_CODE (where) == CODE_LABEL)
{
rtx where2 = prev_nonnote_insn (where);
{
rtx where2 = prev_nonnote_insn (where);
- if (where2 && GET_CODE (where2) == JUMP_INSN)
+ if (where2 && JUMP_P (where2))
- else if (GET_CODE (where) == INSN)
+ else if (NONJUMP_INSN_P (where))
int len;
x = DECL_RTL (cfun->decl);
int len;
x = DECL_RTL (cfun->decl);
- gcc_assert (GET_CODE (x) == MEM);
+ gcc_assert (MEM_P (x));
x = XEXP (x, 0);
gcc_assert (GET_CODE (x) == SYMBOL_REF);
fnname = XSTR (x, 0);
x = XEXP (x, 0);
gcc_assert (GET_CODE (x) == SYMBOL_REF);
fnname = XSTR (x, 0);
registers can hold 64-bit integers as well, but not smaller values. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
registers can hold 64-bit integers as well, but not smaller values. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
- ((REGNO) >= 32 && (REGNO) <= 62 \
+ (IN_RANGE ((REGNO), 32, 62) \
? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
|| (MODE) == SCmode || (MODE) == DCmode \
: 1)
? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
|| (MODE) == SCmode || (MODE) == DCmode \
: 1)
: (REGNO) == 24 ? R24_REG \
: (REGNO) == 25 ? R25_REG \
: (REGNO) == 27 ? R27_REG \
: (REGNO) == 24 ? R24_REG \
: (REGNO) == 25 ? R25_REG \
: (REGNO) == 27 ? R27_REG \
- : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
+ : IN_RANGE ((REGNO), 32, 62) ? FLOAT_REGS \
: GENERAL_REGS)
/* The class value for index registers, and the one for base regs. */
: GENERAL_REGS)
/* The class value for index registers, and the one for base regs. */
On Alpha, these are $16-$21 and $f16-$f21. */
#define FUNCTION_ARG_REGNO_P(N) \
On Alpha, these are $16-$21 and $f16-$f21. */
#define FUNCTION_ARG_REGNO_P(N) \
- (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
+ (IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
\f
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
\f
/* Define a data type for recording info about an argument list
during the scan of that argument list. This data type should
symbolic addresses into registers. */
#define CONSTANT_ADDRESS_P(X) \
symbolic addresses into registers. */
#define CONSTANT_ADDRESS_P(X) \
- (GET_CODE (X) == CONST_INT \
&& (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
/* Include all constant integers and constant doubles, but not
&& (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
/* Include all constant integers and constant doubles, but not
#define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
do { \
if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
#define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
do { \
if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
- && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
+ && (REG_P (OP1) || (OP1) == const0_rtx)) \
{ \
rtx tem = (OP0); \
(OP0) = (OP1); \
{ \
rtx tem = (OP0); \
(OP0) = (OP1); \
(CODE) = swap_condition (CODE); \
} \
if (((CODE) == LT || (CODE) == LTU) \
(CODE) = swap_condition (CODE); \
} \
if (((CODE) == LT || (CODE) == LTU) \
- && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
+ && CONST_INT_P (OP1) && INTVAL (OP1) == 256) \
{ \
(CODE) = (CODE) == LT ? LE : LEU; \
(OP1) = GEN_INT (255); \
{ \
(CODE) = (CODE) == LT ? LE : LEU; \
(OP1) = GEN_INT (255); \
(match_operand:DI 2 "mul8_operand" "I"))
(match_operand:DI 3 "immediate_operand" "i")))]
"HOST_BITS_PER_WIDE_INT == 64
(match_operand:DI 2 "mul8_operand" "I"))
(match_operand:DI 3 "immediate_operand" "i")))]
"HOST_BITS_PER_WIDE_INT == 64
- && GET_CODE (operands[3]) == CONST_INT
+ && CONST_INT_P (operands[3])
&& (((unsigned HOST_WIDE_INT) 0xff << INTVAL (operands[2])
== (unsigned HOST_WIDE_INT) INTVAL (operands[3]))
|| ((unsigned HOST_WIDE_INT) 0xffff << INTVAL (operands[2])
&& (((unsigned HOST_WIDE_INT) 0xff << INTVAL (operands[2])
== (unsigned HOST_WIDE_INT) INTVAL (operands[3]))
|| ((unsigned HOST_WIDE_INT) 0xffff << INTVAL (operands[2])
register since that is more likely to match (and to produce better code
if both would). */
register since that is more likely to match (and to produce better code
if both would). */
- if (code == EQ && GET_CODE (operands[3]) == CONST_INT
+ if (code == EQ && CONST_INT_P (operands[3])
&& rtx_equal_p (operands[4], operands[3]))
operands[4] = operands[2];
&& rtx_equal_p (operands[4], operands[3]))
operands[4] = operands[2];
- else if (code == NE && GET_CODE (operands[3]) == CONST_INT
+ else if (code == NE && CONST_INT_P (operands[3])
&& rtx_equal_p (operands[5], operands[3]))
operands[5] = operands[2];
&& rtx_equal_p (operands[5], operands[3]))
operands[5] = operands[2];
|| (extended_count (operands[2], DImode, unsignedp) >= 1
&& extended_count (operands[3], DImode, unsignedp) >= 1))
{
|| (extended_count (operands[2], DImode, unsignedp) >= 1
&& extended_count (operands[3], DImode, unsignedp) >= 1))
{
- if (GET_CODE (operands[3]) == CONST_INT)
+ if (CONST_INT_P (operands[3]))
operands[7] = gen_rtx_PLUS (DImode, operands[2],
GEN_INT (- INTVAL (operands[3])));
else
operands[7] = gen_rtx_PLUS (DImode, operands[2],
GEN_INT (- INTVAL (operands[3])));
else
&& extended_count (operands[3], DImode, unsignedp) >= 1)))
FAIL;
&& extended_count (operands[3], DImode, unsignedp) >= 1)))
FAIL;
- if (GET_CODE (operands[3]) == CONST_INT)
+ if (CONST_INT_P (operands[3]))
tem = gen_rtx_PLUS (SImode, operands[2],
GEN_INT (- INTVAL (operands[3])));
else
tem = gen_rtx_PLUS (SImode, operands[2],
GEN_INT (- INTVAL (operands[3])));
else
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
- gcc_assert (GET_CODE (operands[0]) == MEM);
+ gcc_assert (MEM_P (operands[0]));
operands[0] = XEXP (operands[0], 0);
})
operands[0] = XEXP (operands[0], 0);
})
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[0]) == MEM);
+ gcc_assert (MEM_P (operands[0]));
operands[0] = XEXP (operands[0], 0);
if (! call_operand (operands[0], Pmode))
operands[0] = XEXP (operands[0], 0);
if (! call_operand (operands[0], Pmode))
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[0]) == MEM);
+ gcc_assert (MEM_P (operands[0]));
operands[0] = XEXP (operands[0], 0);
operands[0] = XEXP (operands[0], 0);
- if (GET_CODE (operands[0]) != SYMBOL_REF && GET_CODE (operands[0]) != REG)
+ if (GET_CODE (operands[0]) != SYMBOL_REF && !REG_P (operands[0]))
operands[0] = force_reg (DImode, operands[0]);
})
operands[0] = force_reg (DImode, operands[0]);
})
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[0]) == MEM);
+ gcc_assert (MEM_P (operands[0]));
/* Always load the address of the called function into a register;
load the CIW in $25. */
operands[0] = XEXP (operands[0], 0);
/* Always load the address of the called function into a register;
load the CIW in $25. */
operands[0] = XEXP (operands[0], 0);
- if (GET_CODE (operands[0]) != REG)
+ if (!REG_P (operands[0]))
operands[0] = force_reg (DImode, operands[0]);
emit_move_insn (gen_rtx_REG (DImode, 25), operands[1]);
operands[0] = force_reg (DImode, operands[0]);
emit_move_insn (gen_rtx_REG (DImode, 25), operands[1]);
(clobber (reg:DI 27))])]
""
{
(clobber (reg:DI 27))])]
""
{
- gcc_assert (GET_CODE (operands[0]) == MEM);
+ gcc_assert (MEM_P (operands[0]));
operands[0] = XEXP (operands[0], 0);
operands[0] = XEXP (operands[0], 0);
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
(unspec [(reg:DI 29)] UNSPEC_SIBCALL)])]
"TARGET_ABI_OSF"
{
- gcc_assert (GET_CODE (operands[1]) == MEM);
+ gcc_assert (MEM_P (operands[1]));
operands[1] = XEXP (operands[1], 0);
})
operands[1] = XEXP (operands[1], 0);
})
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[1]) == MEM);
+ gcc_assert (MEM_P (operands[1]));
operands[1] = XEXP (operands[1], 0);
if (! call_operand (operands[1], Pmode))
operands[1] = XEXP (operands[1], 0);
if (! call_operand (operands[1], Pmode))
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[1]) == MEM);
+ gcc_assert (MEM_P (operands[1]));
operands[1] = XEXP (operands[1], 0);
operands[1] = XEXP (operands[1], 0);
- if (GET_CODE (operands[1]) != SYMBOL_REF && GET_CODE (operands[1]) != REG)
+ if (GET_CODE (operands[1]) != SYMBOL_REF && !REG_P (operands[1]))
operands[1] = force_reg (DImode, operands[1]);
})
operands[1] = force_reg (DImode, operands[1]);
})
(clobber (reg:DI 27))])]
""
{
(clobber (reg:DI 27))])]
""
{
- gcc_assert (GET_CODE (operands[1]) == MEM);
+ gcc_assert (MEM_P (operands[1]));
operands[1] = XEXP (operands[1], 0);
operands[1] = XEXP (operands[1], 0);
(clobber (reg:DI 26))])]
""
{
(clobber (reg:DI 26))])]
""
{
- gcc_assert (GET_CODE (operands[1]) == MEM);
+ gcc_assert (MEM_P (operands[1]));
operands[1] = XEXP (operands[1], 0);
operands[1] = XEXP (operands[1], 0);
- if (GET_CODE (operands[1]) != REG)
+ if (!REG_P (operands[1]))
operands[1] = force_reg (DImode, operands[1]);
emit_move_insn (gen_rtx_REG (DImode, 25), operands[2]);
operands[1] = force_reg (DImode, operands[1]);
emit_move_insn (gen_rtx_REG (DImode, 25), operands[2]);
(match_operand:SF 1 "general_operand" ""))]
""
{
(match_operand:SF 1 "general_operand" ""))]
""
{
- if (GET_CODE (operands[0]) == MEM
+ if (MEM_P (operands[0])
&& ! reg_or_0_operand (operands[1], SFmode))
operands[1] = force_reg (SFmode, operands[1]);
})
&& ! reg_or_0_operand (operands[1], SFmode))
operands[1] = force_reg (SFmode, operands[1]);
})
(match_operand:DF 1 "general_operand" ""))]
""
{
(match_operand:DF 1 "general_operand" ""))]
""
{
- if (GET_CODE (operands[0]) == MEM
+ if (MEM_P (operands[0])
&& ! reg_or_0_operand (operands[1], DFmode))
operands[1] = force_reg (DFmode, operands[1]);
})
&& ! reg_or_0_operand (operands[1], DFmode))
operands[1] = force_reg (DFmode, operands[1]);
})
(match_operand:TF 1 "general_operand" ""))]
""
{
(match_operand:TF 1 "general_operand" ""))]
""
{
- if (GET_CODE (operands[0]) == MEM
+ if (MEM_P (operands[0])
&& ! reg_or_0_operand (operands[1], TFmode))
operands[1] = force_reg (TFmode, operands[1]);
})
&& ! reg_or_0_operand (operands[1], TFmode))
operands[1] = force_reg (TFmode, operands[1]);
})
(match_operand:TI 1 "general_operand" ""))]
""
{
(match_operand:TI 1 "general_operand" ""))]
""
{
- if (GET_CODE (operands[0]) == MEM
+ if (MEM_P (operands[0])
&& ! reg_or_0_operand (operands[1], TImode))
operands[1] = force_reg (TImode, operands[1]);
&& ! reg_or_0_operand (operands[1], TImode))
operands[1] = force_reg (TImode, operands[1]);
/* We must put 64-bit constants in memory. We could keep the
32-bit constants in TImode and rely on the splitter, but
this doesn't seem to be worth the pain. */
/* We must put 64-bit constants in memory. We could keep the
32-bit constants in TImode and rely on the splitter, but
this doesn't seem to be worth the pain. */
- else if (GET_CODE (operands[1]) == CONST_INT
+ else if (CONST_INT_P (operands[1])
|| GET_CODE (operands[1]) == CONST_DOUBLE)
{
rtx in[2], out[2], target;
|| GET_CODE (operands[1]) == CONST_DOUBLE)
{
rtx in[2], out[2], target;
emit_insn (gen_movdi (out[1], in[1]));
}
emit_insn (gen_movdi (out[1], in[1]));
}
- if (GET_CODE (operands[0]) != REG)
+ if (!REG_P (operands[0]))
target = gen_reg_rtx (TImode);
else
target = operands[0];
target = gen_reg_rtx (TImode);
else
target = operands[0];
rtx scratch3 = scratch1;
rtx seq;
rtx scratch3 = scratch1;
rtx seq;
- if (GET_CODE (addr) == REG)
scratch1 = addr;
seq = gen_unaligned_store<reloadmode> (addr, operands[1], scratch1,
scratch1 = addr;
seq = gen_unaligned_store<reloadmode> (addr, operands[1], scratch1,
/* From mips.md: extract_bit_field doesn't verify that our source
matches the predicate, so we force it to be a MEM here. */
/* From mips.md: extract_bit_field doesn't verify that our source
matches the predicate, so we force it to be a MEM here. */
- if (GET_CODE (operands[1]) != MEM)
+ if (!MEM_P (operands[1]))
FAIL;
/* The bit number is relative to the mode of operand 1 which is
FAIL;
/* The bit number is relative to the mode of operand 1 which is
&& INTVAL (operands[2]) != 64))
FAIL;
&& INTVAL (operands[2]) != 64))
FAIL;
- if (GET_CODE (operands[1]) == MEM)
+ if (MEM_P (operands[1]))
/* From mips.md: store_bit_field doesn't verify that our source
matches the predicate, so we force it to be a MEM here. */
/* From mips.md: store_bit_field doesn't verify that our source
matches the predicate, so we force it to be a MEM here. */
- if (GET_CODE (operands[0]) != MEM)
+ if (!MEM_P (operands[0]))
FAIL;
/* The bit number is relative to the mode of operand 1 which is
FAIL;
/* The bit number is relative to the mode of operand 1 which is
- if (GET_CODE (operands[1]) == CONST_INT
+ if (CONST_INT_P (operands[1])
&& INTVAL (operands[1]) < 32768)
{
if (INTVAL (operands[1]) >= 4096)
&& INTVAL (operands[1]) < 32768)
{
if (INTVAL (operands[1]) >= 4096)
force_reg (Pmode, operands[1])));
emit_insn (gen_adddi3 (tmp, stack_pointer_rtx, GEN_INT (-4096)));
force_reg (Pmode, operands[1])));
emit_insn (gen_adddi3 (tmp, stack_pointer_rtx, GEN_INT (-4096)));
- if (GET_CODE (operands[1]) != CONST_INT)
+ if (!CONST_INT_P (operands[1]))
{
out_label = gen_label_rtx ();
emit_insn (gen_cmpdi (want, tmp));
{
out_label = gen_label_rtx ();
emit_insn (gen_cmpdi (want, tmp));
(match_operand:DI 1 "reg_or_cint_operand" "")))]
""
{
(match_operand:DI 1 "reg_or_cint_operand" "")))]
""
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
rtx mask = alpha_expand_zap_mask (INTVAL (operands[2]));
{
rtx mask = alpha_expand_zap_mask (INTVAL (operands[2]));
[(const_int 0)]
{
rtx mask = alpha_expand_zap_mask (INTVAL (operands[2]));
[(const_int 0)]
{
rtx mask = alpha_expand_zap_mask (INTVAL (operands[2]));
- if (HOST_BITS_PER_WIDE_INT >= 64 || GET_CODE (mask) == CONST_INT)
+ if (HOST_BITS_PER_WIDE_INT >= 64 || CONST_INT_P (mask))
operands[1] = gen_int_mode (INTVAL (operands[1]) & INTVAL (mask), DImode);
else
{
operands[1] = gen_int_mode (INTVAL (operands[1]) & INTVAL (mask), DImode);
else
{
(match_operand:DI 1 "reg_or_cint_operand" "")))]
""
{
(match_operand:DI 1 "reg_or_cint_operand" "")))]
""
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
rtx mask = alpha_expand_zap_mask (~ INTVAL (operands[2]));
{
rtx mask = alpha_expand_zap_mask (~ INTVAL (operands[2]));
(define_constraint "I"
"An unsigned 8 bit constant"
(and (match_code "const_int")
(define_constraint "I"
"An unsigned 8 bit constant"
(and (match_code "const_int")
- (match_test "ival >= 0 && ival <= 255")))
+ (match_test "IN_RANGE (ival, 0, 255)")))
(define_constraint "J"
"The constant zero"
(define_constraint "J"
"The constant zero"
(define_constraint "K"
"Signed 16-bit integer constant"
(and (match_code "const_int")
(define_constraint "K"
"Signed 16-bit integer constant"
(and (match_code "const_int")
- (match_test "ival >= -32768 && ival < 32768 ")))
+ (match_test "IN_RANGE (ival, -32768, 32767)")))
(define_constraint "L"
"A shifted signed 16-bit constant appropriate for LDAH"
(define_constraint "L"
"A shifted signed 16-bit constant appropriate for LDAH"
(define_constraint "N"
"A complemented unsigned 8-bit constant"
(and (match_code "const_int")
(define_constraint "N"
"A complemented unsigned 8-bit constant"
(and (match_code "const_int")
- (match_test "~ival >= 0 && ~ival <= 255")))
+ (match_test "IN_RANGE (~ival, 0, 255)")))
(define_constraint "O"
"A negated unsigned 8-bit constant"
(and (match_code "const_int")
(define_constraint "O"
"A negated unsigned 8-bit constant"
(and (match_code "const_int")
- (match_test "-ival >= 0 && -ival <= 255")))
+ (match_test "IN_RANGE (-ival, 0, 255)")))
(define_constraint "P"
"The constant 1, 2 or 3"
(define_constraint "P"
"The constant 1, 2 or 3"
(define_constraint "S"
"An unsigned 6-bit constant"
(and (match_code "const_int")
(define_constraint "S"
"An unsigned 6-bit constant"
(and (match_code "const_int")
- (match_test "ival >= 0 && ival <= 63")))
+ (match_test "IN_RANGE (ival, 0, 63)")))
(define_constraint "T"
"@internal A high-part symbol"
(define_constraint "T"
"@internal A high-part symbol"
(define_predicate "mode_mask_operand"
(match_code "const_int,const_double")
{
(define_predicate "mode_mask_operand"
(match_code "const_int,const_double")
{
- if (GET_CODE (op) == CONST_INT)
{
HOST_WIDE_INT value = INTVAL (op);
{
HOST_WIDE_INT value = INTVAL (op);
{
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
{
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
- && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) == LABEL_REF)
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) == LABEL_REF)
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
- && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) != SYMBOL_REF)
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) != SYMBOL_REF)
{
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
{
if (GET_CODE (op) == CONST
&& GET_CODE (XEXP (op, 0)) == PLUS
- && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
+ && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) != SYMBOL_REF)
op = XEXP (XEXP (op, 0), 0);
if (GET_CODE (op) != SYMBOL_REF)
(match_test "GET_CODE (XEXP (op,0)) == PLUS
&& (GET_CODE (XEXP (XEXP (op,0), 0)) == SYMBOL_REF
|| GET_CODE (XEXP (XEXP (op,0), 0)) == LABEL_REF)
(match_test "GET_CODE (XEXP (op,0)) == PLUS
&& (GET_CODE (XEXP (XEXP (op,0), 0)) == SYMBOL_REF
|| GET_CODE (XEXP (XEXP (op,0), 0)) == LABEL_REF)
- && GET_CODE (XEXP (XEXP (op,0), 1)) == CONST_INT"))))
+ && CONST_INT_P (XEXP (XEXP (op,0), 1))"))))
;; Return true if OP is valid for 16-bit DTP relative relocations.
(define_predicate "dtp16_symbolic_operand"
;; Return true if OP is valid for 16-bit DTP relative relocations.
(define_predicate "dtp16_symbolic_operand"
base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
}
base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
}
- return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
+ return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
})
;; Similar, but return 1 if OP is a MEM which is not alignable.
})
;; Similar, but return 1 if OP is a MEM which is not alignable.
base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
}
base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
}
- return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
+ return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
})
;; Return 1 if OP is any memory location. During reload a pseudo matches.
})
;; Return 1 if OP is any memory location. During reload a pseudo matches.
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