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2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 21 May 2008 16:56:14 +0000 (16:56 +0000)
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 21 May 2008 16:56:14 +0000 (16:56 +0000)
* config/i386/sse.md (vec_initv4sf): Removed.
(vec_initv2df): Likewise.
(vec_initv2di): Likewise.
(vec_initv4si): Likewise.
(vec_initv8hi): Likewise.
(vec_initv16qi): Likewise.
(vec_init<mode>): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@135724 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/i386/sse.md

index 1d13768..b686fe5 100644 (file)
@@ -1,3 +1,13 @@
+2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/i386/sse.md (vec_initv4sf): Removed.
+       (vec_initv2df): Likewise.
+       (vec_initv2di): Likewise.
+       (vec_initv4si): Likewise.
+       (vec_initv8hi): Likewise.
+       (vec_initv16qi): Likewise.
+       (vec_init<mode>): New.
+
 2008-05-21  Joseph Myers  <joseph@codesourcery.com>
 
        * collect2.c (find_a_file): Use IS_ABSOLUTE_PATH.
index f767dda..b2aba51 100644 (file)
   [(set_attr "type" "ssemov")
    (set_attr "mode" "V4SF,V2SF")])
 
-(define_expand "vec_initv4sf"
-  [(match_operand:V4SF 0 "register_operand" "")
+(define_expand "vec_init<mode>"
+  [(match_operand:SSEMODE 0 "register_operand" "")
    (match_operand 1 "" "")]
   "TARGET_SSE"
 {
   DONE;
 })
 
-(define_expand "vec_initv2df"
-  [(match_operand:V2DF 0 "register_operand" "")
-   (match_operand 1 "" "")]
-  "TARGET_SSE"
-{
-  ix86_expand_vector_init (false, operands[0], operands[1]);
-  DONE;
-})
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
 ;; Parallel integral arithmetic
   DONE;
 })
 
-(define_expand "vec_initv2di"
-  [(match_operand:V2DI 0 "register_operand" "")
-   (match_operand 1 "" "")]
-  "TARGET_SSE"
-{
-  ix86_expand_vector_init (false, operands[0], operands[1]);
-  DONE;
-})
-
 (define_expand "vec_setv4si"
   [(match_operand:V4SI 0 "register_operand" "")
    (match_operand:SI 1 "register_operand" "")
   DONE;
 })
 
-(define_expand "vec_initv4si"
-  [(match_operand:V4SI 0 "register_operand" "")
-   (match_operand 1 "" "")]
-  "TARGET_SSE"
-{
-  ix86_expand_vector_init (false, operands[0], operands[1]);
-  DONE;
-})
-
 (define_expand "vec_setv8hi"
   [(match_operand:V8HI 0 "register_operand" "")
    (match_operand:HI 1 "register_operand" "")
   DONE;
 })
 
-(define_expand "vec_initv8hi"
-  [(match_operand:V8HI 0 "register_operand" "")
-   (match_operand 1 "" "")]
-  "TARGET_SSE"
-{
-  ix86_expand_vector_init (false, operands[0], operands[1]);
-  DONE;
-})
-
 (define_expand "vec_setv16qi"
   [(match_operand:V16QI 0 "register_operand" "")
    (match_operand:QI 1 "register_operand" "")
   DONE;
 })
 
-(define_expand "vec_initv16qi"
-  [(match_operand:V16QI 0 "register_operand" "")
-   (match_operand 1 "" "")]
-  "TARGET_SSE"
-{
-  ix86_expand_vector_init (false, operands[0], operands[1]);
-  DONE;
-})
-
 (define_expand "vec_unpacku_hi_v16qi"
   [(match_operand:V8HI 0 "register_operand" "")
    (match_operand:V16QI 1 "register_operand" "")]