* config/i386/i386.c (ix86_expand_copysign): Force non-zero constant

	TFmode op0 to register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@135025 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2a12ec1..f35a21b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-08  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_expand_copysign): Force non-zero constant
+       TFmode op0 to register.
+

 2008-05-07  Alan Modra  <amodra@bigpond.net.au>
 
        * c-decl.c (grokdeclarator): Comment typo.
 2008-05-07  Alan Modra  <amodra@bigpond.net.au>
 
        * c-decl.c (grokdeclarator): Comment typo.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d0ebd80..b123fa0 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11245,7 +11245,7 @@ ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode,
 void
 ix86_expand_copysign (rtx operands[])
 {
 void
 ix86_expand_copysign (rtx operands[])
 {

-  enum machine_mode mode, vmode;
+  enum machine_mode mode;

   rtx dest, op0, op1, mask, nmask;
 
   dest = operands[0];
   rtx dest, op0, op1, mask, nmask;
 
   dest = operands[0];


@@ -11253,7 +11253,6 @@ ix86_expand_copysign (rtx operands[])
   op1 = operands[2];
 
   mode = GET_MODE (dest);
   op1 = operands[2];
 
   mode = GET_MODE (dest);

-  vmode = mode == SFmode ? V4SFmode : V2DFmode;

 
   if (GET_CODE (op0) == CONST_DOUBLE)
     {
 
   if (GET_CODE (op0) == CONST_DOUBLE)
     {


@@ -11264,6 +11263,10 @@ ix86_expand_copysign (rtx operands[])
 
       if (mode == SFmode || mode == DFmode)
        {
 
       if (mode == SFmode || mode == DFmode)
        {

+         enum machine_mode vmode;
+
+         vmode = mode == SFmode ? V4SFmode : V2DFmode;
+

          if (op0 == CONST0_RTX (mode))
            op0 = CONST0_RTX (vmode);
          else
          if (op0 == CONST0_RTX (mode))
            op0 = CONST0_RTX (vmode);
          else


@@ -11275,9 +11278,12 @@ ix86_expand_copysign (rtx operands[])
                               CONST0_RTX (SFmode), CONST0_RTX (SFmode));
              else
                v = gen_rtvec (2, op0, CONST0_RTX (DFmode));
                               CONST0_RTX (SFmode), CONST0_RTX (SFmode));
              else
                v = gen_rtvec (2, op0, CONST0_RTX (DFmode));

+

              op0 = force_reg (vmode, gen_rtx_CONST_VECTOR (vmode, v));
            }
        }
              op0 = force_reg (vmode, gen_rtx_CONST_VECTOR (vmode, v));
            }
        }

+      else if (op0 != CONST0_RTX (mode))
+       op0 = force_reg (mode, op0);

 
       mask = ix86_build_signbit_mask (mode, 0, 0);
 
 
       mask = ix86_build_signbit_mask (mode, 0, 0);