Backport from mainline

	2012-01-17  Uros Bizjak  <ubizjak@gmail.com>

	PR target/55981
	* config/i386/sync.md (atomic_store<mode>): Generate SWImode
	store through atomic_store<mode>_1.
	(atomic_store<mode>_1): Macroize insn using SWI mode iterator.

testsuite/ChangeLog:

	Backport from mainline
	2012-01-17  Uros Bizjak  <ubizjak@gmail.com>

	PR target/55981
	* gcc.target/pr55981.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@195283 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6ab7604..778e7d5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2012-01-17  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2012-01-17  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/55981
+       * config/i386/sync.md (atomic_store<mode>): Generate SWImode
+       store through atomic_store<mode>_1.
+       (atomic_store<mode>_1): Macroize insn using SWI mode iterator.
+
 2013-01-16  Richard Biener  <rguenther@suse.de>
 
        PR middle-end/55882

diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index a58a1b9..fa3281a 100644 (file)
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -223,8 +223,9 @@
          DONE;
        }
 
-      /* Otherwise use a normal store.  */
-      emit_move_insn (operands[0], operands[1]);
+      /* Otherwise use a store.  */
+      emit_insn (gen_atomic_store<mode>_1 (operands[0], operands[1],
+                                          operands[2]));
     }
   /* ... followed by an MFENCE, if required.  */
   if (model == MEMMODEL_SEQ_CST)
@@ -232,6 +233,14 @@
   DONE;
 })
 
+(define_insn "atomic_store<mode>_1"
+  [(set (match_operand:SWI 0 "memory_operand" "=m")
+       (unspec:SWI [(match_operand:SWI 1 "<nonmemory_operand>" "<r><i>")
+                    (match_operand:SI 2 "const_int_operand")]
+                   UNSPEC_MOVA))]
+  ""
+  "mov{<imodesuffix>}\t{%1, %0|%0, %1}")
+
 (define_insn_and_split "atomic_storedi_fpu"
   [(set (match_operand:DI 0 "memory_operand" "=m,m,m")
        (unspec:DI [(match_operand:DI 1 "register_operand" "x,m,?r")]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 667adb9..d540f70 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2012-01-17  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2012-01-17  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/55981
+       * gcc.target/pr55981.c: New test.
+
 2013-01-17  Janus Weil  <janus@gcc.gnu.org>
 
        PR fortran/55983

diff --git a/gcc/testsuite/gcc.target/pr55981.c b/gcc/testsuite/gcc.target/pr55981.c
new file mode 100644 (file)
index 0000000..36498d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/pr55981.c
@@ -0,0 +1,54 @@
+/* { dg-do compile  { target { ! { ia32 } } } } */
+/* { dg-options "-O2" } */
+
+volatile int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p;
+
+volatile long long y;
+
+void
+test ()
+{
+  int a_ = a;
+  int b_ = b;
+  int c_ = c;
+  int d_ = d;
+  int e_ = e;
+  int f_ = f;
+  int g_ = g;
+  int h_ = h;
+  int i_ = i;
+  int j_ = j;
+  int k_ = k;
+  int l_ = l;
+  int m_ = m;
+  int n_ = n;
+  int o_ = o;
+  int p_ = p;
+
+  int z;
+
+  for (z = 0; z < 1000; z++)
+    {
+      __atomic_store_n (&y, 0x100000002ll, __ATOMIC_SEQ_CST);
+      __atomic_store_n (&y, 0x300000004ll, __ATOMIC_SEQ_CST);
+    }
+
+  a = a_;
+  b = b_;
+  c = c_;
+  d = d_;
+  e = e_;
+  f = f_;
+  g = g_;
+  h = h_;
+  i = i_;
+  j = j_;
+  k = k_;
+  l = l_;
+  m = m_;
+  n = n_;
+  o = o_;
+  p = p_;
+}
+
+/* { dg-final { scan-assembler-times "movabs" 2 } } */