200x-xx-xx Sandra Loosemore <sandra@codesourcery.com>
* longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
ColdFire alternatives.
* config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
* config/m68k/m68k.md (clzsi2): Define for ColdFire
architectures that support ff1 instruction.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@120959
138bc75d-0d04-0410-961f-
82ee72b054a4
+2007-01-19 Sandra Loosemore <sandra@codesourcery.com>
+
+ * longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
+ ColdFire alternatives.
+ * config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
+ * config/m68k/m68k.md (clzsi2): Define for ColdFire
+ architectures that support ff1 instruction.
+
2007-01-19 Richard Sandiford <richard@codesourcery.com>
Julian Brown <julian@codesourcery.com>
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
+/* The ColdFire FF1 instruction returns 32 for zero. */
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
+
#define STORE_FLAG_VALUE (-1)
#define Pmode SImode
return "f<FP:prec>abs%.<FP:prec> %1,%0";
})
\f
+;; bit indexing instructions
+
+;; ColdFire ff1 instruction implements clz.
+(define_insn "clzsi2"
+ [(set (match_operand:SI 0 "register_operand" "=d")
+ (clz:SI (match_operand:SI 1 "register_operand" "0")))]
+ "TARGET_ISAAPLUS || TARGET_ISAC"
+ "ff1 %0")
+\f
;; one complement instructions
;; "one_cmpldi2" is mainly here to help combine().
__asm__ ("bfffo %1{%b2:%b2},%0" \
: "=d" ((USItype) (count)) \
: "od" ((USItype) (x)), "n" (0))
+/* Some ColdFire architectures have a ff1 instruction supported via
+ __builtin_clz. */
+#elif defined (__mcfisaaplus__) || defined (__mcfisac__)
+#define count_leading_zeros(count,x) ((count) = __builtin_clz (x))
+#define COUNT_LEADING_ZEROS_0 32
#endif
#endif /* mc68000 */