OSDN Git Service

* config/i386/i386.c (ix86_build_signbit_mask): Generate TImode and
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 1 Jul 2008 16:13:40 +0000 (16:13 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 1 Jul 2008 16:13:40 +0000 (16:13 +0000)
TFmode constants via two element DImode vector for hosts with
HOST_BITS_PER_WIDE_INT < 64.
(ix86_init_builtins): Define __builtin_fabsq and __builtin_copysignq
also for HOST_BITS_PER_WIDE_INT < 64.

testsuite/ChangeLog:

* gcc.target/i386/quad-sse.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@137322 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/quad-sse.c [new file with mode: 0644]

index 7d1daef..24766f8 100644 (file)
@@ -1,3 +1,11 @@
+2008-07-01  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_build_signbit_mask): Generate TImode and
+       TFmode constants via two element DImode vector for hosts with
+       HOST_BITS_PER_WIDE_INT < 64.
+       (ix86_init_builtins): Define __builtin_fabsq and __builtin_copysignq
+       also for HOST_BITS_PER_WIDE_INT < 64.
+
 2008-07-01  Richard Guenther  <rguenther@suse.de>
 
        PR tree-optimization/36666
@@ -14,8 +22,7 @@
        if the results address is not taken.
        (do_deref): Use get_constraint_exp_for_temp.
        (get_constraint_for_1): Rename from ...
-       (get_constraint_for): ... this.  Add the old function as
-       wrapper.
+       (get_constraint_for): ... this.  Add the old function as wrapper.
        (do_structure_copy): Use get_constraint_for_1.
 
 2008-07-01  Martin Jambor  <mjambor@suse.cz>
        * config/darwin-driver.c (darwin_default_min_version): Fix
        -Wc++-compat warnings.
 
-2008-06-30 Uros Bizjak  <ubizjak@gmail.com>
+2008-06-30  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.md (*movti_rex64): Add "!" to "r" constraint
        of operand 0.
 
 2008-06-30  Kenneth Zadeck <zadeck@naturalbridge.com>
 
-       * ifcvt.c (cond_move_process_if_block): Free vectors on false
-       return.
+       * ifcvt.c (cond_move_process_if_block): Free vectors on false return.
        
 2008-06-30  Kenneth Zadeck <zadeck@naturalbridge.com>
 
        PR rtl-optimization/34744
-       * df-scan.c (df_scan_free_ref_vec, df_scan_free_mws_vec): New
-       macros.
+       * df-scan.c (df_scan_free_ref_vec, df_scan_free_mws_vec): New macros.
                (df_scan_free_internal): Free data structures not
        allocated in storage pools.
        (df_mw_hardreg_chain_delete_eq_uses): Use df_scan_free_mws_vec.
-       (df_refs_add_to_chains): Use df_scan_free_ref_vec and 
+       (df_refs_add_to_chains): Use df_scan_free_ref_vec and
        df_scan_free_mws_vec.
        * dse.c (dse_step6): Free offset_map_p and offset_map_n
        unconditionally.
        * doc/rtl.texi (const_vector): Document const_fixed as legitimate
        element type of const_vector.
 
-2008-06-28 Uros Bizjak  <ubizjak@gmail.com>
+2008-06-28  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.md (addti3, adddi3, addsi3, addhi3, addqi3):
        Remove FLAGS_REG clobber from expander pattern.
        (init_one_libfunc): Reuse decls and SYMBOL_REFs when asked
        for the same function twice.
 
-2008-06-27 Uros Bizjak  <ubizjak@gmail.com>
+2008-06-27  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.md (ashlti3, ashrti3, lshrti3): Expand using
        ix86_expand_binary_operator directly.
        have_similar_memory_accesses_1, ref_base_address_1): Likewise.
        * tree-ssa-phiopt.c (name_to_bb_hash): Likewise.
 
-2008-06-25 Uros Bizjak  <ubizjak@gmail.com>
+2008-06-25  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/36627
        * config/i386/i386.md : Change constraints of HImode and QImode
        * config/vax/vaxv.h: Remove.
        * config/windiss.h: Remove.
 
-2008-06-06 Uros Bizjak <ubizjak@gmail.com>
+2008-06-06  Uros Bizjak <ubizjak@gmail.com>
 
        PR rtl-optimization/36438
        * cse.c (fold_rtx) [ASHIFT, LSHIFTRT, ASHIFTRT]: Break out early
index 2edeec0..5a2c0c8 100644 (file)
@@ -11330,10 +11330,35 @@ ix86_build_signbit_mask (enum machine_mode mode, bool vect, bool invert)
 
     case TImode:
     case TFmode:
-      imode = TImode;
       vec_mode = VOIDmode;
-      gcc_assert (HOST_BITS_PER_WIDE_INT >= 64);
-      lo = 0, hi = (HOST_WIDE_INT)1 << shift;
+      if (HOST_BITS_PER_WIDE_INT >= 64)
+       {
+         imode = TImode;
+         lo = 0, hi = (HOST_WIDE_INT)1 << shift;
+       }
+      else
+       {
+         rtvec vec;
+
+         imode = DImode;
+         lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT);
+
+         if (invert)
+           {
+             lo = ~lo, hi = ~hi;
+             v = constm1_rtx;
+           }
+         else
+           v = const0_rtx;
+
+         mask = immed_double_const (lo, hi, imode);
+
+         vec = gen_rtvec (2, v, mask);
+         v = gen_rtx_CONST_VECTOR (V2DImode, vec);
+         v = copy_to_mode_reg (mode, gen_lowpart (mode, v));
+
+         return v;
+       }
      break;
 
     default:
@@ -20222,20 +20247,16 @@ ix86_init_builtins (void)
                               NULL, NULL_TREE);
   ix86_builtins[(int) IX86_BUILTIN_INFQ] = decl;
 
-  if (HOST_BITS_PER_WIDE_INT >= 64)
-    {
-      /* Those builtins need TImode to compile.  */
-      ftype = build_function_type_list (float128_type_node,
-                                       float128_type_node,
-                                       NULL_TREE);
-      def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ);
+  ftype = build_function_type_list (float128_type_node,
+                                   float128_type_node,
+                                   NULL_TREE);
+  def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ);
 
-      ftype = build_function_type_list (float128_type_node,
-                                       float128_type_node,
-                                       float128_type_node,
-                                       NULL_TREE);
-      def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_copysignq", ftype, IX86_BUILTIN_COPYSIGNQ);
-    }
+  ftype = build_function_type_list (float128_type_node,
+                                   float128_type_node,
+                                   float128_type_node,
+                                   NULL_TREE);
+  def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_copysignq", ftype, IX86_BUILTIN_COPYSIGNQ);
 
   if (TARGET_MMX)
     ix86_init_mmx_sse_builtins ();
index e74fb52..0d48ea9 100644 (file)
@@ -1,3 +1,7 @@
+2008-07-01  Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/quad-sse.c: New test.
+
 2008-07-01  Richard Guenther  <rguenther@suse.de>
 
        PR tree-optimization/36666
@@ -12,7 +16,7 @@
        PR target/36598
        * gcc.dg/memcpy-1.c: Mark test XFAIL for avr target.
 
-2008-06-30 Uros Bizjak  <ubizjak@gmail.com>
+2008-06-30  Uros Bizjak  <ubizjak@gmail.com>
 
        * gcc.target/i386/movti.c: New test.
 
diff --git a/gcc/testsuite/gcc.target/i386/quad-sse.c b/gcc/testsuite/gcc.target/i386/quad-sse.c
new file mode 100644 (file)
index 0000000..fed6112
--- /dev/null
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+__float128 x, y;
+
+__float128 test_1(void)
+{
+  return -x;
+}
+
+__float128 test_2(void)
+{
+  return __builtin_fabsq (x);
+}
+
+__float128 test_3(void)
+{
+  return __builtin_copysignq (x, y);
+}
+
+/* { dg-final { scan-assembler-not "call" } } */