PR target/52736

	* config/i386/sse.md (sse2_loadlpd splitter): Use offset 0
	instead of 8 in adjust_address.

	* gcc.target/i386/pr52736.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@185905 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 074faa4..e9d624f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-03-28  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/52736
+       * config/i386/sse.md (sse2_loadlpd splitter): Use offset 0
+       instead of 8 in adjust_address.
+
 2012-03-27  Eric Botcazou  <ebotcazou@adacore.com>
 
        * expmed.c (store_bit_field): Assert that BITREGION_START is a multiple

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4afc4b3..d6b87a1 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4890,7 +4890,7 @@
          (vec_select:DF (match_dup 0) (parallel [(const_int 1)]))))]
   "TARGET_SSE2 && reload_completed"
   [(set (match_dup 0) (match_dup 1))]
-  "operands[0] = adjust_address (operands[0], DFmode, 8);")
+  "operands[0] = adjust_address (operands[0], DFmode, 0);")
 
 (define_insn "sse2_movsd"
   [(set (match_operand:V2DF 0 "nonimmediate_operand"   "=x,x,x,x,m,x,x,x,o")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8f35977..cdc131f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-03-28  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/52736
+       * gcc.target/i386/pr52736.c: New test.
+
 2012-03-27  Richard Guenther  <rguenther@suse.de>
 
        PR middle-end/52720

diff --git a/gcc/testsuite/gcc.target/i386/pr52736.c b/gcc/testsuite/gcc.target/i386/pr52736.c
new file mode 100644 (file)
index 0000000..f35c1fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr52736.c
@@ -0,0 +1,29 @@
+/* PR target/52736 */
+/* { dg-do run } */
+/* { dg-options "-O1 -msse2" } */
+/* { dg-require-effective-target sse2_runtime } */
+
+#include <x86intrin.h>
+
+typedef double D __attribute__((may_alias));
+__attribute__((aligned(16))) static const double r[4] = { 1., 5., 1., 3. };
+
+__attribute__((noinline, noclone))
+void
+foo (int x)
+{
+  asm volatile ("" : "+g" (x) : : "memory");
+  if (x != 3)
+    __builtin_abort ();
+}
+
+int
+main ()
+{
+  __m128d t = _mm_set1_pd (5.);
+  ((D *)(&t))[0] = 1.;
+  foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[0]))));
+  ((D *)(&t))[1] = 3.;
+  foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[2]))));
+  return 0;
+}