* config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add

	the implied StoreLoad barrier for atomic operations if before.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@201452 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cca738f..3ebc9e5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-08-02  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add
+       the implied StoreLoad barrier for atomic operations if before.
+

 2013-07-11  Georg-Johann Lay  <avr@gjlay.de>
 
        Backport from 2013-07-11 trunk r200901.
 2013-07-11  Georg-Johann Lay  <avr@gjlay.de>
 
        Backport from 2013-07-11 trunk r200901.

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 4f8e96f..8946b30 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -10929,6 +10929,11 @@ sparc_emit_membar_for_model (enum memmodel model,
       /* Total Store Ordering: all memory transactions with store semantics
         are followed by an implied StoreStore.  */
       implied |= StoreStore;
       /* Total Store Ordering: all memory transactions with store semantics
         are followed by an implied StoreStore.  */
       implied |= StoreStore;

+
+      /* If we're not looking for a raw barrer (before+after), then atomic
+        operations get the benefit of being both load and store.  */
+      if (load_store == 3 && before_after == 1)
+       implied |= StoreLoad;

       /* FALLTHRU */
 
     case SMM_PSO:
       /* FALLTHRU */
 
     case SMM_PSO: