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* config/i386/i386.md (int_cond): New code iterator.
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 12 Mar 2008 21:30:21 +0000 (21:30 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 12 Mar 2008 21:30:21 +0000 (21:30 +0000)
        (fp_cond): Ditto.
        ("s<code>"): Macroize expander from seq, sne, sgt, sgtu, slt, sltu,
        sge, sgeu, sle and sleu expanders usign int_cond code iterator.
        ("s<code>"): Macroize expander from sunordered, sordered, suneq, sunge,
        sungt, sunle, sunlt and sltgt expanders usign fp_cond code iterator.
        ("b<code>"): Macroize expander from beq, bne, bgt, bgtu, blt, bltu,
        bge, bgeu, ble and bleu expanders usign int_cond code iterator.
        ("b<code>"): Macroize expander from bunordered, bordered, buneq, bunge,
        bungt, bunle, bunlt and bltgt expanders usign fp_cond code iterator.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@133150 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/i386/i386.md

index 4bdbd1b..618cb8e 100644 (file)
@@ -1,3 +1,16 @@
+2008-03-12  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (int_cond): New code iterator.
+       (fp_cond): Ditto.
+       ("s<code>"): Macroize expander from seq, sne, sgt, sgtu, slt, sltu,
+       sge, sgeu, sle and sleu expanders usign int_cond code iterator.
+       ("s<code>"): Macroize expander from sunordered, sordered, suneq, sunge,
+       sungt, sunle, sunlt and sltgt expanders usign fp_cond code iterator.
+       ("b<code>"): Macroize expander from beq, bne, bgt, bgtu, blt, bltu,
+       bge, bgeu, ble and bleu expanders usign int_cond code iterator.
+       ("b<code>"): Macroize expander from bunordered, bordered, buneq, bunge,
+       bungt, bunle, bunlt and bltgt expanders usign fp_cond code iterator.
+
 2008-03-12  Paul Brook  <paul@codesourcery.com>
 
        * config/arm/arm.c (use_return_insn): Use offsets->saved_regs_mask
index 17e974d..4d4978d 100644 (file)
   [(set_attr "length" "128")
    (set_attr "type" "multi")])
 
+;; All integer comparison codes.
+(define_code_iterator int_cond [ne eq ge gt le lt geu gtu leu ltu ])
+
+;; All floating-point comparison codes.
+(define_code_iterator fp_cond [unordered ordered
+                              uneq unge ungt unle unlt ltgt ])
+
 (define_code_iterator plusminus [plus minus])
 
 ;; Base name for define_insn and insn mnemonic.
 ;; to avoid partial register stalls.  Otherwise do things the setcc+movzx
 ;; way, which can later delete the movzx if only QImode is needed.
 
-(define_expand "seq"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (eq:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (EQ, operands[0])) DONE; else FAIL;")
-
-(define_expand "sne"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (ne:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (NE, operands[0])) DONE; else FAIL;")
-
-(define_expand "sgt"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (gt:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (GT, operands[0])) DONE; else FAIL;")
-
-(define_expand "sgtu"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (gtu:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (GTU, operands[0])) DONE; else FAIL;")
-
-(define_expand "slt"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (lt:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (LT, operands[0])) DONE; else FAIL;")
-
-(define_expand "sltu"
+(define_expand "s<code>"
   [(set (match_operand:QI 0 "register_operand" "")
-        (ltu:QI (reg:CC FLAGS_REG) (const_int 0)))]
+        (int_cond:QI (reg:CC FLAGS_REG) (const_int 0)))]
   ""
-  "if (ix86_expand_setcc (LTU, operands[0])) DONE; else FAIL;")
-
-(define_expand "sge"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (ge:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (GE, operands[0])) DONE; else FAIL;")
-
-(define_expand "sgeu"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (geu:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (GEU, operands[0])) DONE; else FAIL;")
-
-(define_expand "sle"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (le:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (LE, operands[0])) DONE; else FAIL;")
-
-(define_expand "sleu"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (leu:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  ""
-  "if (ix86_expand_setcc (LEU, operands[0])) DONE; else FAIL;")
-
-(define_expand "sunordered"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (unordered:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNORDERED, operands[0])) DONE; else FAIL;")
-
-(define_expand "sordered"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (ordered:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387"
-  "if (ix86_expand_setcc (ORDERED, operands[0])) DONE; else FAIL;")
-
-(define_expand "suneq"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (uneq:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNEQ, operands[0])) DONE; else FAIL;")
-
-(define_expand "sunge"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (unge:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNGE, operands[0])) DONE; else FAIL;")
-
-(define_expand "sungt"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (ungt:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNGT, operands[0])) DONE; else FAIL;")
-
-(define_expand "sunle"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (unle:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNLE, operands[0])) DONE; else FAIL;")
-
-(define_expand "sunlt"
-  [(set (match_operand:QI 0 "register_operand" "")
-        (unlt:QI (reg:CC FLAGS_REG) (const_int 0)))]
-  "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (UNLT, operands[0])) DONE; else FAIL;")
+  "if (ix86_expand_setcc (<CODE>, operands[0])) DONE; else FAIL;")
 
-(define_expand "sltgt"
+(define_expand "s<code>"
   [(set (match_operand:QI 0 "register_operand" "")
-        (ltgt:QI (reg:CC FLAGS_REG) (const_int 0)))]
+        (fp_cond:QI (reg:CC FLAGS_REG) (const_int 0)))]
   "TARGET_80387 || TARGET_SSE"
-  "if (ix86_expand_setcc (LTGT, operands[0])) DONE; else FAIL;")
+  "if (ix86_expand_setcc (<CODE>, operands[0])) DONE; else FAIL;")
 
 (define_insn "*setcc_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
 ;; For all bCOND expanders, also expand the compare or test insn that
 ;; generates reg FLAGS_REG.  Generate an equality comparison if `beq' or `bne'.
 
-(define_expand "beq"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (EQ, operands[0]); DONE;")
-
-(define_expand "bne"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (NE, operands[0]); DONE;")
-
-(define_expand "bgt"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (GT, operands[0]); DONE;")
-
-(define_expand "bgtu"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (GTU, operands[0]); DONE;")
-
-(define_expand "blt"
+(define_expand "b<code>"
   [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
+       (if_then_else (int_cond:CC (reg:CC FLAGS_REG)
+                                  (const_int 0))
+                     (label_ref (match_operand 0 ""))
                      (pc)))]
   ""
-  "ix86_expand_branch (LT, operands[0]); DONE;")
-
-(define_expand "bltu"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (LTU, operands[0]); DONE;")
-
-(define_expand "bge"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (GE, operands[0]); DONE;")
-
-(define_expand "bgeu"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (GEU, operands[0]); DONE;")
-
-(define_expand "ble"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (LE, operands[0]); DONE;")
-
-(define_expand "bleu"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  ""
-  "ix86_expand_branch (LEU, operands[0]); DONE;")
-
-(define_expand "bunordered"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNORDERED, operands[0]); DONE;")
-
-(define_expand "bordered"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (ORDERED, operands[0]); DONE;")
-
-(define_expand "buneq"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNEQ, operands[0]); DONE;")
-
-(define_expand "bunge"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNGE, operands[0]); DONE;")
+  "ix86_expand_branch (<CODE>, operands[0]); DONE;")
 
-(define_expand "bungt"
+(define_expand "b<code>"
   [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNGT, operands[0]); DONE;")
-
-(define_expand "bunle"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNLE, operands[0]); DONE;")
-
-(define_expand "bunlt"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
-                     (pc)))]
-  "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (UNLT, operands[0]); DONE;")
-
-(define_expand "bltgt"
-  [(set (pc)
-       (if_then_else (match_dup 1)
-                     (label_ref (match_operand 0 "" ""))
+       (if_then_else (fp_cond:CC (reg:CC FLAGS_REG)
+                                 (const_int 0))
+                     (label_ref (match_operand 0 ""))
                      (pc)))]
   "TARGET_80387 || TARGET_SSE_MATH"
-  "ix86_expand_branch (LTGT, operands[0]); DONE;")
+  "ix86_expand_branch (<CODE>, operands[0]); DONE;")
 
 (define_insn "*jcc_1"
   [(set (pc)