+++ /dev/null
-/* DSP16xx extra modes.
- Copyright (C) 2003 Free Software Foundation, Inc.
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-/* HFmode is the DSP16xx's equivalent of SFmode.
- FIXME: What format is this anyway? */
-FLOAT_MODE (HF, 2, 0);
+++ /dev/null
-/* Definitions of target machine for GNU compiler. AT&T DSP1600.
- Copyright (C) 2000 Free Software Foundation, Inc.
- Contributed by Michael Collison (collison@world.std.com).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-#ifdef RTX_CODE
-extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx);
-extern int call_address_operand (rtx, enum machine_mode);
-extern int arith_reg_operand (rtx, enum machine_mode);
-extern int symbolic_address_operand (rtx, enum machine_mode);
-extern int Y_address_operand (rtx, enum machine_mode);
-extern int sp_operand (rtx, enum machine_mode);
-extern int sp_operand2 (rtx, enum machine_mode);
-extern int nonmemory_arith_operand (rtx, enum machine_mode);
-extern int dsp16xx_comparison_operator (rtx, enum machine_mode);
-extern int unx_comparison_operator (rtx, enum machine_mode);
-extern int signed_comparison_operator (rtx, enum machine_mode);
-
-extern void notice_update_cc (rtx);
-extern void double_reg_from_memory (rtx[]);
-extern void double_reg_to_memory (rtx[]);
-extern enum rtx_code next_cc_user_code (rtx);
-extern int next_cc_user_unsigned (rtx);
-extern struct rtx_def *gen_tst_reg (rtx);
-extern const char *output_block_move (rtx[]);
-extern enum reg_class preferred_reload_class (rtx, enum reg_class);
-extern enum reg_class secondary_reload_class (enum reg_class,
- enum machine_mode, rtx);
-extern int emit_move_sequence (rtx *, enum machine_mode);
-extern void print_operand (FILE *, rtx, int);
-extern void print_operand_address (FILE *, rtx);
-extern void output_dsp16xx_float_const (rtx *);
-extern void emit_1600_core_shift (enum rtx_code, rtx *, int);
-extern int symbolic_address_p (rtx);
-extern int uns_comparison_operator (rtx, enum machine_mode);
-#endif /* RTX_CODE */
-
-
-#ifdef TREE_CODE
-extern struct rtx_def *dsp16xx_function_arg (CUMULATIVE_ARGS,
- enum machine_mode,
- tree, int);
-extern void dsp16xx_function_arg_advance (CUMULATIVE_ARGS *,
- enum machine_mode,
- tree, int);
-#endif /* TREE_CODE */
-
-extern void dsp16xx_invalid_register_for_compare (void);
-extern int class_max_nregs (enum reg_class, enum machine_mode);
-extern enum reg_class limit_reload_class (enum reg_class, enum machine_mode);
-extern int dsp16xx_register_move_cost (enum reg_class, enum reg_class);
-extern int dsp16xx_makes_calls (void);
-extern long compute_frame_size (int);
-extern int dsp16xx_call_saved_register (int);
-extern int dsp16xx_call_saved_register (int);
-extern void init_emulation_routines (void);
-extern int ybase_regs_ever_used (void);
-extern void override_options (void);
-extern int dsp16xx_starting_frame_offset (void);
-extern int initial_frame_pointer_offset (void);
-extern void asm_output_common (FILE *, const char *, int, int);
-extern void asm_output_local (FILE *, const char *, int, int);
-extern void asm_output_float (FILE *, double);
-extern bool dsp16xx_compare_gen;
-extern int hard_regno_mode_ok (int, enum machine_mode);
-extern enum reg_class dsp16xx_reg_class_from_letter (int);
-extern int regno_reg_class (int);
-extern void function_prologue (FILE *, int);
-extern void function_epilogue (FILE *, int);
-extern int num_1600_core_shifts (int);
+++ /dev/null
-/* Subroutines for assembler code output on the DSP1610.
- Copyright (C) 1994, 1995, 1997, 1998, 2001 Free Software Foundation, Inc.
- Contributed by Michael Collison (collison@isisinc.net).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-/* Some output-actions in dsp1600.md need these. */
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "rtl.h"
-#include "regs.h"
-#include "hard-reg-set.h"
-#include "real.h"
-#include "insn-config.h"
-#include "conditions.h"
-#include "output.h"
-#include "insn-attr.h"
-#include "tree.h"
-#include "expr.h"
-#include "function.h"
-#include "flags.h"
-#include "ggc.h"
-#include "toplev.h"
-#include "recog.h"
-#include "tm_p.h"
-#include "target.h"
-#include "target-def.h"
-
-const char *text_seg_name;
-const char *rsect_text;
-const char *data_seg_name;
-const char *rsect_data;
-const char *bss_seg_name;
-const char *rsect_bss;
-const char *const_seg_name;
-const char *rsect_const;
-
-const char *chip_name;
-const char *save_chip_name;
-
-/* Save the operands of a compare. The 16xx has not lt or gt, so
- in these cases we swap the operands and reverse the condition. */
-
-rtx dsp16xx_compare_op0;
-rtx dsp16xx_compare_op1;
-bool dsp16xx_compare_gen;
-
-static const char *fp;
-static const char *sp;
-static const char *rr;
-static const char *a1h;
-
-struct dsp16xx_frame_info current_frame_info;
-struct dsp16xx_frame_info zero_frame_info;
-
-rtx dsp16xx_addhf3_libcall = (rtx) 0;
-rtx dsp16xx_subhf3_libcall = (rtx) 0;
-rtx dsp16xx_mulhf3_libcall = (rtx) 0;
-rtx dsp16xx_divhf3_libcall = (rtx) 0;
-rtx dsp16xx_cmphf3_libcall = (rtx) 0;
-rtx dsp16xx_fixhfhi2_libcall = (rtx) 0;
-rtx dsp16xx_floathihf2_libcall = (rtx) 0;
-rtx dsp16xx_neghf2_libcall = (rtx) 0;
-
-rtx dsp16xx_mulhi3_libcall = (rtx) 0;
-rtx dsp16xx_udivqi3_libcall = (rtx) 0;
-rtx dsp16xx_udivhi3_libcall = (rtx) 0;
-rtx dsp16xx_divqi3_libcall = (rtx) 0;
-rtx dsp16xx_divhi3_libcall = (rtx) 0;
-rtx dsp16xx_modqi3_libcall = (rtx) 0;
-rtx dsp16xx_modhi3_libcall = (rtx) 0;
-rtx dsp16xx_umodqi3_libcall = (rtx) 0;
-rtx dsp16xx_umodhi3_libcall = (rtx) 0;
-rtx dsp16xx_ashrhi3_libcall = (rtx) 0;
-rtx dsp16xx_ashlhi3_libcall = (rtx) 0;
-rtx dsp16xx_ucmphi2_libcall = (rtx) 0;
-rtx dsp16xx_lshrhi3_libcall = (rtx) 0;
-
-static const char *const himode_reg_name[] = HIMODE_REGISTER_NAMES;
-
-#define SHIFT_INDEX_1 0
-#define SHIFT_INDEX_4 1
-#define SHIFT_INDEX_8 2
-#define SHIFT_INDEX_16 3
-
-static const char *const ashift_right_asm[] =
-{
- "%0=%0>>1",
- "%0=%0>>4",
- "%0=%0>>8",
- "%0=%0>>16"
-};
-
-static const char *const ashift_right_asm_first[] =
-{
- "%0=%1>>1",
- "%0=%1>>4",
- "%0=%1>>8",
- "%0=%1>>16"
-};
-
-static const char *const ashift_left_asm[] =
-{
- "%0=%0<<1",
- "%0=%0<<4",
- "%0=%0<<8",
- "%0=%0<<16"
-};
-
-static const char *const ashift_left_asm_first[] =
-{
- "%0=%1<<1",
- "%0=%1<<4",
- "%0=%1<<8",
- "%0=%1<<16"
-};
-
-static const char *const lshift_right_asm[] =
-{
- "%0=%0>>1\n\t%0=%b0&0x7fff",
- "%0=%0>>4\n\t%0=%b0&0x0fff",
- "%0=%0>>8\n\t%0=%b0&0x00ff",
- "%0=%0>>16\n\t%0=%b0&0x0000"
-};
-
-static const char *const lshift_right_asm_first[] =
-{
- "%0=%1>>1\n\t%0=%b0&0x7fff",
- "%0=%1>>4\n\t%0=%b0&0x0fff",
- "%0=%1>>8\n\t%0=%b0&0x00ff",
- "%0=%1>>16\n\t%0=%b0&0x0000"
-};
-
-static int reg_save_size (void);
-static void dsp16xx_output_function_prologue (FILE *, HOST_WIDE_INT);
-static void dsp16xx_output_function_epilogue (FILE *, HOST_WIDE_INT);
-static void dsp16xx_file_start (void);
-static bool dsp16xx_rtx_costs (rtx, int, int, int *);
-static int dsp16xx_address_cost (rtx);
-\f
-/* Initialize the GCC target structure. */
-
-#undef TARGET_ASM_BYTE_OP
-#define TARGET_ASM_BYTE_OP "\tint\t"
-#undef TARGET_ASM_ALIGNED_HI_OP
-#define TARGET_ASM_ALIGNED_HI_OP NULL
-#undef TARGET_ASM_ALIGNED_SI_OP
-#define TARGET_ASM_ALIGNED_SI_OP NULL
-
-#undef TARGET_ASM_FUNCTION_PROLOGUE
-#define TARGET_ASM_FUNCTION_PROLOGUE dsp16xx_output_function_prologue
-#undef TARGET_ASM_FUNCTION_EPILOGUE
-#define TARGET_ASM_FUNCTION_EPILOGUE dsp16xx_output_function_epilogue
-
-#undef TARGET_ASM_FILE_START
-#define TARGET_ASM_FILE_START dsp16xx_file_start
-
-#undef TARGET_RTX_COSTS
-#define TARGET_RTX_COSTS dsp16xx_rtx_costs
-#undef TARGET_ADDRESS_COST
-#define TARGET_ADDRESS_COST dsp16xx_address_cost
-
-struct gcc_target targetm = TARGET_INITIALIZER;
-
-int
-hard_regno_mode_ok (regno, mode)
- int regno;
- enum machine_mode mode;
-{
- switch ((int) mode)
- {
- case VOIDmode:
- return 1;
-
- /* We can't use the c0-c2 for QImode, since they are only
- 8 bits in length. */
-
- case QImode:
- if (regno != REG_C0 && regno != REG_C1 && regno != REG_C2)
- return 1;
- else
- return 0;
-
- /* We only allow a0, a1, y, and p to be allocated for 32-bit modes.
- Additionally we allow the virtual ybase registers to be used for 32-bit
- modes. */
-
- case HFmode:
- case HImode:
-#if 0 /* ??? These modes do not appear in the machine description nor
- are there library routines for them. */
- case SFmode:
- case DFmode:
- case XFmode:
- case SImode:
- case DImode:
-#endif
- if (regno == REG_A0 || regno == REG_A1 || regno == REG_Y || regno == REG_PROD
- || (IS_YBASE_REGISTER_WINDOW(regno) && ((regno & 1) == 0)))
- return 1;
- else
- return 0;
-
- default:
- return 0;
- }
-}
-
-enum reg_class
-dsp16xx_reg_class_from_letter (c)
- int c;
-{
- switch (c)
- {
- case 'A':
- return ACCUM_REGS;
-
- case 'l':
- return A0_REG;
-
- case 'C':
- return A1_REG;
-
- case 'h':
- return ACCUM_HIGH_REGS;
-
- case 'j':
- return A0H_REG;
-
- case 'k':
- return A0L_REG;
-
- case 'q':
- return A1H_REG;
-
- case 'u':
- return A1L_REG;
-
- case 'x':
- return X_REG;
-
- case 'y':
- return YH_REG;
-
- case 'z':
- return YL_REG;
-
- case 't':
- return P_REG;
-
- case 'Z':
- return Y_OR_P_REGS;
-
- case 'd':
- return ACCUM_Y_OR_P_REGS;
-
- case 'a':
- return Y_ADDR_REGS;
-
- case 'B':
- return (TARGET_BMU ? BMU_REGS : NO_REGS);
-
- case 'Y':
- return YBASE_VIRT_REGS;
-
- case 'v':
- return PH_REG;
-
- case 'w':
- return PL_REG;
-
- case 'W':
- return J_REG;
-
- case 'e':
- return YBASE_ELIGIBLE_REGS;
-
- case 'b':
- return ACCUM_LOW_REGS;
-
- case 'c':
- return NON_YBASE_REGS;
-
- case 'f':
- return Y_REG;
-
- case 'D':
- return SLOW_MEM_LOAD_REGS;
-
- default:
- return NO_REGS;
- }
-}
-
-/* Return the class number of the smallest class containing
- reg number REGNO. */
-
-int
-regno_reg_class(regno)
- int regno;
-{
- switch (regno)
- {
- case REG_A0L:
- return (int) A0L_REG;
- case REG_A1L:
- return (int) A1L_REG;
-
- case REG_A0:
- return (int) A0H_REG;
- case REG_A1:
- return (int) A1H_REG;
-
- case REG_X:
- return (int) X_REG;
-
- case REG_Y:
- return (int) YH_REG;
- case REG_YL:
- return (int) YL_REG;
-
- case REG_PROD:
- return (int) PH_REG;
- case REG_PRODL:
- return (int) PL_REG;
-
- case REG_R0: case REG_R1: case REG_R2: case REG_R3:
- return (int) Y_ADDR_REGS;
-
- case REG_J:
- return (int) J_REG;
- case REG_K:
- return (int) GENERAL_REGS;
-
- case REG_YBASE:
- return (int) GENERAL_REGS;
-
- case REG_PT:
- return (int) GENERAL_REGS;
-
- case REG_AR0: case REG_AR1: case REG_AR2: case REG_AR3:
- return (int) BMU_REGS;
-
- case REG_C0: case REG_C1: case REG_C2:
- return (int) GENERAL_REGS;
-
- case REG_PR:
- return (int) GENERAL_REGS;
-
- case REG_RB:
- return (int) GENERAL_REGS;
-
- case REG_YBASE0: case REG_YBASE1: case REG_YBASE2: case REG_YBASE3:
- case REG_YBASE4: case REG_YBASE5: case REG_YBASE6: case REG_YBASE7:
- case REG_YBASE8: case REG_YBASE9: case REG_YBASE10: case REG_YBASE11:
- case REG_YBASE12: case REG_YBASE13: case REG_YBASE14: case REG_YBASE15:
- case REG_YBASE16: case REG_YBASE17: case REG_YBASE18: case REG_YBASE19:
- case REG_YBASE20: case REG_YBASE21: case REG_YBASE22: case REG_YBASE23:
- case REG_YBASE24: case REG_YBASE25: case REG_YBASE26: case REG_YBASE27:
- case REG_YBASE28: case REG_YBASE29: case REG_YBASE30: case REG_YBASE31:
- return (int) YBASE_VIRT_REGS;
-
- default:
- return (int) NO_REGS;
- }
-}
-
-/* A C expression for the maximum number of consecutive registers of class CLASS
- needed to hold a value of mode MODE. */
-
-int
-class_max_nregs(class, mode)
- enum reg_class class ATTRIBUTE_UNUSED;
- enum machine_mode mode;
-{
- return (GET_MODE_SIZE(mode));
-}
-
-enum reg_class
-limit_reload_class (mode, class)
- enum machine_mode mode ATTRIBUTE_UNUSED;
- enum reg_class class;
-{
- return class;
-}
-
-int
-dsp16xx_register_move_cost (from, to)
- enum reg_class from, to;
-{
- if (from == A0H_REG || from == A0L_REG || from == A0_REG ||
- from == A1H_REG || from == ACCUM_HIGH_REGS || from == A1L_REG ||
- from == ACCUM_LOW_REGS || from == A1_REG || from == ACCUM_REGS)
- {
- if (to == Y_REG || to == P_REG)
- return 4;
- else
- return 2;
- }
-
- if (to == A0H_REG || to == A0L_REG || to == A0_REG ||
- to == A1H_REG || to == ACCUM_HIGH_REGS || to == A1L_REG ||
- to == ACCUM_LOW_REGS || to == A1_REG || to == ACCUM_REGS)
- {
- return 2;
- }
-
- if (from == YBASE_VIRT_REGS)
- {
- if (to == YBASE_VIRT_REGS)
- return 16;
-
- if (to == X_REG || to == YH_REG || to == YL_REG ||
- to == Y_REG || to == PL_REG || to == PH_REG ||
- to == P_REG || to == Y_ADDR_REGS || to == YBASE_ELIGIBLE_REGS ||
- to == Y_OR_P_REGS)
- {
- return 8;
- }
- else
- return 10;
- }
-
- if (to == YBASE_VIRT_REGS)
- {
- if (from == X_REG || from == YH_REG || from == YL_REG ||
- from == Y_REG || from == PL_REG || from == PH_REG ||
- from == P_REG || from == Y_ADDR_REGS || from == YBASE_ELIGIBLE_REGS ||
- from == Y_OR_P_REGS)
- {
- return 8;
- }
- else
- return 10;
- }
-
- return 8;
-}
-
-/* Given an rtx X being reloaded into a reg required to be
- in class CLASS, return the class of reg to actually use.
- In general this is just CLASS; but on some machines
- in some cases it is preferable to use a more restrictive class.
- Also, we must ensure that a PLUS is reloaded either
- into an accumulator or an address register. */
-
-enum reg_class
-preferred_reload_class (x, class)
- rtx x;
- enum reg_class class;
-{
- /* The ybase registers cannot have constants copied directly
- to them. */
-
- if (CONSTANT_P (x))
- {
- switch ((int) class)
- {
- case YBASE_VIRT_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_YBASE_REGS:
- return ACCUM_LOW_REGS;
-
- case ACCUM_OR_YBASE_REGS:
- return ACCUM_REGS;
-
- case X_OR_YBASE_REGS:
- return X_REG;
-
- case Y_OR_YBASE_REGS:
- return Y_REG;
-
- case ACCUM_LOW_YL_PL_OR_YBASE_REGS:
- return YL_OR_PL_OR_ACCUM_LOW_REGS;
-
- case P_OR_YBASE_REGS:
- return P_REG;
-
- case ACCUM_Y_P_OR_YBASE_REGS:
- return ACCUM_Y_OR_P_REGS;
-
- case Y_ADDR_OR_YBASE_REGS:
- return Y_ADDR_REGS;
-
- case YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS:
- return NON_HIGH_YBASE_ELIGIBLE_REGS;;
-
- case YBASE_OR_YBASE_ELIGIBLE_REGS:
- return YBASE_ELIGIBLE_REGS;
-
- case NO_HIGH_ALL_REGS:
- return NOHIGH_NON_YBASE_REGS;
-
- case ALL_REGS:
- return NON_YBASE_REGS;
-
- default:
- return class;
- }
- }
-
- /* If x is not an accumulator or a ybase register, restrict the class of registers
- we can copy the register into. */
-
- if (REG_P (x) && !IS_ACCUM_REG (REGNO (x)) && !IS_YBASE_REGISTER_WINDOW (REGNO (x)))
- {
- switch ((int) class)
- {
- case NO_REGS:
- case A0H_REG: case A0L_REG: case A0_REG: case A1H_REG:
- case ACCUM_HIGH_REGS: case A1L_REG: case ACCUM_LOW_REGS:
- case A1_REG: case ACCUM_REGS:
- return class;
-
- case X_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case X_OR_ACCUM_LOW_REGS:
- return ACCUM_LOW_REGS;
-
- case X_OR_ACCUM_REGS:
- return ACCUM_REGS;
-
- case YH_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case YH_OR_ACCUM_HIGH_REGS:
- return ACCUM_HIGH_REGS;
-
- case X_OR_YH_REGS:
- case YL_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case YL_OR_ACCUM_LOW_REGS:
- return ACCUM_LOW_REGS;
-
- case X_OR_YL_REGS:
- case X_OR_Y_REGS: case Y_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_OR_Y_REGS:
- return ACCUM_REGS;
-
- case PH_REG:
- case X_OR_PH_REGS: case PL_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case PL_OR_ACCUM_LOW_REGS:
- return ACCUM_LOW_REGS;
-
- case X_OR_PL_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case YL_OR_PL_OR_ACCUM_LOW_REGS:
- return ACCUM_LOW_REGS;
-
- case P_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_OR_P_REGS:
- return ACCUM_REGS;
-
- case YL_OR_P_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_YL_OR_P_REGS:
- return ACCUM_LOW_REGS;
-
- case Y_OR_P_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_Y_OR_P_REGS:
- return ACCUM_REGS;
-
- case NO_FRAME_Y_ADDR_REGS:
- case Y_ADDR_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_Y_ADDR_REGS:
- return ACCUM_LOW_REGS;
-
- case ACCUM_OR_Y_ADDR_REGS:
- return ACCUM_REGS;
-
- case X_OR_Y_ADDR_REGS:
- case Y_OR_Y_ADDR_REGS:
- case P_OR_Y_ADDR_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case NON_HIGH_YBASE_ELIGIBLE_REGS:
- return ACCUM_LOW_REGS;
-
- case YBASE_ELIGIBLE_REGS:
- return ACCUM_REGS;
-
- case J_REG:
- case J_OR_DAU_16_BIT_REGS:
- case BMU_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case YBASE_VIRT_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return class;
- else
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return class;
- else
- return ACCUM_LOW_REGS;
-
- case ACCUM_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return class;
- else
- return ACCUM_REGS;
-
- case X_OR_YBASE_REGS:
- case Y_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return YBASE_VIRT_REGS;
- else
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_YL_PL_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_LOW_OR_YBASE_REGS;
- else
- return ACCUM_LOW_REGS;
-
- case P_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return YBASE_VIRT_REGS;
- else
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_Y_P_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_OR_YBASE_REGS;
- else
- return ACCUM_REGS;
-
- case Y_ADDR_OR_YBASE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return YBASE_VIRT_REGS;
- else
- return (!reload_in_progress ? NO_REGS : class);
-
- case YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_LOW_OR_YBASE_REGS;
- else
- return ACCUM_LOW_REGS;
-
- case YBASE_OR_YBASE_ELIGIBLE_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_OR_YBASE_REGS;
- else
- return ACCUM_REGS;
-
- case NO_HIGH_ALL_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_LOW_OR_YBASE_REGS;
- else
- return ACCUM_LOW_REGS;
-
- case ALL_REGS:
- if (IS_YBASE_ELIGIBLE_REG (REGNO (x)))
- return ACCUM_OR_YBASE_REGS;
- else
- return ACCUM_REGS;
-
- case NOHIGH_NON_ADDR_REGS:
- return ACCUM_LOW_REGS;
-
- case NON_ADDR_REGS:
- case SLOW_MEM_LOAD_REGS:
- return ACCUM_REGS;
-
- case NOHIGH_NON_YBASE_REGS:
- return ACCUM_LOW_REGS;
-
- case NO_ACCUM_NON_YBASE_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case NON_YBASE_REGS:
- return ACCUM_REGS;
-
- default:
- return class;
- }
- }
-
- /* If x (the input) is a ybase register, restrict the class of registers
- we can copy the register into. */
-
- if (REG_P (x) && !TARGET_RESERVE_YBASE
- && IS_YBASE_REGISTER_WINDOW (REGNO(x)))
- {
- switch ((int) class)
- {
- case NO_REGS:
- case A0H_REG: case A0L_REG: case A0_REG: case A1H_REG:
- case ACCUM_HIGH_REGS: case A1L_REG: case ACCUM_LOW_REGS:
- case A1_REG: case ACCUM_REGS: case X_REG:
- case X_OR_ACCUM_LOW_REGS: case X_OR_ACCUM_REGS:
- case YH_REG: case YH_OR_ACCUM_HIGH_REGS:
- case X_OR_YH_REGS: case YL_REG:
- case YL_OR_ACCUM_LOW_REGS: case X_OR_YL_REGS:
- case X_OR_Y_REGS: case Y_REG:
- case ACCUM_OR_Y_REGS: case PH_REG:
- case X_OR_PH_REGS: case PL_REG:
- case PL_OR_ACCUM_LOW_REGS: case X_OR_PL_REGS:
- case YL_OR_PL_OR_ACCUM_LOW_REGS: case P_REG:
- case ACCUM_OR_P_REGS: case YL_OR_P_REGS:
- case ACCUM_LOW_OR_YL_OR_P_REGS: case Y_OR_P_REGS:
- case ACCUM_Y_OR_P_REGS: case NO_FRAME_Y_ADDR_REGS:
- case Y_ADDR_REGS: case ACCUM_LOW_OR_Y_ADDR_REGS:
- case ACCUM_OR_Y_ADDR_REGS: case X_OR_Y_ADDR_REGS:
- case Y_OR_Y_ADDR_REGS: case P_OR_Y_ADDR_REGS:
- case NON_HIGH_YBASE_ELIGIBLE_REGS: case YBASE_ELIGIBLE_REGS:
- default:
- return class;
-
- case J_REG:
- return (!reload_in_progress ? NO_REGS : class);
-
- case J_OR_DAU_16_BIT_REGS:
- return ACCUM_HIGH_REGS;
-
- case BMU_REGS:
- case YBASE_VIRT_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_YBASE_REGS:
- return ACCUM_LOW_REGS;
-
- case ACCUM_OR_YBASE_REGS:
- return ACCUM_REGS;
-
- case X_OR_YBASE_REGS:
- return X_REG;
-
- case Y_OR_YBASE_REGS:
- return Y_REG;
-
- case ACCUM_LOW_YL_PL_OR_YBASE_REGS:
- return YL_OR_PL_OR_ACCUM_LOW_REGS;
-
- case P_OR_YBASE_REGS:
- return P_REG;
-
- case ACCUM_Y_P_OR_YBASE_REGS:
- return ACCUM_Y_OR_P_REGS;
-
- case Y_ADDR_OR_YBASE_REGS:
- return Y_ADDR_REGS;
-
- case YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS:
- return NON_HIGH_YBASE_ELIGIBLE_REGS;
-
- case YBASE_OR_YBASE_ELIGIBLE_REGS:
- return YBASE_ELIGIBLE_REGS;
-
- case NO_HIGH_ALL_REGS:
- return NON_HIGH_YBASE_ELIGIBLE_REGS;
-
- case ALL_REGS:
- return YBASE_ELIGIBLE_REGS;
-
- case NOHIGH_NON_ADDR_REGS:
- return ACCUM_LOW_OR_YL_OR_P_REGS;
-
- case NON_ADDR_REGS:
- return ACCUM_Y_OR_P_REGS;
-
- case SLOW_MEM_LOAD_REGS:
- return ACCUM_OR_Y_ADDR_REGS;
-
- case NOHIGH_NON_YBASE_REGS:
- return NON_HIGH_YBASE_ELIGIBLE_REGS;
-
- case NO_ACCUM_NON_YBASE_REGS:
- return Y_ADDR_REGS;
-
- case NON_YBASE_REGS:
- return YBASE_ELIGIBLE_REGS;
- }
- }
-
- if (GET_CODE (x) == PLUS)
- {
- if (GET_MODE (x) == QImode
- && REG_P (XEXP (x,0))
- && (XEXP (x,0) == frame_pointer_rtx
- || XEXP (x,0) == stack_pointer_rtx)
- && (GET_CODE (XEXP (x,1)) == CONST_INT))
- {
- if (class == ACCUM_HIGH_REGS)
- return class;
-
- /* If the accumulators are not part of the class
- being reloaded into, return NO_REGS. */
-#if 0
- if (!reg_class_subset_p (ACCUM_REGS, class))
- return (!reload_in_progress ? NO_REGS : class);
-#endif
- if (reg_class_subset_p (ACCUM_HIGH_REGS, class))
- return ACCUM_HIGH_REGS;
-
- /* We will use accumulator 'a1l' for reloading a
- PLUS. We can only use one accumulator because
- 'reload_inqi' only allows one alternative to be
- used. */
-
- else if (class == ACCUM_LOW_REGS)
- return A1L_REG;
- else if (class == A0L_REG)
- return NO_REGS;
- else
- return class;
- }
-
- if (class == NON_YBASE_REGS || class == YBASE_ELIGIBLE_REGS)
- return Y_ADDR_REGS;
- else
- return class;
- }
- else if (GET_CODE (x) == MEM)
- {
- /* We can't copy from a memory location into a
- ybase register. */
- if (reg_class_subset_p(YBASE_VIRT_REGS, class))
- {
- switch ((int) class)
- {
- case YBASE_VIRT_REGS:
- return (!reload_in_progress ? NO_REGS : class);
-
- case ACCUM_LOW_OR_YBASE_REGS:
- return ACCUM_LOW_REGS;
-
- case ACCUM_OR_YBASE_REGS:
- return ACCUM_REGS;
-
- case X_OR_YBASE_REGS:
- return X_REG;
-
- case Y_OR_YBASE_REGS:
- return Y_REG;
-
- case ACCUM_LOW_YL_PL_OR_YBASE_REGS:
- return YL_OR_PL_OR_ACCUM_LOW_REGS;
-
- case P_OR_YBASE_REGS:
- return P_REG;
-
- case ACCUM_Y_P_OR_YBASE_REGS:
- return ACCUM_Y_OR_P_REGS;
-
- case Y_ADDR_OR_YBASE_REGS:
- return Y_ADDR_REGS;
-
- case YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS:
- return NON_HIGH_YBASE_ELIGIBLE_REGS;
-
- case YBASE_OR_YBASE_ELIGIBLE_REGS:
- return YBASE_ELIGIBLE_REGS;
-
- case NO_HIGH_ALL_REGS:
- return NOHIGH_NON_YBASE_REGS;
-
- case ALL_REGS:
- return NON_YBASE_REGS;
-
- default:
- return class;
- }
- }
- else
- return class;
- }
- else
- return class;
-}
-
-/* Return the register class of a scratch register needed to copy IN into
- or out of a register in CLASS in MODE. If it can be done directly,
- NO_REGS is returned. */
-
-enum reg_class
-secondary_reload_class (class, mode, in)
- enum reg_class class;
- enum machine_mode mode;
- rtx in;
-{
- int regno = -1;
-
- if (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
- regno = true_regnum (in);
-
- /* If we are reloading a plus into a high accumulator register,
- we need a scratch low accumulator, because the low half gets
- clobbered. */
-
- if (class == ACCUM_HIGH_REGS
- || class == A1H_REG
- || class == A0H_REG)
- {
- if (GET_CODE (in) == PLUS && mode == QImode)
- return ACCUM_LOW_REGS;
- }
-
- if (class == ACCUM_HIGH_REGS
- || class == ACCUM_LOW_REGS
- || class == A1L_REG
- || class == A0L_REG
- || class == A1H_REG
- || class == A0H_REG)
- {
- if (GET_CODE (in) == PLUS && mode == QImode)
- {
- rtx addr0 = XEXP (in, 0);
- rtx addr1 = XEXP (in, 1);
-
- /* If we are reloading a plus (reg:QI) (reg:QI)
- we need an additional register. */
- if (REG_P (addr0) && REG_P (addr1))
- return NO_REGS;
- }
- }
-
- /* We can place anything into ACCUM_REGS and can put ACCUM_REGS
- into anything. */
-
- if ((class == ACCUM_REGS || class == ACCUM_HIGH_REGS ||
- class == ACCUM_LOW_REGS || class == A0H_REG || class == A0L_REG ||
- class == A1H_REG || class == A1_REG) ||
- (regno >= REG_A0 && regno < REG_A1L + 1))
- return NO_REGS;
-
- if (class == ACCUM_OR_YBASE_REGS && REG_P(in)
- && IS_YBASE_ELIGIBLE_REG(regno))
- {
- return NO_REGS;
- }
-
- /* We can copy the ybase registers into:
- r0-r3, a0-a1, y, p, & x or the union of
- any of these. */
-
- if (!TARGET_RESERVE_YBASE && IS_YBASE_REGISTER_WINDOW(regno))
- {
- switch ((int) class)
- {
- case (int) X_REG:
- case (int) X_OR_ACCUM_LOW_REGS:
- case (int) X_OR_ACCUM_REGS:
- case (int) YH_REG:
- case (int) YH_OR_ACCUM_HIGH_REGS:
- case (int) X_OR_YH_REGS:
- case (int) YL_REG:
- case (int) YL_OR_ACCUM_LOW_REGS:
- case (int) X_OR_Y_REGS:
- case (int) X_OR_YL_REGS:
- case (int) Y_REG:
- case (int) ACCUM_OR_Y_REGS:
- case (int) PH_REG:
- case (int) X_OR_PH_REGS:
- case (int) PL_REG:
- case (int) PL_OR_ACCUM_LOW_REGS:
- case (int) X_OR_PL_REGS:
- case (int) YL_OR_PL_OR_ACCUM_LOW_REGS:
- case (int) P_REG:
- case (int) ACCUM_OR_P_REGS:
- case (int) YL_OR_P_REGS:
- case (int) ACCUM_LOW_OR_YL_OR_P_REGS:
- case (int) Y_OR_P_REGS:
- case (int) ACCUM_Y_OR_P_REGS:
- case (int) Y_ADDR_REGS:
- case (int) ACCUM_LOW_OR_Y_ADDR_REGS:
- case (int) ACCUM_OR_Y_ADDR_REGS:
- case (int) X_OR_Y_ADDR_REGS:
- case (int) Y_OR_Y_ADDR_REGS:
- case (int) P_OR_Y_ADDR_REGS:
- case (int) YBASE_ELIGIBLE_REGS:
- return NO_REGS;
-
- default:
- return ACCUM_HIGH_REGS;
- }
- }
-
- /* We can copy r0-r3, a0-a1, y, & p
- directly to the ybase registers. In addition
- we can use any of the ybase virtual registers
- as the secondary reload registers when copying
- between any of these registers. */
-
- if (!TARGET_RESERVE_YBASE && regno != -1)
- {
- switch (regno)
- {
- case REG_A0:
- case REG_A0L:
- case REG_A1:
- case REG_A1L:
- case REG_X:
- case REG_Y:
- case REG_YL:
- case REG_PROD:
- case REG_PRODL:
- case REG_R0:
- case REG_R1:
- case REG_R2:
- case REG_R3:
- if (class == YBASE_VIRT_REGS)
- return NO_REGS;
- else
- {
- switch ((int) class)
- {
- case (int) X_REG:
- case (int) X_OR_ACCUM_LOW_REGS:
- case (int) X_OR_ACCUM_REGS:
- case (int) YH_REG:
- case (int) YH_OR_ACCUM_HIGH_REGS:
- case (int) X_OR_YH_REGS:
- case (int) YL_REG:
- case (int) YL_OR_ACCUM_LOW_REGS:
- case (int) X_OR_Y_REGS:
- case (int) X_OR_YL_REGS:
- case (int) Y_REG:
- case (int) ACCUM_OR_Y_REGS:
- case (int) PH_REG:
- case (int) X_OR_PH_REGS:
- case (int) PL_REG:
- case (int) PL_OR_ACCUM_LOW_REGS:
- case (int) X_OR_PL_REGS:
- case (int) YL_OR_PL_OR_ACCUM_LOW_REGS:
- case (int) P_REG:
- case (int) ACCUM_OR_P_REGS:
- case (int) YL_OR_P_REGS:
- case (int) ACCUM_LOW_OR_YL_OR_P_REGS:
- case (int) Y_OR_P_REGS:
- case (int) ACCUM_Y_OR_P_REGS:
- case (int) Y_ADDR_REGS:
- case (int) ACCUM_LOW_OR_Y_ADDR_REGS:
- case (int) ACCUM_OR_Y_ADDR_REGS:
- case (int) X_OR_Y_ADDR_REGS:
- case (int) Y_OR_Y_ADDR_REGS:
- case (int) P_OR_Y_ADDR_REGS:
- case (int) YBASE_ELIGIBLE_REGS:
- return YBASE_VIRT_REGS;
-
- default:
- break;
- }
- }
- }
- }
-
- /* Memory or constants can be moved from or to any register
- except the ybase virtual registers. */
- if (regno == -1 && GET_CODE(in) != PLUS)
- {
- if (class == YBASE_VIRT_REGS)
- return NON_YBASE_REGS;
- else
- return NO_REGS;
- }
-
- if (GET_CODE (in) == PLUS && mode == QImode)
- {
- rtx addr0 = XEXP (in, 0);
- rtx addr1 = XEXP (in, 1);
-
- /* If we are reloading a plus (reg:QI) (reg:QI)
- we need a low accumulator, not a high one. */
- if (REG_P (addr0) && REG_P (addr1))
- return ACCUM_LOW_REGS;
- }
-
-#if 0
- if (REG_P(in))
- return ACCUM_REGS;
-#endif
-
- /* Otherwise, we need a high accumulator(s). */
- return ACCUM_HIGH_REGS;
-}
-
-int
-symbolic_address_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
-{
- return (symbolic_address_p (op));
-}
-
-int
-symbolic_address_p (op)
- rtx op;
-{
- switch (GET_CODE (op))
- {
- case SYMBOL_REF:
- case LABEL_REF:
- return 1;
-
- case CONST:
- op = XEXP (op, 0);
- return ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
- || GET_CODE (XEXP (op, 0)) == LABEL_REF)
- && GET_CODE (XEXP (op, 1)) == CONST_INT
- && INTVAL (XEXP (op,1)) < 0x20);
-
- default:
- return 0;
- }
-}
-
-/* For a Y address space operand we allow only *rn, *rn++, *rn--.
- This routine only recognizes *rn, the '<>' constraints recognize
- (*rn++), and (*rn--). */
-
-int
-Y_address_operand (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- return (memory_address_p (mode, op) && !symbolic_address_p (op));
-}
-
-int
-sp_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
-{
- return (GET_CODE (op) == PLUS
- && (XEXP (op, 0) == stack_pointer_rtx
- || XEXP (op, 0) == frame_pointer_rtx)
- && GET_CODE (XEXP (op,1)) == CONST_INT);
-}
-
-int
-sp_operand2 (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
-{
- if ((GET_CODE (op) == PLUS
- && (XEXP (op, 0) == stack_pointer_rtx
- || XEXP (op, 0) == frame_pointer_rtx)
- && (REG_P (XEXP (op,1))
- && IS_ADDRESS_REGISTER (REGNO (XEXP(op, 1))))))
- return 1;
- else if ((GET_CODE (op) == PLUS
- && (XEXP (op, 1) == stack_pointer_rtx
- || XEXP (op, 1) == frame_pointer_rtx)
- && (REG_P (XEXP (op,0))
- && IS_ADDRESS_REGISTER (REGNO (XEXP(op, 1))))))
- return 1;
- else
- return 0;
-}
-
-int
-nonmemory_arith_operand (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- return (immediate_operand (op, mode) || arith_reg_operand (op, mode));
-}
-
-int
-arith_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- return (register_operand (op, mode)
- && (GET_CODE (op) != REG
- || REGNO (op) >= FIRST_PSEUDO_REGISTER
- || (!(IS_YBASE_REGISTER_WINDOW (REGNO (op)))
- && REGNO (op) != FRAME_POINTER_REGNUM)));
-}
-
-int
-call_address_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
-{
- if (symbolic_address_p (op) || REG_P(op))
- {
- return 1;
- }
-
- return 0;
-}
-
-int
-dsp16xx_comparison_operator (op, mode)
- register rtx op;
- enum machine_mode mode;
-{
- return ((mode == VOIDmode || GET_MODE (op) == mode)
- && GET_RTX_CLASS (GET_CODE (op)) == '<'
- && (GET_CODE(op) != GE && GET_CODE (op) != LT &&
- GET_CODE (op) != GEU && GET_CODE (op) != LTU));
-}
-
-void
-notice_update_cc(exp)
- rtx exp;
-{
- if (GET_CODE (exp) == SET)
- {
- /* Jumps do not alter the cc's. */
-
- if (SET_DEST (exp) == pc_rtx)
- return;
-
- /* Moving register or memory into a register:
- it doesn't alter the cc's, but it might invalidate
- the RTX's which we remember the cc's came from.
- (Note that moving a constant 0 or 1 MAY set the cc's). */
- if (REG_P (SET_DEST (exp))
- && (REG_P (SET_SRC (exp)) || GET_CODE (SET_SRC (exp)) == MEM))
- {
- if (cc_status.value1
- && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value1))
- cc_status.value1 = 0;
- if (cc_status.value2
- && reg_overlap_mentioned_p (SET_DEST (exp), cc_status.value2))
- cc_status.value2 = 0;
- return;
- }
- /* Moving register into memory doesn't alter the cc's.
- It may invalidate the RTX's which we remember the cc's came from. */
- if (GET_CODE (SET_DEST (exp)) == MEM && REG_P (SET_SRC (exp)))
- {
- if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM)
- cc_status.value1 = 0;
- if (cc_status.value2 && GET_CODE (cc_status.value2) == MEM)
- cc_status.value2 = 0;
- return;
- }
- /* Function calls clobber the cc's. */
- else if (GET_CODE (SET_SRC (exp)) == CALL)
- {
- CC_STATUS_INIT;
- return;
- }
- /* Tests and compares set the cc's in predictable ways. */
- else if (SET_DEST (exp) == cc0_rtx)
- {
- CC_STATUS_INIT;
- cc_status.value1 = SET_SRC (exp);
- return;
- }
- /* Certain instructions effect the condition codes. */
- else if (GET_MODE_CLASS (GET_MODE (SET_SRC (exp))) == MODE_INT)
- switch (GET_CODE (SET_SRC (exp)))
- {
- case PLUS:
- case MINUS:
- if (REG_P (SET_DEST (exp)))
- {
- /* Address registers don't set the condition codes. */
- if (IS_ADDRESS_REGISTER (REGNO (SET_DEST (exp))))
- {
- CC_STATUS_INIT;
- break;
- }
- }
- case ASHIFTRT:
- case LSHIFTRT:
- case ASHIFT:
- case AND:
- case IOR:
- case XOR:
- case MULT:
- case NEG:
- case NOT:
- cc_status.value1 = SET_SRC (exp);
- cc_status.value2 = SET_DEST (exp);
- break;
-
- default:
- CC_STATUS_INIT;
- }
- else
- {
- CC_STATUS_INIT;
- }
- }
- else if (GET_CODE (exp) == PARALLEL
- && GET_CODE (XVECEXP (exp, 0, 0)) == SET)
- {
- if (SET_DEST (XVECEXP (exp, 0, 0)) == pc_rtx)
- return;
-
- if (SET_DEST (XVECEXP (exp, 0, 0)) == cc0_rtx)
- {
- CC_STATUS_INIT;
- cc_status.value1 = SET_SRC (XVECEXP (exp, 0, 0));
- return;
- }
-
- CC_STATUS_INIT;
- }
- else
- {
- CC_STATUS_INIT;
- }
-}
-
-int
-dsp16xx_makes_calls ()
-{
- rtx insn;
-
- for (insn = get_insns (); insn; insn = next_insn (insn))
- if (GET_CODE (insn) == CALL_INSN)
- return (1);
-
- return 0;
-}
-
-long
-compute_frame_size (size)
- int size;
-{
- long total_size;
- long var_size;
- long args_size;
- long extra_size;
- long reg_size;
-
- /* This value is needed to compute reg_size. */
- current_frame_info.function_makes_calls = !leaf_function_p ();
-
- reg_size = 0;
- extra_size = 0;
- var_size = size;
- args_size = current_function_outgoing_args_size;
- reg_size = reg_save_size ();
-
- total_size = var_size + args_size + extra_size + reg_size;
-
-
- /* Save other computed information. */
- current_frame_info.total_size = total_size;
- current_frame_info.var_size = var_size;
- current_frame_info.args_size = args_size;
- current_frame_info.extra_size = extra_size;
- current_frame_info.reg_size = reg_size;
- current_frame_info.initialized = reload_completed;
- current_frame_info.reg_size = reg_size / UNITS_PER_WORD;
-
- if (reg_size)
- {
- unsigned long offset = args_size + var_size + reg_size;
- current_frame_info.sp_save_offset = offset;
- current_frame_info.fp_save_offset = offset - total_size;
- }
-
- return total_size;
-}
-
-int
-dsp16xx_call_saved_register (regno)
- int regno;
-{
-#if 0
- if (regno == REG_PR && current_frame_info.function_makes_calls)
- return 1;
-#endif
- return (regs_ever_live[regno] && !call_used_regs[regno] &&
- !IS_YBASE_REGISTER_WINDOW(regno));
-}
-
-int
-ybase_regs_ever_used ()
-{
- int regno;
- int live = 0;
-
- for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++)
- if (regs_ever_live[regno])
- {
- live = 1;
- break;
- }
-
- return live;
-}
-
-static void
-dsp16xx_output_function_prologue (file, size)
- FILE *file;
- HOST_WIDE_INT size;
-{
- int regno;
- long total_size;
- fp = reg_names[FRAME_POINTER_REGNUM];
- sp = reg_names[STACK_POINTER_REGNUM];
- rr = reg_names[RETURN_ADDRESS_REGNUM]; /* return address register */
- a1h = reg_names[REG_A1];
-
- total_size = compute_frame_size (size);
-
- fprintf (file, "\t/* FUNCTION PROLOGUE: */\n");
- fprintf (file, "\t/* total=%ld, vars= %ld, regs= %d, args=%d, extra= %ld */\n",
- current_frame_info.total_size,
- current_frame_info.var_size,
- current_frame_info.reg_size,
- current_function_outgoing_args_size,
- current_frame_info.extra_size);
-
- fprintf (file, "\t/* fp save offset= %ld, sp save_offset= %ld */\n\n",
- current_frame_info.fp_save_offset,
- current_frame_info.sp_save_offset);
- /* Set up the 'ybase' register window. */
-
- if (ybase_regs_ever_used())
- {
- fprintf (file, "\t%s=%s\n", a1h, reg_names[REG_YBASE]);
- if (TARGET_YBASE_HIGH)
- fprintf (file, "\t%s=%sh-32\n", reg_names[REG_A1], a1h);
- else
- fprintf (file, "\t%s=%sh+32\n", reg_names[REG_A1], a1h);
- fprintf (file, "\t%s=%s\n", reg_names[REG_YBASE], a1h);
- }
-
- if (current_frame_info.var_size)
- {
- if (current_frame_info.var_size == 1)
- fprintf (file, "\t*%s++\n", sp);
- else
- {
- if (SMALL_INTVAL(current_frame_info.var_size) && ((current_frame_info.var_size & 0x8000) == 0))
- fprintf (file, "\t%s=%ld\n\t*%s++%s\n", reg_names[REG_J], current_frame_info.var_size, sp, reg_names[REG_J]);
- else
- fatal_error ("stack size > 32k");
- }
- }
-
- /* Save any registers this function uses, unless they are
- used in a call, in which case we don't need to. */
-
- for(regno = 0; regno < FIRST_PSEUDO_REGISTER; ++ regno)
- if (dsp16xx_call_saved_register (regno))
- {
- fprintf (file, "\tpush(*%s)=%s\n", sp, reg_names[regno]);
- }
-
- /* For debugging purposes, we want the return address to be at a predictable
- location. */
- if (current_frame_info.function_makes_calls)
- fprintf (file, "\tpush(*%s)=%s\n", sp, reg_names[RETURN_ADDRESS_REGNUM]);
-
- if (current_frame_info.args_size)
- {
- if (current_frame_info.args_size == 1)
- fprintf (file, "\t*%s++\n", sp);
- else
- error ("stack size > 32k");
- }
-
- if (frame_pointer_needed)
- {
- fprintf (file, "\t%s=%s\n", a1h, sp);
- fprintf (file, "\t%s=%s\n", fp, a1h); /* Establish new base frame */
- fprintf (file, "\t%s=%ld\n", reg_names[REG_J], -total_size);
- fprintf (file, "\t*%s++%s\n", fp, reg_names[REG_J]);
- }
-
- fprintf (file, "\t/* END FUNCTION PROLOGUE: */\n\n");
-}
-
-void
-init_emulation_routines ()
-{
- dsp16xx_addhf3_libcall = (rtx) 0;
- dsp16xx_subhf3_libcall = (rtx) 0;
- dsp16xx_mulhf3_libcall = (rtx) 0;
- dsp16xx_divhf3_libcall = (rtx) 0;
- dsp16xx_cmphf3_libcall = (rtx) 0;
- dsp16xx_fixhfhi2_libcall = (rtx) 0;
- dsp16xx_floathihf2_libcall = (rtx) 0;
- dsp16xx_neghf2_libcall = (rtx) 0;
-
- dsp16xx_mulhi3_libcall = (rtx) 0;
- dsp16xx_udivqi3_libcall = (rtx) 0;
- dsp16xx_udivhi3_libcall = (rtx) 0;
- dsp16xx_divqi3_libcall = (rtx) 0;
- dsp16xx_divhi3_libcall = (rtx) 0;
- dsp16xx_modqi3_libcall = (rtx) 0;
- dsp16xx_modhi3_libcall = (rtx) 0;
- dsp16xx_umodqi3_libcall = (rtx) 0;
- dsp16xx_umodhi3_libcall = (rtx) 0;
- dsp16xx_ashrhi3_libcall = (rtx) 0;
- dsp16xx_ashlhi3_libcall = (rtx) 0;
- dsp16xx_ucmphi2_libcall = (rtx) 0;
- dsp16xx_lshrhi3_libcall = (rtx) 0;
-
-}
-static void
-dsp16xx_output_function_epilogue (file, size)
- FILE *file;
- HOST_WIDE_INT size ATTRIBUTE_UNUSED;
-{
- int regno;
-
- fp = reg_names[FRAME_POINTER_REGNUM];
- sp = reg_names[STACK_POINTER_REGNUM];
- rr = reg_names[RETURN_ADDRESS_REGNUM]; /* return address register */
- a1h = reg_names[REG_A1];
-
- fprintf (file, "\n\t/* FUNCTION EPILOGUE: */\n");
-
- if (current_frame_info.args_size)
- {
- if (current_frame_info.args_size == 1)
- fprintf (file, "\t*%s--\n", sp);
- else
- {
- fprintf (file, "\t%s=%ld\n\t*%s++%s\n",
- reg_names[REG_J], -current_frame_info.args_size, sp, reg_names[REG_J]);
- }
- }
-
- if (ybase_regs_ever_used())
- {
- fprintf (file, "\t%s=%s\n", a1h, reg_names[REG_YBASE]);
- if (TARGET_YBASE_HIGH)
- fprintf (file, "\t%s=%sh+32\n", reg_names[REG_A1], a1h);
- else
- fprintf (file, "\t%s=%sh-32\n", reg_names[REG_A1], a1h);
- fprintf (file, "\t%s=%s\n", reg_names[REG_YBASE], a1h);
- }
-
- if (current_frame_info.function_makes_calls)
- fprintf (file, "\t%s=pop(*%s)\n", reg_names[RETURN_ADDRESS_REGNUM], sp);
-
- for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; --regno)
- if (dsp16xx_call_saved_register(regno))
- {
- fprintf (file, "\t%s=pop(*%s)\n", reg_names[regno], sp);
- }
-
- if (current_frame_info.var_size)
- {
- if (current_frame_info.var_size == 1)
- fprintf (file, "\t*%s--\n", sp);
- else
- {
- fprintf (file, "\t%s=%ld\n\t*%s++%s\n",
- reg_names[REG_J], -current_frame_info.var_size, sp, reg_names[REG_J]);
- }
- }
-
- fprintf (file, "\treturn\n");
- /* Reset the frame info for the next function. */
- current_frame_info = zero_frame_info;
- init_emulation_routines ();
-}
-
-/* Emit insns to move operands[1] into operands[0].
-
- Return 1 if we have written out everything that needs to be done to
- do the move. Otherwise, return 0 and the caller will emit the move
- normally. */
-
-int
-emit_move_sequence (operands, mode)
- rtx *operands;
- enum machine_mode mode;
-{
- register rtx operand0 = operands[0];
- register rtx operand1 = operands[1];
-
- /* We can only store registers to memory. */
-
- if (GET_CODE (operand0) == MEM && GET_CODE (operand1) != REG)
- operands[1] = force_reg (mode, operand1);
-
- return 0;
-}
-
-void
-double_reg_from_memory (operands)
- rtx operands[];
-{
- rtx xoperands[4];
-
- if (GET_CODE(XEXP(operands[1],0)) == POST_INC)
- {
- output_asm_insn ("%u0=%1", operands);
- output_asm_insn ("%w0=%1", operands);
- }
- else if (GET_CODE(XEXP(operands[1],0)) == POST_DEC)
- {
- xoperands[1] = XEXP (XEXP (operands[1], 0), 0);
- xoperands[0] = operands[0];
-
- /* We can't use j anymore since the compiler can allocate it. */
-/* output_asm_insn ("j=-3\n\t%u0=*%1++\n\t%w0=*%1++j", xoperands); */
- output_asm_insn ("%u0=*%1++\n\t%w0=*%1--\n\t*%1--\n\t*%1--", xoperands);
- }
- else if (GET_CODE(XEXP(operands[1],0)) == PLUS)
- {
- rtx addr;
- int offset = 0;
-
- output_asm_insn ("%u0=%1", operands);
-
-
- /* In order to print out the least significant word we must
- use 'offset + 1'. */
- addr = XEXP (operands[1], 0);
- if (GET_CODE (XEXP(addr,0)) == CONST_INT)
- offset = INTVAL(XEXP(addr,0)) + 1;
- else if (GET_CODE (XEXP(addr,1)) == CONST_INT)
- offset = INTVAL(XEXP(addr,1)) + 1;
-
- fprintf (asm_out_file, "\t%s=*(%d)\n", reg_names[REGNO(operands[0]) + 1], offset + 31);
- }
- else
- {
- xoperands[1] = XEXP(operands[1],0);
- xoperands[0] = operands[0];
-
- output_asm_insn ("%u0=*%1++\n\t%w0=*%1--", xoperands);
- }
-}
-
-
-void
-double_reg_to_memory (operands)
- rtx operands[];
-{
- rtx xoperands[4];
-
- if (GET_CODE(XEXP(operands[0],0)) == POST_INC)
- {
- output_asm_insn ("%0=%u1", operands);
- output_asm_insn ("%0=%w1", operands);
- }
- else if (GET_CODE(XEXP(operands[0],0)) == POST_DEC)
- {
- xoperands[0] = XEXP (XEXP (operands[0], 0), 0);
- xoperands[1] = operands[1];
-
- /* We can't use j anymore since the compiler can allocate it. */
-
-/* output_asm_insn ("j=-3\n\t*%0++=%u1\n\t*%0++j=%w1", xoperands); */
- output_asm_insn ("*%0++=%u1\n\t*%0--=%w1\n\t*%0--\n\t*%0--", xoperands);
-
- }
- else if (GET_CODE(XEXP(operands[0],0)) == PLUS)
- {
- rtx addr;
- int offset = 0;
-
- output_asm_insn ("%0=%u1", operands);
-
- /* In order to print out the least significant word we must
- use 'offset + 1'. */
- addr = XEXP (operands[0], 0);
- if (GET_CODE (XEXP(addr,0)) == CONST_INT)
- offset = INTVAL(XEXP(addr,0)) + 1;
- else if (GET_CODE (XEXP(addr,1)) == CONST_INT)
- offset = INTVAL(XEXP(addr,1)) + 1;
- else
- fatal_error ("invalid addressing mode");
-
- fprintf (asm_out_file, "\t*(%d)=%s\n", offset + 31, reg_names[REGNO(operands[1]) + 1]);
- }
- else
- {
- xoperands[0] = XEXP(operands[0],0);
- xoperands[1] = operands[1];
-
- output_asm_insn ("*%0++=%u1\n\t*%0--=%w1", xoperands);
- }
-}
-
-void
-override_options ()
-{
- if (chip_name == (char *) 0)
- chip_name = DEFAULT_CHIP_NAME;
-
- if (text_seg_name == (char *) 0)
- text_seg_name = DEFAULT_TEXT_SEG_NAME;
-
- if (data_seg_name == (char *) 0)
- data_seg_name = DEFAULT_DATA_SEG_NAME;
-
- if (bss_seg_name == (char *) 0)
- bss_seg_name = DEFAULT_BSS_SEG_NAME;
-
- if (const_seg_name == (char *) 0)
- const_seg_name = DEFAULT_CONST_SEG_NAME;
-
- save_chip_name = xstrdup (chip_name);
-
- rsect_text = concat (".rsect \"", text_seg_name, "\"", NULL);
- rsect_data = concat (".rsect \"", data_seg_name, "\"", NULL);
- rsect_bss = concat (".rsect \"", bss_seg_name, "\"", NULL);
- rsect_const = concat (".rsect \"", const_seg_name, "\"", NULL);
-}
-
-int
-next_cc_user_unsigned (insn)
- rtx insn;
-{
- switch (next_cc_user_code (insn))
- {
- case GTU:
- case GEU:
- case LTU:
- case LEU:
- return 1;
- default:
- return 0;
- }
-}
-
-enum rtx_code
-next_cc_user_code (insn)
- rtx insn;
-{
- /* If no insn could be found we assume that the jump has been
- deleted and the compare will be deleted later. */
-
- if (!(insn = next_cc0_user (insn)))
- return (enum rtx_code) 0;
- else if (GET_CODE (insn) == JUMP_INSN
- && GET_CODE (PATTERN (insn)) == SET
- && GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
- return GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
- else if (GET_CODE (insn) == INSN
- && GET_CODE (PATTERN (insn)) == SET
- && comparison_operator (SET_SRC (PATTERN (insn)), VOIDmode))
- return GET_CODE (SET_SRC (PATTERN (insn)));
- else
- abort ();
-}
-
-void
-print_operand(file, op, letter)
- FILE *file;
- rtx op;
- int letter;
-{
- enum rtx_code code;
-
- code = GET_CODE(op);
-
- switch (letter)
- {
- case 'I':
- code = reverse_condition (code);
- /* Fallthrough */
-
- case 'C':
- if (code == EQ)
- {
- fputs ("eq", file);
- return;
- }
- else if (code == NE)
- {
- fputs ("ne", file);
- return;
- }
- else if (code == GT || code == GTU)
- {
- fputs ("gt", file);
- return;
- }
- else if (code == LT || code == LTU)
- {
- fputs ("mi", file);
- return;
- }
- else if (code == GE || code == GEU)
- {
- fputs ("pl", file);
- return;
- }
- else if (code == LE || code == LEU)
- {
- fputs ("le", file);
- return;
- }
- else
- abort ();
- break;
-
- default:
- break;
- }
-
- if (code == REG)
- {
- /* Print the low half of a 32-bit register pair. */
- if (letter == 'w')
- fprintf (file, "%s", reg_names[REGNO (op) + 1]);
- else if (letter == 'u' || !letter)
- fprintf (file, "%s", reg_names[REGNO (op)]);
- else if (letter == 'b')
- fprintf (file, "%sh", reg_names[REGNO (op)]);
- else if (letter == 'm')
- fprintf (file, "%s", himode_reg_name[REGNO (op)]);
- else
- output_operand_lossage ("bad register extension code");
- }
- else if (code == MEM)
- output_address (XEXP(op,0));
- else if (code == CONST_INT)
- {
- HOST_WIDE_INT val = INTVAL (op);
-
- if (letter == 'H')
- fprintf (file, HOST_WIDE_INT_PRINT_HEX, val & 0xffff);
- else if (letter == 'h')
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, val);
- else if (letter == 'U')
- fprintf (file, HOST_WIDE_INT_PRINT_HEX, (val >> 16) & 0xffff);
- else
- output_addr_const(file, op);
- }
- else if (code == CONST_DOUBLE && GET_MODE(op) != DImode)
- {
- long l;
- REAL_VALUE_TYPE r;
- REAL_VALUE_FROM_CONST_DOUBLE (r, op);
- REAL_VALUE_TO_TARGET_SINGLE (r, l);
- fprintf (file, "0x%lx", l);
- }
- else if (code == CONST)
- {
- rtx addr = XEXP (op, 0);
-
- if (GET_CODE (addr) != PLUS)
- {
- output_addr_const(file, op);
- return;
- }
-
- if ((GET_CODE (XEXP (addr, 0)) == SYMBOL_REF
- || GET_CODE (XEXP (addr, 0)) == LABEL_REF)
- && (GET_CODE (XEXP (addr, 1)) == CONST_INT))
- {
- int n = INTVAL (XEXP(addr, 1));
- output_addr_const (file, XEXP (addr, 0));
-
- if (n >= 0)
- fprintf (file, "+");
-
- n = (int) (short) n;
- fprintf (file, "%d", n);
- }
- else if ((GET_CODE (XEXP (addr, 1)) == SYMBOL_REF
- || GET_CODE (XEXP (addr, 1)) == LABEL_REF)
- && (GET_CODE (XEXP (addr, 0)) == CONST_INT))
- {
- int n = INTVAL (XEXP(addr, 0));
- output_addr_const (file, XEXP (addr, 1));
-
- if (n >= 0)
- fprintf (file, "+");
-
- n = (int) (short) n;
- fprintf (file, "%d", n);
- }
- else
- output_addr_const(file, op);
- }
- else
- output_addr_const (file, op);
-}
-
-
-void
-print_operand_address(file, addr)
- FILE *file;
- rtx addr;
-{
- rtx base;
- int offset = 0;;
-
- switch (GET_CODE (addr))
- {
- case REG:
- fprintf (file, "*%s", reg_names[REGNO (addr)]);
- break;
- case POST_DEC:
- fprintf (file, "*%s--", reg_names[REGNO (XEXP (addr, 0))]);
- break;
- case POST_INC:
- fprintf (file, "*%s++", reg_names[REGNO (XEXP (addr, 0))]);
- break;
- case PLUS:
- if (GET_CODE (XEXP(addr,0)) == CONST_INT)
- offset = INTVAL(XEXP(addr,0)), base = XEXP(addr,1);
- else if (GET_CODE (XEXP(addr,1)) == CONST_INT)
- offset = INTVAL(XEXP(addr,1)), base = XEXP(addr,0);
- else
- abort();
- if (GET_CODE (base) == REG && REGNO(base) == STACK_POINTER_REGNUM)
- {
- if (offset >= -31 && offset <= 0)
- offset = 31 + offset;
- else
- fatal_error ("invalid offset in ybase addressing");
- }
- else
- fatal_error ("invalid register in ybase addressing");
-
- fprintf (file, "*(%d)", offset);
- break;
-
- default:
- if (FITS_5_BITS (addr))
- fprintf (file, "*(0x%x)", (int)(INTVAL (addr) & 0x20));
- else
- output_addr_const (file, addr);
- }
-}
-
-void
-output_dsp16xx_float_const (operands)
- rtx *operands;
-{
- rtx src = operands[1];
-
- REAL_VALUE_TYPE d;
- long value;
-
- REAL_VALUE_FROM_CONST_DOUBLE (d, src);
- REAL_VALUE_TO_TARGET_SINGLE (d, value);
-
- operands[1] = GEN_INT (value);
- output_asm_insn ("%u0=%U1\n\t%w0=%H1", operands);
-}
-
-static int
-reg_save_size ()
-{
- int reg_save_size = 0;
- int regno;
-
- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
- if (dsp16xx_call_saved_register (regno))
- {
- reg_save_size += UNITS_PER_WORD;
- }
-
- /* If the function makes calls we will save need to save the 'pr' register. */
- if (current_frame_info.function_makes_calls)
- reg_save_size += 1;
-
- return (reg_save_size);
-}
-
-#if 0
-int
-dsp16xx_starting_frame_offset()
-{
- int reg_save_size = 0;
- int regno;
-
- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
- if (dsp16xx_call_saved_register (regno))
- {
- reg_save_size += UNITS_PER_WORD;
- }
-
- return (reg_save_size);
-}
-#endif
-
-int
-initial_frame_pointer_offset()
-{
- int offset = 0;
-
- offset = compute_frame_size (get_frame_size());
-
-#ifdef STACK_GROWS_DOWNWARD
- return (offset);
-#else
- return (-offset);
-#endif
-}
-
-/* Generate the minimum number of 1600 core shift instructions
- to shift by 'shift_amount'. */
-
-#if 0
-void
-emit_1600_core_shift (shift_op, operands, shift_amount, mode)
- enum rtx_code shift_op;
- rtx *operands;
- int shift_amount;
- enum machine_mode mode;
-{
- int quotient;
- int i;
- int first_shift_emitted = 0;
-
- while (shift_amount != 0)
- {
- if (shift_amount/16)
- {
- quotient = shift_amount/16;
- shift_amount = shift_amount - (quotient * 16);
- for (i = 0; i < quotient; i++)
- emit_insn (gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx (shift_op, mode,
- first_shift_emitted
- ? operands[0] : operands[1],
- GEN_INT (16))));
- first_shift_emitted = 1;
- }
- else if (shift_amount/8)
- {
- quotient = shift_amount/8;
- shift_amount = shift_amount - (quotient * 8);
- for (i = 0; i < quotient; i++)
- emit_insn (gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx (shift_op, mode,
- first_shift_emitted
- ? operands[0] : operands[1],
- GEN_INT (8))));
- first_shift_emitted = 1;
- }
- else if (shift_amount/4)
- {
- quotient = shift_amount/4;
- shift_amount = shift_amount - (quotient * 4);
- for (i = 0; i < quotient; i++)
- emit_insn (gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx (shift_op, mode,
- first_shift_emitted
- ? operands[0] : operands[1],
- GEN_INT (4))));
- first_shift_emitted = 1;
- }
- else if (shift_amount/1)
- {
- quotient = shift_amount/1;
- shift_amount = shift_amount - (quotient * 1);
- for (i = 0; i < quotient; i++)
- emit_insn (gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx (shift_op, mode,
- first_shift_emitted
- ? operands[0] : operands[1],
- GEN_INT (1))));
- first_shift_emitted = 1;
- }
- }
-}
-#else
-void
-emit_1600_core_shift (shift_op, operands, shift_amount)
- enum rtx_code shift_op;
- rtx *operands;
- int shift_amount;
-{
- int quotient;
- int i;
- int first_shift_emitted = 0;
- const char * const *shift_asm_ptr;
- const char * const *shift_asm_ptr_first;
-
- if (shift_op == ASHIFT)
- {
- shift_asm_ptr = ashift_left_asm;
- shift_asm_ptr_first = ashift_left_asm_first;
- }
- else if (shift_op == ASHIFTRT)
- {
- shift_asm_ptr = ashift_right_asm;
- shift_asm_ptr_first = ashift_right_asm_first;
- }
- else if (shift_op == LSHIFTRT)
- {
- shift_asm_ptr = lshift_right_asm;
- shift_asm_ptr_first = lshift_right_asm_first;
- }
- else
- fatal_error ("invalid shift operator in emit_1600_core_shift");
-
- while (shift_amount != 0)
- {
- if (shift_amount/16)
- {
- quotient = shift_amount/16;
- shift_amount = shift_amount - (quotient * 16);
- for (i = 0; i < quotient; i++)
- output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_16]
- : shift_asm_ptr_first[SHIFT_INDEX_16]), operands);
- first_shift_emitted = 1;
- }
- else if (shift_amount/8)
- {
- quotient = shift_amount/8;
- shift_amount = shift_amount - (quotient * 8);
- for (i = 0; i < quotient; i++)
- output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_8]
- : shift_asm_ptr_first[SHIFT_INDEX_8]), operands);
- first_shift_emitted = 1;
- }
- else if (shift_amount/4)
- {
- quotient = shift_amount/4;
- shift_amount = shift_amount - (quotient * 4);
- for (i = 0; i < quotient; i++)
- output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_4]
- : shift_asm_ptr_first[SHIFT_INDEX_4]), operands);
- first_shift_emitted = 1;
- }
- else if (shift_amount/1)
- {
- quotient = shift_amount/1;
- shift_amount = shift_amount - (quotient * 1);
- for (i = 0; i < quotient; i++)
- output_asm_insn ((first_shift_emitted ? shift_asm_ptr[SHIFT_INDEX_1]
- : shift_asm_ptr_first[SHIFT_INDEX_1]), operands);
- first_shift_emitted = 1;
- }
- }
-}
-#endif
-
-int
-num_1600_core_shifts (shift_amount)
-int shift_amount;
-{
- int quotient;
- int i;
- int first_shift_emitted = 0;
- int num_shifts = 0;
-
- while (shift_amount != 0)
- {
- if (shift_amount/16)
- {
- quotient = shift_amount/16;
- shift_amount = shift_amount - (quotient * 16);
- for (i = 0; i < quotient; i++)
- num_shifts++;
- first_shift_emitted = 1;
- }
- else if (shift_amount/8)
- {
- quotient = shift_amount/8;
- shift_amount = shift_amount - (quotient * 8);
- for (i = 0; i < quotient; i++)
- num_shifts++;
-
- first_shift_emitted = 1;
- }
- else if (shift_amount/4)
- {
- quotient = shift_amount/4;
- shift_amount = shift_amount - (quotient * 4);
- for (i = 0; i < quotient; i++)
- num_shifts++;
-
- first_shift_emitted = 1;
- }
- else if (shift_amount/1)
- {
- quotient = shift_amount/1;
- shift_amount = shift_amount - (quotient * 1);
- for (i = 0; i < quotient; i++)
- num_shifts++;
-
- first_shift_emitted = 1;
- }
- }
- return num_shifts;
-}
-
-void
-asm_output_common(file, name, size, rounded)
- FILE *file;
- const char *name;
- int size ATTRIBUTE_UNUSED;
- int rounded;
-{
- bss_section ();
- (*targetm.asm_out.globalize_label) (file, name);
- assemble_name (file, name);
- fputs (":", file);
- if (rounded > 1)
- fprintf (file, "%d * int\n", rounded);
- else
- fprintf (file, "int\n");
-}
-
-void
-asm_output_local(file, name, size, rounded)
- FILE *file;
- const char *name;
- int size ATTRIBUTE_UNUSED;
- int rounded;
-{
- bss_section ();
- assemble_name (file, name);
- fputs (":", file);
- if (rounded > 1)
- fprintf (file, "%d * int\n", rounded);
- else
- fprintf (file, "int\n");
-}
-
-static int
-dsp16xx_address_cost (addr)
- rtx addr;
-{
- switch (GET_CODE (addr))
- {
- default:
- break;
-
- case REG:
- return 1;
-
- case CONST:
- {
- rtx offset = const0_rtx;
- addr = eliminate_constant_term (addr, &offset);
-
- if (GET_CODE (addr) == LABEL_REF)
- return 2;
-
- if (GET_CODE (addr) != SYMBOL_REF)
- return 4;
-
- if (INTVAL (offset) == 0)
- return 2;
- }
- /* fall through */
-
- case POST_INC: case POST_DEC:
- return (GET_MODE (addr) == QImode ? 1 : 2);
-
- case SYMBOL_REF: case LABEL_REF:
- return 2;
-
- case PLUS:
- {
- register rtx plus0 = XEXP (addr, 0);
- register rtx plus1 = XEXP (addr, 1);
-
- if (GET_CODE (plus0) != REG && GET_CODE (plus1) == REG)
- {
- plus0 = XEXP (addr, 1);
- plus1 = XEXP (addr, 0);
- }
-
- if (GET_CODE (plus0) != REG)
- break;
-
- switch (GET_CODE (plus1))
- {
- default:
- break;
-
- case CONST_INT:
- return 4;
-
- case CONST:
- case SYMBOL_REF:
- case LABEL_REF:
- return dsp16xx_address_cost (plus1) + 1;
- }
- }
- }
-
- return 4;
-}
-
-\f
-/* Determine whether a function argument is passed in a register, and
- which register.
-
- The arguments are CUM, which summarizes all the previous
- arguments; MODE, the machine mode of the argument; TYPE,
- the data type of the argument as a tree node or 0 if that is not known
- (which happens for C support library functions); and NAMED,
- which is 1 for an ordinary argument and 0 for nameless arguments that
- correspond to `...' in the called function's prototype.
-
- The value of the expression should either be a `reg' RTX for the
- hard register in which to pass the argument, or zero to pass the
- argument on the stack.
-
- On the dsp1610 the first four words of args are normally in registers
- and the rest are pushed. If we a long or on float mode, the argument
- must begin on an even register boundary
-
- Note that FUNCTION_ARG and FUNCTION_INCOMING_ARG were different.
- For structures that are passed in memory, but could have been
- passed in registers, we first load the structure into the
- register, and then when the last argument is passed, we store
- the registers into the stack locations. This fixes some bugs
- where GCC did not expect to have register arguments, followed. */
-
-struct rtx_def *
-dsp16xx_function_arg (args_so_far, mode, type, named)
- CUMULATIVE_ARGS args_so_far;
- enum machine_mode mode;
- tree type;
- int named;
-{
- if (TARGET_REGPARM)
- {
- if ((args_so_far & 1) != 0
- && (mode == HImode || GET_MODE_CLASS(mode) == MODE_FLOAT))
- args_so_far++;
-
- if (type == void_type_node)
- return (struct rtx_def *) 0;
-
- if (named && args_so_far < 4 && !MUST_PASS_IN_STACK (mode,type))
- return gen_rtx_REG (mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG);
- else
- return (struct rtx_def *) 0;
- }
- else
- return (struct rtx_def *) 0;
-}
-
-/* Advance the argument to the next argument position. */
-
-void
-dsp16xx_function_arg_advance (cum, mode, type, named)
- CUMULATIVE_ARGS *cum; /* current arg information */
- enum machine_mode mode; /* current arg mode */
- tree type; /* type of the argument or 0 if lib support */
- int named ATTRIBUTE_UNUSED;/* whether or not the argument was named */
-{
- if (TARGET_REGPARM)
- {
- if ((*cum & 1) != 0
- && (mode == HImode || GET_MODE_CLASS(mode) == MODE_FLOAT))
- *cum += 1;
-
- if (mode != BLKmode)
- *cum += GET_MODE_SIZE (mode);
- else
- *cum += int_size_in_bytes (type);
- }
-}
-
-static void
-dsp16xx_file_start ()
-{
- fprintf (asm_out_file, "#include <%s.h>\n", save_chip_name);
-}
-
-rtx
-gen_tst_reg (x)
- rtx x;
-{
- enum machine_mode mode;
-
- mode = GET_MODE (x);
-
- if (mode == QImode)
- emit_insn (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, x),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)))));
- else if (mode == HImode)
- emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, x));
- else
- fatal_error ("invalid mode for gen_tst_reg");
-
- return cc0_rtx;
-}
-
-rtx
-gen_compare_reg (code, x, y)
- enum rtx_code code;
- rtx x, y;
-{
- enum machine_mode mode;
-
- mode = GET_MODE (x);
- /* For floating point compare insns, a call is generated so don't
- do anything here. */
-
- if (GET_MODE_CLASS (mode) == MODE_FLOAT)
- return cc0_rtx;
-
- if (mode == QImode)
- {
- if (code == GTU || code == GEU
- || code == LTU || code == LEU)
- {
- emit_insn (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (3,
- gen_rtx_SET (VOIDmode, cc0_rtx,
- gen_rtx_COMPARE (mode, x, y)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)))));
- }
- else
- {
- emit_insn (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (3, gen_rtx_SET (VOIDmode, cc0_rtx,
- gen_rtx_COMPARE (mode, x, y)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)))));
- }
- }
- else if (mode == HImode)
- {
- if (code == GTU || code == GEU
- || code == LTU || code == LEU)
- {
- emit_insn (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (5,
- gen_rtx_SET (VOIDmode, cc0_rtx,
- gen_rtx_COMPARE (VOIDmode, x, y)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)),
- gen_rtx_CLOBBER (VOIDmode,
- gen_rtx_SCRATCH (QImode)))));
- }
- else
- emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx,
- gen_rtx_COMPARE (VOIDmode,
- force_reg (HImode, x),
- force_reg (HImode,y))));
- }
- else
- fatal_error ("invalid mode for integer comparison in gen_compare_reg");
-
- return cc0_rtx;
-}
-
-const char *
-output_block_move (operands)
- rtx operands[];
-{
- int loop_count = INTVAL(operands[2]);
- rtx xoperands[4];
-
- fprintf (asm_out_file, "\tdo %d {\n", loop_count);
- xoperands[0] = operands[4];
- xoperands[1] = operands[1];
- output_asm_insn ("%0=*%1++", xoperands);
-
- xoperands[0] = operands[0];
- xoperands[1] = operands[4];
- output_asm_insn ("*%0++=%1", xoperands);
-
- fprintf (asm_out_file, "\t}\n");
- return "";
-}
-
-int
-uns_comparison_operator (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- if (mode == VOIDmode || GET_MODE (op) == mode)
- {
- enum rtx_code code;
-
- code = GET_CODE(op);
-
- if (code == LEU || code == LTU || code == GEU
- || code == GTU)
- {
- return 1;
- }
- else
- return 0;
- }
-
- return 0;
-}
-
-int
-signed_comparison_operator (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- if (mode == VOIDmode || GET_MODE (op) == mode)
- {
- enum rtx_code code;
-
- code = GET_CODE(op);
-
- if (!(code == LEU || code == LTU || code == GEU
- || code == GTU))
- {
- return 1;
- }
- else
- return 0;
- }
-
- return 0;
-}
-\f
-static bool
-dsp16xx_rtx_costs (x, code, outer_code, total)
- rtx x;
- int code;
- int outer_code ATTRIBUTE_UNUSED;
- int *total;
-{
- switch (code)
- {
- case CONST_INT:
- *total = (unsigned HOST_WIDE_INT) INTVAL (x) < 65536 ? 0 : 2;
- return true;
-
- case LABEL_REF:
- case SYMBOL_REF:
- case CONST:
- *total = COSTS_N_INSNS (1);
- return true;
-
- case CONST_DOUBLE:
- *total = COSTS_N_INSNS (2);
- return true;
-
- case MEM:
- *total = COSTS_N_INSNS (GET_MODE (x) == QImode ? 2 : 4);
- return true;
-
- case DIV:
- case MOD:
- *total = COSTS_N_INSNS (38);
- return true;
-
- case MULT:
- if (GET_MODE (x) == QImode)
- *total = COSTS_N_INSNS (2);
- else
- *total = COSTS_N_INSNS (38);
- return true;
-
- case PLUS:
- case MINUS:
- case AND:
- case IOR:
- case XOR:
- if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
- {
- *total = 1;
- return false;
- }
- else
- {
- *total = COSTS_N_INSNS (38);
- return true;
- }
-
- case NEG:
- case NOT:
- *total = COSTS_N_INSNS (1);
- return true;
-
- case ASHIFT:
- case ASHIFTRT:
- case LSHIFTRT:
- if (GET_CODE (XEXP (x, 1)) == CONST_INT)
- {
- HOST_WIDE_INT number = INTVAL (XEXP (x, 1));
- if (number == 1 || number == 4 || number == 8
- || number == 16)
- *total = COSTS_N_INSNS (1);
- else if (TARGET_BMU)
- *total = COSTS_N_INSNS (2);
- else
- *total = COSTS_N_INSNS (num_1600_core_shifts (number));
- return true;
- }
- break;
- }
-
- if (TARGET_BMU)
- *total = COSTS_N_INSNS (1);
- else
- *total = COSTS_N_INSNS (15);
- return true;
-}
+++ /dev/null
-/* Definitions of target machine for GNU compiler. AT&T DSP1600.
- Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003
- Free Software Foundation, Inc.
- Contributed by Michael Collison (collison@isisinc.net).
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-extern const char *low_reg_names[];
-extern const char *text_seg_name;
-extern const char *rsect_text;
-extern const char *data_seg_name;
-extern const char *rsect_data;
-extern const char *bss_seg_name;
-extern const char *rsect_bss;
-extern const char *const_seg_name;
-extern const char *rsect_const;
-extern const char *chip_name;
-extern const char *save_chip_name;
-extern GTY(()) rtx dsp16xx_compare_op0;
-extern GTY(()) rtx dsp16xx_compare_op1;
-extern GTY(()) rtx dsp16xx_addhf3_libcall;
-extern GTY(()) rtx dsp16xx_subhf3_libcall;
-extern GTY(()) rtx dsp16xx_mulhf3_libcall;
-extern GTY(()) rtx dsp16xx_divhf3_libcall;
-extern GTY(()) rtx dsp16xx_cmphf3_libcall;
-extern GTY(()) rtx dsp16xx_fixhfhi2_libcall;
-extern GTY(()) rtx dsp16xx_floathihf2_libcall;
-extern GTY(()) rtx dsp16xx_neghf2_libcall;
-extern GTY(()) rtx dsp16xx_mulhi3_libcall;
-extern GTY(()) rtx dsp16xx_udivqi3_libcall;
-extern GTY(()) rtx dsp16xx_udivhi3_libcall;
-extern GTY(()) rtx dsp16xx_divqi3_libcall;
-extern GTY(()) rtx dsp16xx_divhi3_libcall;
-extern GTY(()) rtx dsp16xx_modqi3_libcall;
-extern GTY(()) rtx dsp16xx_modhi3_libcall;
-extern GTY(()) rtx dsp16xx_umodqi3_libcall;
-extern GTY(()) rtx dsp16xx_umodhi3_libcall;
-
-extern GTY(()) rtx dsp16xx_ashrhi3_libcall;
-extern GTY(()) rtx dsp16xx_ashlhi3_libcall;
-extern GTY(()) rtx dsp16xx_lshrhi3_libcall;
-
-/* RUN-TIME TARGET SPECIFICATION */
-#define DSP16XX 1
-
-/* Name of the AT&T assembler */
-
-#define ASM_PROG "as1600"
-
-/* Name of the AT&T linker */
-
-#define LD_PROG "ld1600"
-
-/* Define which switches take word arguments */
-#define WORD_SWITCH_TAKES_ARG(STR) \
- (!strcmp (STR, "ifile") ? 1 : \
- 0)
-
-#undef CC1_SPEC
-#define CC1_SPEC "%{!O*:-O}"
-
-/* Define this as a spec to call the AT&T assembler */
-
-#define CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }"
-
-/* Define this as a spec to call the AT&T linker */
-
-#define CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \
- %{r} %{s} %{t} %{u*} %{x}\
- %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
- %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
- %{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}"
-
-/* Nothing complicated here, just link with libc.a under normal
- circumstances */
-#define LIB_SPEC "-lc"
-
-/* Specify the startup file to link with. */
-#define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \
-%{mmap2:m2_crt0.o%s} \
-%{mmap3:m3_crt0.o%s} \
-%{mmap4:m4_crt0.o%s} \
-%{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
-%ea -ifile option requires a -map option}}"
-
-/* Specify the end file to link with */
-
-#define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \
-%{mmap2:m2_crtn.o%s} \
-%{mmap3:m3_crtn.o%s} \
-%{mmap4:m4_crtn.o%s} \
-%{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
-%ea -ifile option requires a -map option}}"
-
-
-/* Tell gcc where to look for the startfile */
-/*#define STANDARD_STARTFILE_PREFIX "/d1600/lib"*/
-
-/* Tell gcc where to look for it's executables */
-/*#define STANDARD_EXEC_PREFIX "/d1600/bin"*/
-
-/* Command line options to the AT&T assembler */
-#define ASM_SPEC "%{V} %{v:%{!V:-V}} %{g*:-g}"
-
-/* Command line options for the AT&T linker */
-
-#define LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i} \
-%{!ifile*:%{mmap1:m1_deflt.if%s} \
- %{mmap2:m2_deflt.if%s} \
- %{mmap3:m3_deflt.if%s} \
- %{mmap4:m4_deflt.if%s} \
- %{!mmap*:m4_deflt.if%s}} \
-%{ifile*:%*} %{r}"
-
-/* Include path is determined from the environment variable */
-#define INCLUDE_DEFAULTS \
-{ \
- { 0, 0, 0, 0, 0 } \
-}
-
-/* Names to predefine in the preprocessor for this target machine. */
-#define TARGET_CPU_CPP_BUILTINS() \
- do \
- { \
- builtin_define_std ("dsp1600"); \
- builtin_define_std ("DSP1600"); \
- } \
- while (0)
-
-#ifdef __MSDOS__
-# define TARGET_OS_CPP_BUILTINS() \
- do \
- { \
- builtin_define_std ("MSDOS"); \
- } \
- while (0)
-#else
-# define TARGET_OS_CPP_BUILTINS() \
- do \
- { \
- builtin_define_std ("dsp1610"); \
- builtin_define_std ("DSP1610"); \
- } \
- while (0)
-#endif
-
-/* Run-time compilation parameters selecting different hardware subsets. */
-
-extern int target_flags;
-
-/* Macros used in the machine description to test the flags. */
-
-#define MASK_REGPARM 0x00000001 /* Pass parameters in registers */
-#define MASK_NEAR_CALL 0x00000002 /* The call is on the same 4k page */
-#define MASK_NEAR_JUMP 0x00000004 /* The jump is on the same 4k page */
-#define MASK_BMU 0x00000008 /* Use the 'bmu' shift instructions */
-#define MASK_MAP1 0x00000040 /* Link with map1 */
-#define MASK_MAP2 0x00000080 /* Link with map2 */
-#define MASK_MAP3 0x00000100 /* Link with map3 */
-#define MASK_MAP4 0x00000200 /* Link with map4 */
-#define MASK_YBASE_HIGH 0x00000400 /* The ybase register window starts high */
-#define MASK_INIT 0x00000800 /* Have the linker generate tables to
- initialize data at startup */
-#define MASK_RESERVE_YBASE 0x00002000 /* Reserved the ybase registers */
-#define MASK_DEBUG 0x00004000 /* Debugging turned on*/
-#define MASK_SAVE_TEMPS 0x00008000 /* Save temps. option seen */
-
-/* Compile passing first two args in regs 0 and 1.
- This exists only to test compiler features that will
- be needed for RISC chips. It is not usable
- and is not intended to be usable on this cpu. */
-#define TARGET_REGPARM (target_flags & MASK_REGPARM)
-
-/* The call is on the same 4k page, so instead of loading
- the 'pt' register and branching, we can branch directly */
-
-#define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
-
-/* The jump is on the same 4k page, so instead of loading
- the 'pt' register and branching, we can branch directly */
-
-#define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
-
-/* Generate shift instructions to use the 1610 Bit Manipulation
- Unit. */
-#define TARGET_BMU (target_flags & MASK_BMU)
-
-#define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
-
-/* Direct the linker to output extra info for initialized data */
-#define TARGET_MASK_INIT (target_flags & MASK_INIT)
-
-#define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
-
-/* Reserve the ybase registers *(0) - *(31) */
-#define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
-
-/* We turn this option on internally after seeing "-g" */
-#define TARGET_DEBUG (target_flags & MASK_DEBUG)
-
-/* We turn this option on internally after seeing "-save-temps */
-#define TARGET_SAVE_TEMPS (target_flags & MASK_SAVE_TEMPS)
-
-
-/* Macro to define tables used to set the flags.
- This is a list in braces of pairs in braces,
- each pair being { "NAME", VALUE }
- where VALUE is the bits to set or minus the bits to clear.
- An empty string NAME is used to identify the default VALUE. */
-
-
-#define TARGET_SWITCHES \
- { \
- { "regparm", MASK_REGPARM, \
- N_("Pass parameters in registers (default)") }, \
- { "no-regparm", -MASK_REGPARM, \
- N_("Don't pass parameters in registers") }, \
- { "near-call", MASK_NEAR_JUMP, \
- N_("Generate code for near calls") }, \
- { "no-near-call", -MASK_NEAR_CALL, \
- N_("Don't generate code for near calls") }, \
- { "near-jump", MASK_NEAR_JUMP, \
- N_("Generate code for near jumps") }, \
- { "no-near-jump", -MASK_NEAR_JUMP, \
- N_("Don't generate code for near jumps") }, \
- { "bmu", MASK_BMU, \
- N_("Generate code for a bit-manipulation unit") }, \
- { "no-bmu", -MASK_BMU, \
- N_("Don't generate code for a bit-manipulation unit") }, \
- { "map1", MASK_MAP1, \
- N_("Generate code for memory map1") }, \
- { "map2", MASK_MAP2, \
- N_("Generate code for memory map2") }, \
- { "map3", MASK_MAP3, \
- N_("Generate code for memory map3") }, \
- { "map4", MASK_MAP4, \
- N_("Generate code for memory map4") }, \
- { "init", MASK_INIT, \
- N_("Ouput extra code for initialized data") }, \
- { "reserve-ybase", MASK_RESERVE_YBASE, \
- N_("Don't let reg. allocator use ybase registers") }, \
- { "debug", MASK_DEBUG, \
- N_("Output extra debug info in Luxworks environment") }, \
- { "save-temporaries", MASK_SAVE_TEMPS, \
- N_("Save temp. files in Luxworks environment") }, \
- { "", TARGET_DEFAULT, ""} \
- }
-
-/* Default target_flags if no switches are specified */
-#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT MASK_REGPARM|MASK_YBASE_HIGH
-#endif
-
-#define TARGET_OPTIONS \
-{ \
- { "text=", &text_seg_name, \
- N_("Specify alternate name for text section"), 0}, \
- { "data=", &data_seg_name, \
- N_("Specify alternate name for data section"), 0}, \
- { "bss=", &bss_seg_name, \
- N_("Specify alternate name for bss section"), 0}, \
- { "const=", &const_seg_name, \
- N_("Specify alternate name for constant section"), 0}, \
- { "chip=", &chip_name, \
- N_("Specify alternate name for dsp16xx chip"), 0}, \
-}
-
-/* Sometimes certain combinations of command options do not make sense
- on a particular target machine. You can define a macro
- `OVERRIDE_OPTIONS' to take account of this. This macro, if
- defined, is executed once just after all the command options have
- been parsed.
-
- Don't use this macro to turn on various extra optimizations for
- `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
-
-#define OVERRIDE_OPTIONS override_options ()
-
-#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
-{ \
- if (LEVEL >= 2) \
- { \
- /* The dsp16xx family has so few registers \
- * that running the first instruction \
- * scheduling is bad for reg. allocation \
- * since it increases lifetimes of pseudos. \
- * So turn of first scheduling pass. \
- */ \
- flag_schedule_insns = FALSE; \
- } \
-}
-\f
-/* STORAGE LAYOUT */
-
-/* Define this if most significant bit is lowest numbered
- in instructions that operate on numbered bit-fields.
- */
-#define BITS_BIG_ENDIAN 0
-
-/* Define this if most significant byte of a word is the lowest numbered.
- We define big-endian, but since the 1600 series cannot address bytes
- it does not matter. */
-#define BYTES_BIG_ENDIAN 1
-
-/* Define this if most significant word of a multiword number is numbered.
- For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
-#define WORDS_BIG_ENDIAN 1
-
-/* number of bits in an addressable storage unit */
-#define BITS_PER_UNIT 16
-
-/* Maximum number of bits in a word. */
-#define MAX_BITS_PER_WORD 16
-
-/* Width of a word, in units (bytes). */
-#define UNITS_PER_WORD 1
-
-/* Allocation boundary (in *bits*) for storing pointers in memory. */
-#define POINTER_BOUNDARY 16
-
-/* Allocation boundary (in *bits*) for storing arguments in argument list. */
-#define PARM_BOUNDARY 16
-
-/* Boundary (in *bits*) on which stack pointer should be aligned. */
-#define STACK_BOUNDARY 16
-
-/* Allocation boundary (in *bits*) for the code of a function. */
-#define FUNCTION_BOUNDARY 16
-
-/* Biggest alignment that any data type can require on this machine, in bits. */
-#define BIGGEST_ALIGNMENT 16
-
-/* Biggest alignment that any structure field can require on this machine, in bits */
-#define BIGGEST_FIELD_ALIGNMENT 16
-
-/* Alignment of field after `int : 0' in a structure. */
-#define EMPTY_FIELD_BOUNDARY 16
-
-/* Number of bits which any structure or union's size must be a multiple of. Each structure
- or union's size is rounded up to a multiple of this */
-#define STRUCTURE_SIZE_BOUNDARY 16
-
-/* Define this if move instructions will actually fail to work
- when given unaligned data. */
-#define STRICT_ALIGNMENT 1
-
-/* An integer expression for the size in bits of the largest integer machine mode that
- should actually be used. All integer machine modes of this size or smaller can be
- used for structures and unions with the appropriate sizes. */
-#define MAX_FIXED_MODE_SIZE 32
-\f
-/* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
-
-#define SHORT_TYPE_SIZE 16
-#define INT_TYPE_SIZE 16
-#define LONG_TYPE_SIZE 32
-#define LONG_LONG_TYPE_SIZE 32
-#define FLOAT_TYPE_SIZE 32
-#define DOUBLE_TYPE_SIZE 32
-#define LONG_DOUBLE_TYPE_SIZE 32
-
-/* An expression whose value is 1 or 0, according to whether the type char should be
- signed or unsigned by default. */
-
-#define DEFAULT_SIGNED_CHAR 1
-
-/* A C expression to determine whether to give an enum type only as many bytes
- as it takes to represent the range of possible values of that type. A nonzero
- value means to do that; a zero value means all enum types should be allocated
- like int. */
-
-#define DEFAULT_SHORT_ENUMS 0
-
-/* A C expression for a string describing the name of the data type to use for
- size values. */
-
-#define SIZE_TYPE "unsigned int"
-
-/* A C expression for a string describing the name of the data type to use for the
- result of subtracting two pointers */
-
-#define PTRDIFF_TYPE "int"
-
-\f
-/* REGISTER USAGE. */
-
-#define ALL_16_BIT_REGISTERS 1
-
-/* Number of actual hardware registers.
- The hardware registers are assigned numbers for the compiler
- from 0 to FIRST_PSEUDO_REGISTER-1 */
-
-#define FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1)
-
-/* 1 for registers that have pervasive standard uses
- and are not available for the register allocator.
-
- The registers are laid out as follows:
-
- {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
- {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
- {pt} - X Space Address Arithmetic Unit
- {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
- {pr} - Return Address Register
-
- We reserve r2 for the Stack Pointer.
- We specify r3 for the Frame Pointer but allow the compiler
- to omit it when possible since we have so few pointer registers. */
-
-#define REG_A0 0
-#define REG_A0L 1
-#define REG_A1 2
-#define REG_A1L 3
-#define REG_X 4
-#define REG_Y 5
-#define REG_YL 6
-#define REG_PROD 7
-#define REG_PRODL 8
-#define REG_R0 9
-#define REG_R1 10
-#define REG_R2 11
-#define REG_R3 12
-#define REG_J 13
-#define REG_K 14
-#define REG_YBASE 15
-#define REG_PT 16
-#define REG_AR0 17
-#define REG_AR1 18
-#define REG_AR2 19
-#define REG_AR3 20
-#define REG_C0 21
-#define REG_C1 22
-#define REG_C2 23
-#define REG_PR 24
-#define REG_RB 25
-#define REG_YBASE0 26
-#define REG_YBASE1 27
-#define REG_YBASE2 28
-#define REG_YBASE3 29
-#define REG_YBASE4 30
-#define REG_YBASE5 31
-#define REG_YBASE6 32
-#define REG_YBASE7 33
-#define REG_YBASE8 34
-#define REG_YBASE9 35
-#define REG_YBASE10 36
-#define REG_YBASE11 37
-#define REG_YBASE12 38
-#define REG_YBASE13 39
-#define REG_YBASE14 40
-#define REG_YBASE15 41
-#define REG_YBASE16 42
-#define REG_YBASE17 43
-#define REG_YBASE18 44
-#define REG_YBASE19 45
-#define REG_YBASE20 46
-#define REG_YBASE21 47
-#define REG_YBASE22 48
-#define REG_YBASE23 49
-#define REG_YBASE24 50
-#define REG_YBASE25 51
-#define REG_YBASE26 52
-#define REG_YBASE27 53
-#define REG_YBASE28 54
-#define REG_YBASE29 55
-#define REG_YBASE30 56
-#define REG_YBASE31 57
-
-/* Do we have an accumulator register? */
-#define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
-#define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
-
-/* Do we have a virtual ybase register */
-#define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
-
-#define IS_YBASE_ELIGIBLE_REG(REGNO) (IS_ACCUM_REG (REGNO) || IS_ADDRESS_REGISTER(REGNO) \
- || REGNO == REG_X || REGNO == REG_Y || REGNO == REG_YL \
- || REGNO == REG_PROD || REGNO == REG_PRODL)
-
-#define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
-
-#define FIXED_REGISTERS \
-{0, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 1, 0, 0, 1, \
- 1, \
- 0, 0, 0, 0, \
- 1, 1, 1, \
- 1, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0}
-
-/* 1 for registers not available across function calls.
- These must include the FIXED_REGISTERS and also any
- registers that can be used without being saved.
- The latter must include the registers where values are returned
- and the register where structure-value addresses are passed.
- On the 1610 'a0' holds return values from functions. 'r0' holds
- structure-value addresses.
-
- In addition we don't save either j, k, ybase or any of the
- bit manipulation registers. */
-
-
-#define CALL_USED_REGISTERS \
-{1, 1, 1, 1, 0, 1, 1, 1, 1, /* 0-8 */ \
- 1, 0, 0, 1, 1, 1, 1, /* 9-15 */ \
- 1, /* 16 */ \
- 0, 0, 1, 1, /* 17-20 */ \
- 1, 1, 1, /* 21-23 */ \
- 1, 1, /* 24-25 */ \
- 0, 0, 0, 0, 0, 0, 0, 0, /* 26-33 */ \
- 0, 0, 0, 0, 0, 0, 0, 0, /* 34-41 */ \
- 0, 0, 0, 0, 0, 0, 0, 0, /* 42-49 */ \
- 0, 0, 0, 0, 0, 0, 0, 0} /* 50-57 */
-
-/* List the order in which to allocate registers. Each register must be
- listed once, even those in FIXED_REGISTERS.
-
- We allocate in the following order:
- */
-
-#if 0
-#define REG_ALLOC_ORDER \
-{ REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
- REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
- REG_RB, REG_A0, REG_A1, REG_A0L, \
- REG_A1L, REG_AR2, REG_AR3, \
- REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
- REG_C1, REG_C2, REG_R3, \
- REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
- REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
- REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
- REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
- REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
- REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
- REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
- REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
-#else
-#define REG_ALLOC_ORDER \
-{ \
- REG_A0, REG_A0L, REG_A1, REG_A1L, REG_Y, REG_YL, \
- REG_PROD, \
- REG_PRODL, REG_R0, REG_J, REG_K, REG_AR2, REG_AR3, \
- REG_X, REG_R1, REG_R2, REG_RB, REG_AR0, REG_AR1, \
- REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
- REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
- REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
- REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
- REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
- REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
- REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
- REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31, \
- REG_R3, REG_YBASE, REG_PT, REG_C0, REG_C1, REG_C2, \
- REG_PR }
-#endif
-/* Zero or more C statements that may conditionally modify two
- variables `fixed_regs' and `call_used_regs' (both of type `char
- []') after they have been initialized from the two preceding
- macros.
-
- This is necessary in case the fixed or call-clobbered registers
- depend on target flags.
-
- You need not define this macro if it has no work to do.
-
- If the usage of an entire class of registers depends on the target
- flags, you may indicate this to GCC by using this macro to modify
- `fixed_regs' and `call_used_regs' to 1 for each of the registers in
- the classes which should not be used by GCC. Also define the macro
- `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
- letter for a class that shouldn't be used.
-
- (However, if this class is not included in `GENERAL_REGS' and all
- of the insn patterns whose constraints permit this class are
- controlled by target switches, then GCC will automatically avoid
- using these registers when the target switches are opposed to
- them.) If the user tells us there is no BMU, we can't use
- ar0-ar3 for register allocation */
-
-#define CONDITIONAL_REGISTER_USAGE \
-do \
- { \
- if (!TARGET_BMU) \
- { \
- int regno; \
- \
- for (regno = REG_AR0; regno <= REG_AR3; regno++) \
- fixed_regs[regno] = call_used_regs[regno] = 1; \
- } \
- if (TARGET_RESERVE_YBASE) \
- { \
- int regno; \
- \
- for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
- fixed_regs[regno] = call_used_regs[regno] = 1; \
- } \
- } \
-while (0)
-
-/* Determine which register classes are very likely used by spill registers.
- local-alloc.c won't allocate pseudos that have these classes as their
- preferred class unless they are "preferred or nothing". */
-
-#define CLASS_LIKELY_SPILLED_P(CLASS) \
- ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
-
-/* Return number of consecutive hard regs needed starting at reg REGNO
- to hold something of mode MODE.
- This is ordinarily the length in words of a value of mode MODE
- but can be less for certain modes in special long registers. */
-
-#define HARD_REGNO_NREGS(REGNO, MODE) \
- (GET_MODE_SIZE(MODE))
-
-/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
-
-#define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
-
-/* Value is 1 if it is a good idea to tie two pseudo registers
- when one has mode MODE1 and one has mode MODE2.
- If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
- for any hard reg, then this must be 0 for correct output. */
-#define MODES_TIEABLE_P(MODE1, MODE2) \
- (((MODE1) == (MODE2)) || \
- (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
- == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
-
-/* Specify the registers used for certain standard purposes.
- The values of these macros are register numbers. */
-
-/* DSP1600 pc isn't overloaded on a register. */
-/* #define PC_REGNUM */
-
-/* Register to use for pushing function arguments.
- This is r3 in our case */
-#define STACK_POINTER_REGNUM REG_R3
-
-/* Base register for access to local variables of the function.
- This is r2 in our case */
-#define FRAME_POINTER_REGNUM REG_R2
-
-/* We can debug without the frame pointer */
-#define CAN_DEBUG_WITHOUT_FP 1
-
-/* The 1610 saves the return address in this register */
-#define RETURN_ADDRESS_REGNUM REG_PR
-
-/* Base register for access to arguments of the function. */
-#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
-
-/* Register in which static-chain is passed to a function. */
-
-#define STATIC_CHAIN_REGNUM 4
-
-/* Register in which address to store a structure value
- is passed to a function. This is 'r0' in our case */
-#define STRUCT_VALUE_REGNUM REG_R0
-\f
-/* Define the classes of registers for register constraints in the
- machine description. Also define ranges of constants.
-
- One of the classes must always be named ALL_REGS and include all hard regs.
- If there is more than one class, another class must be named NO_REGS
- and contain no registers.
-
- The name GENERAL_REGS must be the name of a class (or an alias for
- another name such as ALL_REGS). This is the class of registers
- that is allowed by "g" or "r" in a register constraint.
- Also, registers outside this class are allocated only when
- instructions express preferences for them.
-
- The classes must be numbered in nondecreasing order; that is,
- a larger-numbered class must never be contained completely
- in a smaller-numbered class.
-
- For any two classes, it is very desirable that there be another
- class that represents their union. */
-
-
-enum reg_class
-{
- NO_REGS,
- A0H_REG,
- A0L_REG,
- A0_REG,
- A1H_REG,
- ACCUM_HIGH_REGS,
- A1L_REG,
- ACCUM_LOW_REGS,
- A1_REG,
- ACCUM_REGS,
- X_REG,
- X_OR_ACCUM_LOW_REGS,
- X_OR_ACCUM_REGS,
- YH_REG,
- YH_OR_ACCUM_HIGH_REGS,
- X_OR_YH_REGS,
- YL_REG,
- YL_OR_ACCUM_LOW_REGS,
- X_OR_YL_REGS,
- X_OR_Y_REGS,
- Y_REG,
- ACCUM_OR_Y_REGS,
- PH_REG,
- X_OR_PH_REGS,
- PL_REG,
- PL_OR_ACCUM_LOW_REGS,
- X_OR_PL_REGS,
- YL_OR_PL_OR_ACCUM_LOW_REGS,
- P_REG,
- ACCUM_OR_P_REGS,
- YL_OR_P_REGS,
- ACCUM_LOW_OR_YL_OR_P_REGS,
- Y_OR_P_REGS,
- ACCUM_Y_OR_P_REGS,
- NO_FRAME_Y_ADDR_REGS,
- Y_ADDR_REGS,
- ACCUM_LOW_OR_Y_ADDR_REGS,
- ACCUM_OR_Y_ADDR_REGS,
- X_OR_Y_ADDR_REGS,
- Y_OR_Y_ADDR_REGS,
- P_OR_Y_ADDR_REGS,
- NON_HIGH_YBASE_ELIGIBLE_REGS,
- YBASE_ELIGIBLE_REGS,
- J_REG,
- J_OR_DAU_16_BIT_REGS,
- BMU_REGS,
- NOHIGH_NON_ADDR_REGS,
- NON_ADDR_REGS,
- SLOW_MEM_LOAD_REGS,
- NOHIGH_NON_YBASE_REGS,
- NO_ACCUM_NON_YBASE_REGS,
- NON_YBASE_REGS,
- YBASE_VIRT_REGS,
- ACCUM_LOW_OR_YBASE_REGS,
- ACCUM_OR_YBASE_REGS,
- X_OR_YBASE_REGS,
- Y_OR_YBASE_REGS,
- ACCUM_LOW_YL_PL_OR_YBASE_REGS,
- P_OR_YBASE_REGS,
- ACCUM_Y_P_OR_YBASE_REGS,
- Y_ADDR_OR_YBASE_REGS,
- YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
- YBASE_OR_YBASE_ELIGIBLE_REGS,
- NO_HIGH_ALL_REGS,
- ALL_REGS,
- LIM_REG_CLASSES
-};
-
-/* GENERAL_REGS must be the name of a register class */
-#define GENERAL_REGS ALL_REGS
-
-#define N_REG_CLASSES (int) LIM_REG_CLASSES
-
-/* Give names of register classes as strings for dump file. */
-
-#define REG_CLASS_NAMES \
-{ \
- "NO_REGS", \
- "A0H_REG", \
- "A0L_REG", \
- "A0_REG", \
- "A1H_REG", \
- "ACCUM_HIGH_REGS", \
- "A1L_REG", \
- "ACCUM_LOW_REGS", \
- "A1_REG", \
- "ACCUM_REGS", \
- "X_REG", \
- "X_OR_ACCUM_LOW_REGS", \
- "X_OR_ACCUM_REGS", \
- "YH_REG", \
- "YH_OR_ACCUM_HIGH_REGS", \
- "X_OR_YH_REGS", \
- "YL_REG", \
- "YL_OR_ACCUM_LOW_REGS", \
- "X_OR_YL_REGS", \
- "X_OR_Y_REGS", \
- "Y_REG", \
- "ACCUM_OR_Y_REGS", \
- "PH_REG", \
- "X_OR_PH_REGS", \
- "PL_REG", \
- "PL_OR_ACCUM_LOW_REGS", \
- "X_OR_PL_REGS", \
- "PL_OR_YL_OR_ACCUM_LOW_REGS", \
- "P_REG", \
- "ACCUM_OR_P_REGS", \
- "YL_OR_P_REGS", \
- "ACCUM_LOW_OR_YL_OR_P_REGS", \
- "Y_OR_P_REGS", \
- "ACCUM_Y_OR_P_REGS", \
- "NO_FRAME_Y_ADDR_REGS", \
- "Y_ADDR_REGS", \
- "ACCUM_LOW_OR_Y_ADDR_REGS", \
- "ACCUM_OR_Y_ADDR_REGS", \
- "X_OR_Y_ADDR_REGS", \
- "Y_OR_Y_ADDR_REGS", \
- "P_OR_Y_ADDR_REGS", \
- "NON_HIGH_YBASE_ELIGIBLE_REGS", \
- "YBASE_ELIGIBLE_REGS", \
- "J_REG", \
- "J_OR_DAU_16_BIT_REGS", \
- "BMU_REGS", \
- "NOHIGH_NON_ADDR_REGS", \
- "NON_ADDR_REGS", \
- "SLOW_MEM_LOAD_REGS", \
- "NOHIGH_NON_YBASE_REGS", \
- "NO_ACCUM_NON_YBASE_REGS", \
- "NON_YBASE_REGS", \
- "YBASE_VIRT_REGS", \
- "ACCUM_LOW_OR_YBASE_REGS", \
- "ACCUM_OR_YBASE_REGS", \
- "X_OR_YBASE_REGS", \
- "Y_OR_YBASE_REGS", \
- "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \
- "P_OR_YBASE_REGS", \
- "ACCUM_Y_P_OR_YBASE_REGS", \
- "Y_ADDR_OR_YBASE_REGS", \
- "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \
- "YBASE_OR_YBASE_ELIGIBLE_REGS", \
- "NO_HIGH_ALL_REGS", \
- "ALL_REGS" \
-}
-
-/* Define which registers fit in which classes.
- This is an initializer for a vector of HARD_REG_SET
- of length N_REG_CLASSES. */
-
-#define REG_CLASS_CONTENTS \
-{ \
- {0x00000000, 0x00000000}, /* no reg */ \
- {0x00000001, 0x00000000}, /* a0h */ \
- {0x00000002, 0x00000000}, /* a0l */ \
- {0x00000003, 0x00000000}, /* a0h:a0l */ \
- {0x00000004, 0x00000000}, /* a1h */ \
- {0x00000005, 0x00000000}, /* accum high */ \
- {0x00000008, 0x00000000}, /* a1l */ \
- {0x0000000A, 0x00000000}, /* accum low */ \
- {0x0000000c, 0x00000000}, /* a1h:a1l */ \
- {0x0000000f, 0x00000000}, /* accum regs */ \
- {0x00000010, 0x00000000}, /* x reg */ \
- {0x0000001A, 0x00000000}, /* x & accum_low_regs */ \
- {0x0000001f, 0x00000000}, /* x & accum regs */ \
- {0x00000020, 0x00000000}, /* y high */ \
- {0x00000025, 0x00000000}, /* yh, accum high */ \
- {0x00000030, 0x00000000}, /* x & yh */ \
- {0x00000040, 0x00000000}, /* y low */ \
- {0x0000004A, 0x00000000}, /* y low, accum_low */ \
- {0x00000050, 0x00000000}, /* x & yl */ \
- {0x00000060, 0x00000000}, /* yl:yh */ \
- {0x00000070, 0x00000000}, /* x, yh,a nd yl */ \
- {0x0000006F, 0x00000000}, /* accum, y */ \
- {0x00000080, 0x00000000}, /* p high */ \
- {0x00000090, 0x00000000}, /* x & ph */ \
- {0x00000100, 0x00000000}, /* p low */ \
- {0x0000010A, 0x00000000}, /* p_low and accum_low */ \
- {0x00000110, 0x00000000}, /* x & pl */ \
- {0x0000014A, 0x00000000}, /* pl,yl,a1l,a0l */ \
- {0x00000180, 0x00000000}, /* pl:ph */ \
- {0x0000018F, 0x00000000}, /* accum, p */ \
- {0x000001C0, 0x00000000}, /* pl:ph and yl */ \
- {0x000001CA, 0x00000000}, /* pl:ph, yl, a0l, a1l */ \
- {0x000001E0, 0x00000000}, /* y or p */ \
- {0x000001EF, 0x00000000}, /* accum, y or p */ \
- {0x00000E00, 0x00000000}, /* r0-r2 */ \
- {0x00001E00, 0x00000000}, /* r0-r3 */ \
- {0x00001E0A, 0x00000000}, /* r0-r3, accum_low */ \
- {0x00001E0F, 0x00000000}, /* accum,r0-r3 */ \
- {0x00001E10, 0x00000000}, /* x,r0-r3 */ \
- {0x00001E60, 0x00000000}, /* y,r0-r3 */ \
- {0x00001F80, 0x00000000}, /* p,r0-r3 */ \
- {0x00001FDA, 0x00000000}, /* ph:pl, r0-r3, x,a0l,a1l */ \
- {0x00001fff, 0x00000000}, /* accum,x,y,p,r0-r3 */ \
- {0x00002000, 0x00000000}, /* j */ \
- {0x00002025, 0x00000000}, /* j, yh, a1h, a0h */ \
- {0x001E0000, 0x00000000}, /* ar0-ar3 */ \
- {0x03FFE1DA, 0x00000000}, /* non_addr except yh,a0h,a1h */ \
- {0x03FFE1FF, 0x00000000}, /* non_addr regs */ \
- {0x03FFFF8F, 0x00000000}, /* non ybase except yh, yl, and x */ \
- {0x03FFFFDA, 0x00000000}, /* non ybase regs except yh,a0h,a1h */ \
- {0x03FFFFF0, 0x00000000}, /* non ybase except a0,a0l,a1,a1l */ \
- {0x03FFFFFF, 0x00000000}, /* non ybase regs */ \
- {0xFC000000, 0x03FFFFFF}, /* virt ybase regs */ \
- {0xFC00000A, 0x03FFFFFF}, /* accum_low, virt ybase regs */ \
- {0xFC00000F, 0x03FFFFFF}, /* accum, virt ybase regs */ \
- {0xFC000010, 0x03FFFFFF}, /* x,virt ybase regs */ \
- {0xFC000060, 0x03FFFFFF}, /* y,virt ybase regs */ \
- {0xFC00014A, 0x03FFFFFF}, /* accum_low, yl, pl, ybase */ \
- {0xFC000180, 0x03FFFFFF}, /* p,virt ybase regs */ \
- {0xFC0001EF, 0x03FFFFFF}, /* accum,y,p,ybase regs */ \
- {0xFC001E00, 0x03FFFFFF}, /* r0-r3, ybase regs */ \
- {0xFC001FDA, 0x03FFFFFF}, /* r0-r3, pl:ph,yl,x,a1l,a0l */ \
- {0xFC001FFF, 0x03FFFFFF}, /* virt ybase, ybase eligible regs */ \
- {0xFCFFFFDA, 0x03FFFFFF}, /* all regs except yh,a0h,a1h */ \
- {0xFFFFFFFF, 0x03FFFFFF} /* all regs */ \
-}
-
-
-/* The same information, inverted:
- Return the class number of the smallest class containing
- reg number REGNO. This could be a conditional expression
- or could index an array. */
-
-#define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
-
-/* The class value for index registers, and the one for base regs. */
-
-#define INDEX_REG_CLASS NO_REGS
-#define BASE_REG_CLASS Y_ADDR_REGS
-
-/* Get reg_class from a letter such as appears in the machine description. */
-
-#define REG_CLASS_FROM_LETTER(C) \
- dsp16xx_reg_class_from_letter(C)
-
-#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
- secondary_reload_class(CLASS, MODE, X)
-
-/* When defined, the compiler allows registers explicitly used in the
- rtl to be used as spill registers but prevents the compiler from
- extending the lifetime of these registers. */
-
-#define SMALL_REGISTER_CLASSES 1
-
-/* Macros to check register numbers against specific register classes. */
-
-/* These assume that REGNO is a hard or pseudo reg number.
- They give nonzero only if REGNO is a hard reg of the suitable class
- or a pseudo reg currently allocated to a suitable hard reg.
- Since they use reg_renumber, they are safe only once reg_renumber
- has been allocated, which happens in local-alloc.c. */
-
-/* A C expression which is nonzero if register REGNO is suitable for use
- as a base register in operand addresses. It may be either a suitable
- hard register or a pseudo register that has been allocated such a
- hard register.
-
- On the 1610 the Y address pointers can be used as a base registers */
-#define REGNO_OK_FOR_BASE_P(REGNO) \
-(((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
- && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
-
-#define REGNO_OK_FOR_YBASE_P(REGNO) \
- (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
-
-#define REGNO_OK_FOR_INDEX_P(REGNO) 0
-
-#ifdef ALL_16_BIT_REGISTERS
-#define IS_32_BIT_REG(REGNO) 0
-#else
-#define IS_32_BIT_REG(REGNO) \
- ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
-#endif
-
-/* Given an rtx X being reloaded into a reg required to be
- in class CLASS, return the class of reg to actually use.
- In general this is just CLASS; but on some machines
- in some cases it is preferable to use a more restrictive class.
- Also, we must ensure that a PLUS is reloaded either
- into an accumulator or an address register. */
-
-#define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
-
-/* A C expression that places additional restrictions on the register
- class to use when it is necessary to be able to hold a value of
- mode MODE in a reload register for which class CLASS would
- ordinarily be used.
-
- Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
- there are certain modes that simply can't go in certain reload
- classes.
-
- The value is a register class; perhaps CLASS, or perhaps another,
- smaller class.
-
- Don't define this macro unless the target machine has limitations
- which require the macro to do something nontrivial. */
-
-#if 0
-#define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
-#endif
-
-/* A C expression for the maximum number of consecutive registers of class CLASS
- needed to hold a value of mode MODE */
-#define CLASS_MAX_NREGS(CLASS, MODE) \
- class_max_nregs(CLASS, MODE)
-
-/* The letters 'I' through 'P' in a register constraint string
- can be used to stand for particular ranges of immediate operands.
- This macro defines what the ranges are.
- C is the letter, and VALUE is a constant value.
- Return 1 if VALUE is in the range specified by C.
-
- For the 16xx, the following constraints are used:
- 'I' requires a non-negative 16-bit value.
- 'J' requires a non-negative 9-bit value
- 'K' requires a constant 0 operand.
- 'L' constant for use in add or sub from low 16-bits
- 'M' 32-bit value -- low 16-bits zero
- 'N' constant for use incrementing or decrementing an address register
- 'O' constant for use with and'ing only high 16-bit
- 'P' constant for use with and'ing only low 16-bit
- */
-
-#define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
-#define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
-#define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
-#define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
-#define ADD_LOW_16(I) ((I) >= 0 && (I) <= 32767)
-#define ADD_HIGH_16(I) (((I) & 0x0000ffff) == 0)
-#define AND_LOW_16(I) ((I) >= 0 && (I) <= 32767)
-#define AND_HIGH_16(I) (((I) & 0x0000ffff) == 0)
-
-#define CONST_OK_FOR_LETTER_P(VALUE, C) \
- ((C) == 'I' ? (SMALL_INTVAL(VALUE)) \
- : (C) == 'J' ? (SHORT_INTVAL(VALUE)) \
- : (C) == 'K' ? ((VALUE) == 0) \
- : (C) == 'L' ? ((VALUE) >= 0 && (VALUE) <= 32767) \
- : (C) == 'M' ? (((VALUE) & 0x0000ffff) == 0) \
- : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1 \
- || (VALUE) == -2 || (VALUE) == 2) \
- : (C) == 'O' ? (((VALUE) & 0xffff0000) == 0xffff0000) \
- : (C) == 'P' ? (((VALUE) & 0x0000ffff) == 0xffff) \
- : 0)
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
-
-/* Optional extra constraints for this machine */
-#define EXTRA_CONSTRAINT(OP,C) \
- ((C) == 'R' ? symbolic_address_p (OP) \
- : 0)
-\f
-/* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
-
-/* Define this if pushing a word on the stack
- makes the stack pointer a smaller address. */
-/* #define STACK_GROWS_DOWNWARD */
-
-/* Define this if the nominal address of the stack frame
- is at the high-address end of the local variables;
- that is, each additional local variable allocated
- goes at a more negative offset in the frame. */
-/* #define FRAME_GROWS_DOWNWARD */
-
-#define ARGS_GROW_DOWNWARD
-
-/* We use post decrement on the 1600 because there isn't
- a pre-decrement addressing mode. This means that we
- assume the stack pointer always points at the next
- FREE location on the stack. */
-#define STACK_PUSH_CODE POST_INC
-
-/* Offset within stack frame to start allocating local variables at.
- If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
- first local allocated. Otherwise, it is the offset to the BEGINNING
- of the first local allocated. */
-#define STARTING_FRAME_OFFSET 0
-
-/* Offset from the stack pointer register to the first
- location at which outgoing arguments are placed. */
-#define STACK_POINTER_OFFSET (0)
-
-struct dsp16xx_frame_info
-{
- unsigned long total_size; /* # bytes that the entire frame takes up */
- unsigned long var_size; /* # bytes that variables take up */
- unsigned long args_size; /* # bytes that outgoing arguments take up */
- unsigned long extra_size; /* # bytes of extra gunk */
- unsigned int reg_size; /* # bytes needed to store regs */
- long fp_save_offset; /* offset from vfp to store registers */
- unsigned long sp_save_offset; /* offset from new sp to store registers */
- int pr_save_offset; /* offset to saved PR */
- int initialized; /* != 0 if frame size already calculated */
- int num_regs; /* number of registers saved */
- int function_makes_calls; /* Does the function make calls */
-};
-
-extern struct dsp16xx_frame_info current_frame_info;
-
-#define RETURN_ADDR_OFF current_frame_info.pr_save_offset
-
-/* If we generate an insn to push BYTES bytes,
- this says how many the stack pointer really advances by. */
-/* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
-
-/* If defined, the maximum amount of space required for outgoing
- arguments will be computed and placed into the variable
- 'current_function_outgoing_args_size'. No space will be pushed
- onto the stack for each call; instead, the function prologue should
- increase the stack frame size by this amount.
-
- It is not proper to define both 'PUSH_ROUNDING' and
- 'ACCUMULATE_OUTGOING_ARGS'. */
-#define ACCUMULATE_OUTGOING_ARGS 1
-
-/* Offset of first parameter from the argument pointer
- register value. */
-
-#define FIRST_PARM_OFFSET(FNDECL) (0)
-
-/* Value is 1 if returning from a function call automatically
- pops the arguments described by the number-of-args field in the call.
- FUNDECL is the declaration node of the function (as a tree),
- FUNTYPE is the data type of the function (as a tree),
- or for a library call it is an identifier node for the subroutine name. */
-
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-
-/* Define how to find the value returned by a function.
- VALTYPE is the data type of the value (as a tree).
- If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 0. On the 1610 all function return their values
- in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
- entire register is significant. */
-
-#define VALUE_REGNO(MODE) (REG_Y)
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
-
-/* Define how to find the value returned by a library function
- assuming the value has mode MODE. */
-#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
-
-/* 1 if N is a possible register number for a function value. */
-#define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
-\f
-
-/* Define where to put the arguments to a function.
- Value is zero to push the argument on the stack,
- or a hard register in which to store the argument.
-
- MODE is the argument's machine mode.
- TYPE is the data type of the argument (as a tree).
- This is null for libcalls where that information may
- not be available.
- CUM is a variable of type CUMULATIVE_ARGS which gives info about
- the preceding args and about the function being called.
- NAMED is nonzero if this argument is a named parameter
- (otherwise it is an extra parameter matching an ellipsis). */
-
-/* On the 1610 all args are pushed, except if -mregparm is specified
- then the first two words of arguments are passed in a0, a1. */
-#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
- dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
-
-/* Define the first register to be used for argument passing */
-#define FIRST_REG_FOR_FUNCTION_ARG REG_Y
-
-/* Define the profitability of saving registers around calls.
- NOTE: For now we turn this off because of a bug in the
- caller-saves code and also because i'm not sure it is helpful
- on the 1610. */
-
-#define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
-
-/* This indicates that an argument is to be passed with an invisible reference
- (i.e., a pointer to the object is passed).
-
- On the dsp16xx, we do this if it must be passed on the stack. */
-
-#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
- (MUST_PASS_IN_STACK (MODE, TYPE))
-
-/* For an arg passed partly in registers and partly in memory,
- this is the number of registers used.
- For args passed entirely in registers or entirely in memory, zero. */
-
-#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
-
-/* Define a data type for recording info about an argument list
- during the scan of that argument list. This data type should
- hold all necessary information about the function itself
- and about the args processed so far, enough to enable macros
- such as FUNCTION_ARG to determine where the next arg should go. */
-#define CUMULATIVE_ARGS int
-
-/* Initialize a variable CUM of type CUMULATIVE_ARGS
- for a call to a function whose data type is FNTYPE.
- For a library call, FNTYPE is 0. */
-#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
- ((CUM) = 0)
-
-/* Update the data in CUM to advance over an argument
- of mode MODE and data type TYPE.
- (TYPE is null for libcalls where that information may not be available.) */
-
-#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
- dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
-
-/* 1 if N is a possible register number for function argument passing. */
-#define FUNCTION_ARG_REGNO_P(N) \
- ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
-
-/* Output assembler code to FILE to increment profiler label # LABELNO
- for profiling a function entry. */
-
-#define FUNCTION_PROFILER(FILE, LABELNO) \
- internal_error ("profiling not implemented yet")
-
-/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
- the stack pointer does not matter. The value is tested only in
- functions that have frame pointers.
- No definition is equivalent to always zero. */
-
-#define EXIT_IGNORE_STACK (0)
-
-#define TRAMPOLINE_TEMPLATE(FILE) \
- internal_error ("trampolines not yet implemented");
-
-/* Length in units of the trampoline for entering a nested function.
- This is a dummy value */
-
-#define TRAMPOLINE_SIZE 20
-
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function. */
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
- internal_error ("trampolines not yet implemented");
-
-/* A C expression which is nonzero if a function must have and use a
- frame pointer. If its value is nonzero the functions will have a
- frame pointer. */
-#define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
-
-/* A C statement to store in the variable 'DEPTH' the difference
- between the frame pointer and the stack pointer values immediately
- after the function prologue. */
-#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
-{ (DEPTH) = initial_frame_pointer_offset(); \
-}
-\f
-/* IMPLICIT CALLS TO LIBRARY ROUTINES */
-
-#define ADDHF3_LIBCALL "__Emulate_addhf3"
-#define SUBHF3_LIBCALL "__Emulate_subhf3"
-#define MULHF3_LIBCALL "__Emulate_mulhf3"
-#define DIVHF3_LIBCALL "__Emulate_divhf3"
-#define CMPHF3_LIBCALL "__Emulate_cmphf3"
-#define FIXHFHI2_LIBCALL "__Emulate_fixhfhi2"
-#define FLOATHIHF2_LIBCALL "__Emulate_floathihf2"
-#define NEGHF2_LIBCALL "__Emulate_neghf2"
-
-#define UMULHI3_LIBCALL "__Emulate_umulhi3"
-#define MULHI3_LIBCALL "__Emulate_mulhi3"
-#define UDIVQI3_LIBCALL "__Emulate_udivqi3"
-#define UDIVHI3_LIBCALL "__Emulate_udivhi3"
-#define DIVQI3_LIBCALL "__Emulate_divqi3"
-#define DIVHI3_LIBCALL "__Emulate_divhi3"
-#define MODQI3_LIBCALL "__Emulate_modqi3"
-#define MODHI3_LIBCALL "__Emulate_modhi3"
-#define UMODQI3_LIBCALL "__Emulate_umodqi3"
-#define UMODHI3_LIBCALL "__Emulate_umodhi3"
-#define ASHRHI3_LIBCALL "__Emulate_ashrhi3"
-#define LSHRHI3_LIBCALL "__Emulate_lshrhi3"
-#define ASHLHI3_LIBCALL "__Emulate_ashlhi3"
-#define LSHLHI3_LIBCALL "__Emulate_lshlhi3" /* NOT USED */
-
-/* Define this macro if calls to the ANSI C library functions memcpy and
- memset should be generated instead of the BSD function bcopy & bzero. */
-#define TARGET_MEM_FUNCTIONS
-
-\f
-/* ADDRESSING MODES */
-
-/* The 1610 has post-increment and decrement, but no pre-modify */
-#define HAVE_POST_INCREMENT 1
-#define HAVE_POST_DECREMENT 1
-
-/* Recognize any constant value that is a valid address. */
-#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
-
-/* Maximum number of registers that can appear in a valid memory address. */
-#define MAX_REGS_PER_ADDRESS 1
-
-/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
- and check its validity for a certain class.
- We have two alternate definitions for each of them.
- The usual definition accepts all pseudo regs; the other rejects
- them unless they have been allocated suitable hard regs.
- The symbol REG_OK_STRICT causes the latter definition to be used.
-
- Most source files want to accept pseudo regs in the hope that
- they will get allocated to the class that the insn wants them to be in.
- Source files for reload pass need to be strict.
- After reload, it makes no difference, since pseudo regs have
- been eliminated by then. */
-
-#ifndef REG_OK_STRICT
-
-/* Nonzero if X is a hard reg that can be used as an index
- or if it is a pseudo reg. */
-#define REG_OK_FOR_INDEX_P(X) 0
-
-/* Nonzero if X is a hard reg that can be used as a base reg
- or if it is a pseudo reg. */
-#define REG_OK_FOR_BASE_P(X) \
- ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
- || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
-
-/* Nonzero if X is the 'ybase' register */
-#define REG_OK_FOR_YBASE_P(X) \
- (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
-#else
-
-/* Nonzero if X is a hard reg that can be used as an index. */
-#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
-
-/* Nonzero if X is a hard reg that can be used as a base reg. */
-#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
-
-/* Nonzero if X is the 'ybase' register */
-#define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
-
-#endif
-\f
-/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
- that is a valid memory address for an instruction.
- The MODE argument is the machine mode for the MEM expression
- that wants to use this address.
-
- On the 1610, the actual legitimate addresses must be N (N must fit in
- 5 bits), *rn (register indirect), *rn++, or *rn-- */
-
-#define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
-#define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
-#define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
-#define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
-
-#define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
-#define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
-#define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
-
-#define INDIRECTABLE_ADDRESS_P(X) \
- ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
- || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
- && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
- || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
-
-
-#define INDEXABLE_ADDRESS_P(X,MODE) \
- ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
- XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
- !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
- (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
- XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
- !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
-
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
-{ \
- if (INDIRECTABLE_ADDRESS_P(X)) \
- goto ADDR; \
-}
-
-\f
-/* Try machine-dependent ways of modifying an illegitimate address
- to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c.
-
- OLDX is the address as it was before break_out_memory_refs was called.
- In some cases it is useful to look at this to decide what needs to be done.
-
- MODE and WIN are passed so that this macro can use
- GO_IF_LEGITIMATE_ADDRESS.
-
- It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output.
-
- For the 1610, we need not do anything. However, if we don't,
- `memory_address' will try lots of things to get a valid address, most of
- which will result in dead code and extra pseudos. So we make the address
- valid here.
-
- This is easy: The only valid addresses are an offset from a register
- and we know the address isn't valid. So just call either `force_operand'
- or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
-
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
-{ if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
- X = XEXP (x, 0); \
- if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
- X = force_operand (X, 0); \
- else \
- X = force_reg (Pmode, X); \
- goto WIN; \
-}
-
-/* Go to LABEL if ADDR (a legitimate address expression)
- has an effect that depends on the machine mode it is used for.
- On the 1610, only postdecrement and postincrement address depend thus
- (the amount of decrement or increment being the length of the operand). */
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
- if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
-
-/* Nonzero if the constant value X is a legitimate general operand.
- It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
-#define LEGITIMATE_CONSTANT_P(X) (1)
-
-\f
-/* CONDITION CODE INFORMATION */
-
-/* Store in cc_status the expressions
- that the condition codes will describe
- after execution of an instruction whose pattern is EXP.
- Do not alter them if the instruction would not alter the cc's. */
-
-#define NOTICE_UPDATE_CC(EXP, INSN) \
- notice_update_cc( (EXP) )
-\f
-/* DESCRIBING RELATIVE COSTS OF OPERATIONS */
-
-/* A c expression for the cost of moving data from a register in
- class FROM to one in class TO. The classes are expressed using
- the enumeration values such as GENERAL_REGS. A value of 2 is
- the default. */
-#define REGISTER_MOVE_COST(MODE,FROM,TO) dsp16xx_register_move_cost (FROM, TO)
-
-/* A C expression for the cost of moving data of mode MODE between
- a register and memory. A value of 2 is the default. */
-#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
- (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
- : 16)
-
-/* A C expression for the cost of a branch instruction. A value of
- 1 is the default; */
-#define BRANCH_COST 1
-\f
-
-/* Define this because otherwise gcc will try to put the function address
- in any old pseudo register. We can only use pt. */
-#define NO_FUNCTION_CSE
-
-/* Define this macro as a C expression which is nonzero if accessing less
- than a word of memory (i.e a char or short) is no faster than accessing
- a word of memory, i.e if such access require more than one instruction
- or if there is no difference in cost between byte and (aligned) word
- loads. */
-#define SLOW_BYTE_ACCESS 1
-
-/* Define this macro if unaligned accesses have a cost many times greater than
- aligned accesses, for example if they are emulated in a trap handler */
-/* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
-
-\f
-/* DIVIDING THE OUTPUT IN SECTIONS */
-/* Output before read-only data. */
-
-#define DEFAULT_TEXT_SEG_NAME ".text"
-#define TEXT_SECTION_ASM_OP rsect_text
-
-/* Output before constants and strings */
-#define DEFAULT_CONST_SEG_NAME ".const"
-#define READONLY_DATA_SECTION_ASM_OP rsect_const
-
-/* Output before writable data. */
-#define DEFAULT_DATA_SEG_NAME ".data"
-#define DATA_SECTION_ASM_OP rsect_data
-
-#define DEFAULT_BSS_SEG_NAME ".bss"
-#define BSS_SECTION_ASM_OP rsect_bss
-
-/* We will default to using 1610 if the user doesn't
- specify it. */
-#define DEFAULT_CHIP_NAME "1610"
-\f
-/* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
-
-/* A C string constant describing how to begin a comment in the target
- assembler language. */
-#define ASM_COMMENT_START ""
-#define ASM_COMMENT_END ""
-
-/* Output to assembler file text saying following lines
- may contain character constants, extra white space, comments, etc. */
-#define ASM_APP_ON ""
-
-/* Output to assembler file text saying following lines
- no longer contain unusual constructs. */
-#define ASM_APP_OFF ""
-\f
-/* OUTPUT OF DATA */
-
-/* This is how we output a 'c' character string. For the 16xx
- assembler we have to do it one letter at a time */
-
-#define ASCII_LENGTH 10
-
-#define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
- do { \
- FILE *_hide_asm_out_file = (MYFILE); \
- const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
- int _hide_thissize = (MYLENGTH); \
- { \
- FILE *asm_out_file = _hide_asm_out_file; \
- const unsigned char *p = _hide_p; \
- int thissize = _hide_thissize; \
- int i; \
- \
- for (i = 0; i < thissize; i++) \
- { \
- register int c = p[i]; \
- \
- if (i % ASCII_LENGTH == 0) \
- fprintf (asm_out_file, "\tint "); \
- \
- if (c >= ' ' && c < 0177 && c != '\'') \
- { \
- putc ('\'', asm_out_file); \
- putc (c, asm_out_file); \
- putc ('\'', asm_out_file); \
- } \
- else \
- { \
- fprintf (asm_out_file, "%d", c); \
- /* After an octal-escape, if a digit follows, \
- terminate one string constant and start another. \
- The VAX assembler fails to stop reading the escape \
- after three digits, so this is the only way we \
- can get it to parse the data properly. \
- if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
- fprintf (asm_out_file, "\'\n\tint \'"); \
- */ \
- } \
- /* if: \
- we are not at the last char (i != thissize -1) \
- and (we are not at a line break multiple \
- but i == 0) (it will be the very first time) \
- then put out a comma to extend. \
- */ \
- if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
- fprintf(asm_out_file, ","); \
- if (!((i + 1) % ASCII_LENGTH)) \
- fprintf (asm_out_file, "\n"); \
- } \
- fprintf (asm_out_file, "\n"); \
- } \
- } \
- while (0)
-
-#define ASM_PN_FORMAT "*L%s_%lu"
-\f
-/* OUTPUT OF UNINITIALIZED VARIABLES */
-
-/* This says how to output an assembler line
- to define a global common symbol. */
-
-#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
- asm_output_common (FILE, NAME, SIZE, ROUNDED);
-
-/* This says how to output an assembler line
- to define a local common symbol. */
-
-#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
- asm_output_local (FILE, NAME, SIZE, ROUNDED);
-\f
-/* OUTPUT AND GENERATION OF LABELS */
-
-/* Globalizing directive for a label. */
-#define GLOBAL_ASM_OP ".global "
-
-/* A C statement to output to the stdio stream any text necessary
- for declaring the name of an external symbol named name which
- is referenced in this compilation but not defined. */
-
-#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
-{ \
- fprintf (FILE, ".extern "); \
- assemble_name (FILE, NAME); \
- fprintf (FILE, "\n"); \
-}
-/* A C statement to output on stream an assembler pseudo-op to
- declare a library function named external. */
-
-#define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
-{ \
- fprintf (FILE, ".extern "); \
- assemble_name (FILE, XSTR (FUN, 0)); \
- fprintf (FILE, "\n"); \
-}
-
-/* The prefix to add to user-visible assembler symbols. */
-
-#define USER_LABEL_PREFIX "_"
-
-/* This is how to store into the string LABEL
- the symbol_ref name of an internal numbered label where
- PREFIX is the class of label and NUM is the number within the class.
- This is suitable for output with `assemble_name'. */
-#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
- sprintf (LABEL, "*%s%lu", PREFIX, (unsigned long)(NUM))
-
-\f
-/* OUTPUT OF ASSEMBLER INSTRUCTIONS */
-
-/* How to refer to registers in assembler output.
- This sequence is indexed by compiler's hard-register-number (see above). */
-
-#define REGISTER_NAMES \
-{"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl", \
- "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
- "ar0", "ar1", "ar2", "ar3", \
- "c0", "c1", "c2", "pr", "rb", \
- "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
- "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
- "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
- "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
- "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
- "*(30)", "*(31)" }
-
-#define HIMODE_REGISTER_NAMES \
-{"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p", \
- "r0", "r1", "r2", "r3", "j", "k", "ybase", "pt", \
- "ar0", "ar1", "ar2", "ar3", \
- "c0", "c1", "c2", "pr", "rb", \
- "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)", \
- "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)", \
- "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
- "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
- "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
- "*(30)", "*(31)" }
-
-#define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
-
-/* Print operand X (an rtx) in assembler syntax to file FILE.
- CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
- For `%' followed by punctuation, CODE is the punctuation and X is null.
-
- DSP1610 extensions for operand codes:
-
- %H - print lower 16 bits of constant
- %U - print upper 16 bits of constant
- %w - print low half of register (e.g 'a0l')
- %u - print upper half of register (e.g 'a0')
- %b - print high half of accumulator for F3 ALU instructions
- %h - print constant in decimal */
-
-#define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
-
-
-/* Print a memory address as an operand to reference that memory location. */
-
-#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
-
-/* This is how to output an insn to push a register on the stack.
- It need not be very fast code since it is used only for profiling */
-#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
- internal_error ("profiling not implemented yet");
-
-/* This is how to output an insn to pop a register from the stack.
- It need not be very fast code since it is used only for profiling */
-#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
- internal_error ("profiling not implemented yet");
-\f
-/* OUTPUT OF DISPATCH TABLES */
-
-/* This macro should be provided on machines where the addresses in a dispatch
- table are relative to the table's own address. */
-#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
- fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL)
-
-/* This macro should be provided on machines where the addresses in a dispatch
- table are absolute. */
-#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
- fprintf (FILE, "\tint L%d\n", VALUE)
-
-/* ASSEMBLER COMMANDS FOR ALIGNMENT */
-
-/* This is how to output an assembler line that says to advance
- the location counter to a multiple of 2**LOG bytes. We should
- not have to do any alignment since the 1610 is a word machine. */
-#define ASM_OUTPUT_ALIGN(FILE,LOG)
-
-/* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
- because it fails to put zero1 in the bytes that are skipped. */
-#define ASM_NO_SKIP_IN_TEXT 1
-
-#define ASM_OUTPUT_SKIP(FILE,SIZE) \
- fprintf (FILE, "\t%d * int 0\n", (int)(SIZE))
-
-/* CONTROLLING DEBUGGING INFORMATION FORMAT */
-
-#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
-
-#define ASM_OUTPUT_DEF(asm_out_file, LABEL1, LABEL2) \
- do { \
- fprintf (asm_out_file, ".alias " ); \
- ASM_OUTPUT_LABELREF(asm_out_file, LABEL1); \
- fprintf (asm_out_file, "=" ); \
- ASM_OUTPUT_LABELREF(asm_out_file, LABEL2); \
- fprintf (asm_out_file, "\n" ); \
- } while (0)
-
-\f
-/* MISCELLANEOUS PARAMETERS */
-
-/* Specify the machine mode that this machine uses
- for the index in the tablejump instruction. */
-#define CASE_VECTOR_MODE QImode
-
-/* Define as C expression which evaluates to nonzero if the tablejump
- instruction expects the table to contain offsets from the address of the
- table.
- Do not define this if the table should contain absolute addresses. */
-/* #define CASE_VECTOR_PC_RELATIVE 1 */
-
-/* Max number of bytes we can move from memory to memory
- in one reasonably fast instruction. */
-#define MOVE_MAX 1
-
-/* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
- or bitwise 'and' instruction that truncates the count of a shift operation
- to a width equal to the number of bits needed to represent the size of the
- object being shifted. Do not define this macro unless the truncation applies
- to both shift operations and bit-field operations (if any). */
-/* #define SHIFT_COUNT_TRUNCATED */
-
-/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
- is done just by pretending it is already truncated. */
-#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
-
-/* When a prototype says `char' or `short', really pass an `int'. */
-#define PROMOTE_PROTOTYPES 1
-
-/* An alias for the machine mode used for pointers */
-#define Pmode QImode
-
-/* A function address in a call instruction
- is a byte address (for indexing purposes)
- so give the MEM rtx a byte's mode. */
-#define FUNCTION_MODE QImode
-
-#if !defined(__DATE__)
-#define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
-#else
-#define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__)
-#endif
-
-#define VERSION_INFO1 "Lucent DSP16xx C Cross Compiler, version 1.3.0b"
-
-
-/* Define this as 1 if `char' should by default be signed; else as 0. */
-#define DEFAULT_SIGNED_CHAR 1
-
-/* Define this so gcc does not output a call to __main, since we
- are not currently supporting c++. */
-#define INIT_SECTION_ASM_OP 1
-
+++ /dev/null
-;;- Machine description for the AT&T DSP1600 for GCC
-;; Copyright (C) 1994, 1995, 1997, 1998, 2001, 2002
-;; Free Software Foundation, Inc.
-;; Contributed by Michael Collison (collison@isisinc.net).
-
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify
-;; it under the terms of the GNU General Public License as published by
-;; the Free Software Foundation; either version 2, or (at your option)
-;; any later version.
-
-;; GCC is distributed in the hope that it will be useful,
-;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-;; GNU General Public License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING. If not, write to
-;; the Free Software Foundation, 59 Temple Place - Suite 330,
-;; Boston, MA 02111-1307, USA.
-
-
-;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
-\f
-;; Attribute specifications
-
-; Type of each instruction. Default is arithmetic.
-; I'd like to write the list as this, but genattrtab won't accept it.
-;
-; "jump,cond_jump,call, ; flow-control instructions
-; load_i,load, store, move ; Y space address arithmetic instructions
-; malu,special,f3_alu,f3_alu_i ; data arithmetic unit instructions
-; shift_i,shift, bfield_i, bfield ; bit manipulation unit instructions
-; arith, ; integer unit instructions
-; nop
-
-; Classification of each insn. Some insns of TYPE_BRANCH are multi-word.
-(define_attr "type"
- "jump,cond_jump,call,load_i,load,move,store,malu,malu_mul,tstqi,special,special_2,f3_alu,f3_alu_i,f3_alu_i_mult,shift_i,shift,shift_multiple,shift_i_multiple,bfield_i,bfield,nop,ld_short_i,data_move,data_move_i,data_move_memory,data_move_memory_2,data_move_short_i,data_move_multiple,data_move_2,nothing"
- (const_string "malu"))
-
-;; Data arithmetic unit
-(define_function_unit "dau" 1 1 (eq_attr "type" "data_move,data_move_i,f3_alu_i") 2 0)
-
-(define_function_unit "dau" 1 1 (eq_attr "type" "special_2") 3 0)
-
-(define_function_unit "dau" 1 1 (eq_attr "type" "data_move_2") 4 0)
-
-;; Bit manipulation
-(define_function_unit "bmu" 1 1 (eq_attr "type" "shift_i,shift_i_multiple") 2 0)
-
-(define_function_unit "bmu" 1 1 (eq_attr "type" "shift_multiple") 4 0)
-
-;; Y-memory addressing arithmetic unit
-(define_function_unit "yaau" 1 1 (eq_attr "type" "data_move_memory") 2 0)
-
-(define_function_unit "yaau" 1 1 (eq_attr "type" "data_move_memory_2") 4 0)
-
-\f
-;; ....................
-;;
-;; Test against 0 instructions
-;;
-;; ....................
-
-(define_expand "tsthi"
- [(set (cc0)
- (match_operand:HI 0 "register_operand" ""))]
- ""
- "
-{
- dsp16xx_compare_gen = false;
- dsp16xx_compare_op0 = operands[0];
- dsp16xx_compare_op1 = const0_rtx;
- DONE;
-}")
-
-(define_insn "tsthi_1"
- [(set (cc0)
- (match_operand:HI 0 "register_operand" "A"))]
- ""
- "%0=%0"
- [(set_attr "type" "malu")])
-
-(define_expand "tstqi"
- [(set (cc0)
- (match_operand:QI 0 "register_operand" ""))]
- ""
- "
-{
- dsp16xx_compare_gen = false;
- dsp16xx_compare_op0 = operands[0];
- dsp16xx_compare_op1 = const0_rtx;
- DONE;
-}")
-
-(define_split
- [(set (cc0)
- (match_operand:QI 0 "register_operand" "j,q"))
- (clobber (match_scratch:QI 1 "=k,u"))]
- "reload_completed"
- [(set (match_dup 1)
- (const_int 0))
- (parallel [(set (cc0)
- (match_dup 0))
- (use (match_dup 1))])]
- "")
-
-(define_insn "tstqi_split"
- [(set (cc0)
- (match_operand:QI 0 "register_operand" "j,q"))
- (use (match_scratch:QI 1 "=k,u"))]
- ""
- "@
- %b0-0
- %b0-0"
- [(set_attr "type" "f3_alu_i,f3_alu_i")])
-
-(define_insn "tstqi_1"
- [(set (cc0)
- (match_operand:QI 0 "register_operand" "j,q"))
- (clobber (match_scratch:QI 1 "=k,u"))]
- ""
- "@
- %1=0\;%b0-0
- %1=0\;%b0-0"
- [(set_attr "type" "tstqi,tstqi")])
-
-\f
-;;
-;; ....................
-;;
-;; Bit test instructions
-;;
-;; ....................
-
-(define_insn ""
- [(set (cc0)
- (and:HI (match_operand:HI 0 "register_operand" "A,!A")
- (match_operand:HI 1 "register_operand" "Z,A")))]
- ""
- "*
-{
- switch (which_alternative)
- {
- case 0:
- case 1:
- return \"%0&%1\";
- default:
- abort();
- }
-}"
- [(set_attr "type" "f3_alu,f3_alu")])
-
-
-;;(define_insn ""
-;; [(set (cc0)
-;; (and:QI (match_operand:QI 0 "register_operand" "h")
-;; (match_operand:QI 1 "const_int_operand" "I")))]
-;; ""
-;; "%b0&%H1"
-;; [(set_attr "type" "f3_alu_i")])
-\f
-;;
-;;
-;; Compare Instructions
-;;
-
-(define_expand "cmphi"
- [(parallel [(set (cc0)
- (compare (match_operand:HI 0 "general_operand" "")
- (match_operand:HI 1 "general_operand" "")))
- (clobber (match_scratch:QI 2 ""))
- (clobber (match_scratch:QI 3 ""))
- (clobber (match_scratch:QI 4 ""))
- (clobber (match_scratch:QI 5 ""))])]
- ""
- "
-{
- if (GET_CODE (operands[1]) == CONST_INT)
- operands[1] = force_reg (HImode, operands[1]);
-
- dsp16xx_compare_gen = true;
- dsp16xx_compare_op0 = operands[0];
- dsp16xx_compare_op1 = operands[1];
- DONE;
-}")
-
-(define_insn ""
- [(set (cc0)
- (compare (match_operand:HI 0 "general_operand" "Z*r*m*i")
- (match_operand:HI 1 "general_operand" "Z*r*m*i")))
- (clobber (match_scratch:QI 2 "=&A"))
- (clobber (match_scratch:QI 3 "=&A"))
- (clobber (match_scratch:QI 4 "=&A"))
- (clobber (match_scratch:QI 5 "=&A"))]
- "next_cc_user_unsigned (insn)"
- "*
-{
- if (GET_CODE(operands[0]) == REG)
- {
- if (REGNO (operands[0]) == REG_Y ||
- REGNO (operands[0]) == REG_PROD)
- {
- output_asm_insn (\"a0=%0\", operands);
- }
- else if (IS_YBASE_REGISTER_WINDOW (REGNO (operands[0])))
- output_asm_insn (\"a0=%u0\;a0l=%w0\", operands);
- else
- fatal_error (\"Invalid register for compare\");
- }
- else if (GET_CODE(operands[0]) == CONST_INT)
- output_asm_insn (\"a0=%U0\;a0l=%H0\", operands);
- else if (GET_CODE (operands[0]) == MEM)
- {
- rtx xoperands[2];
-
- xoperands[0] = gen_rtx_REG (HImode, REG_A0);
- xoperands[1] = operands[0];
- double_reg_from_memory (xoperands);
- }
-
- if (GET_CODE(operands[1]) == REG)
- {
- if (REGNO (operands[1]) == REG_Y || REGNO (operands[1]) == REG_PROD)
- output_asm_insn (\"a1=%1\", operands);
- else if (IS_YBASE_REGISTER_WINDOW (REGNO (operands[1])))
- output_asm_insn (\"a1=%u1\;a1l=%w1\", operands);
- else
- fatal_error (\"Invalid register for compare\");
- }
- else if (GET_CODE (operands[1]) == MEM)
- {
- rtx xoperands[2];
-
- xoperands[0] = gen_rtx_REG (HImode, REG_A1);
- xoperands[1] = operands[1];
- double_reg_from_memory (xoperands);
- }
- else if (GET_CODE(operands[1]) == CONST_INT)
- {
- output_asm_insn (\"a1=%U1\;a1l=%H1\", operands);
- }
-
- return \"psw = 0\;a0 - a1\";
-}")
-
-(define_insn ""
- [(set (cc0) (compare (match_operand:HI 0 "register_operand" "A,!A")
- (match_operand:HI 1 "register_operand" "Z,*A")))]
- ""
- "@
- %0-%1
- %0-%1"
- [(set_attr "type" "malu,f3_alu")])
-
-(define_expand "cmpqi"
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "nonmemory_operand" "")))
- (clobber (match_operand:QI 2 "register_operand" ""))
- (clobber (match_operand:QI 3 "register_operand" ""))])]
- ""
- "
- {
- if (operands[0]) /* Avoid unused code warning */
- {
- dsp16xx_compare_gen = true;
- dsp16xx_compare_op0 = operands[0];
- dsp16xx_compare_op1 = operands[1];
- DONE;
- }
- }")
-
-(define_split
- [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "register_operand" "")))
- (clobber (match_scratch:QI 2 ""))
- (clobber (match_scratch:QI 3 ""))]
- "reload_completed && next_cc_user_unsigned (insn)"
- [(set (match_dup 2)
- (const_int 0))
- (set (match_dup 3)
- (const_int 0))
- (parallel [(set (cc0)
- (compare (match_dup 0)
- (match_dup 1)))
- (use (match_dup 2))
- (use (match_dup 3))])]
- "")
-
-(define_split
- [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "const_int_operand" "")))
- (clobber (match_scratch:QI 2 ""))
- (clobber (match_scratch:QI 3 ""))]
- "reload_completed && next_cc_user_unsigned (insn)"
- [(set (match_dup 2)
- (const_int 0))
- (parallel [(set (cc0)
- (compare (match_dup 0)
- (match_dup 1)))
- (use (match_dup 2))])]
- "")
-
-(define_insn "cmpqi_split_unsigned_reg"
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "k,k,!k,u,u,!u")
- (match_operand:QI 1 "register_operand" "w,z,u,w,z,k")))
- (use (match_scratch:QI 2 "=j,j,j,q,q,q"))
- (use (match_scratch:QI 3 "=v,y,q,v,y,j"))]
- "next_cc_user_unsigned (insn)"
- "@
- %2-%3
- %2-%3
- %2-%3
- %2-%3
- %2-%3
- %2-%3"
- [(set_attr "type" "malu,malu,malu,malu,malu,malu")])
-
-(define_insn "cmpqi_split_unsigned_int"
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "k,u")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_scratch:QI 2 "=j,q"))]
- "next_cc_user_unsigned (insn)"
- "@
- %0-%H1
- %0-%H1"
- [(set_attr "type" "f3_alu_i,f3_alu_i")])
-
-(define_insn ""
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "k,k,!k,k,u,u,!u,u")
- (match_operand:QI 1 "nonmemory_operand" "w,z,u,i,w,z,k,i")))
- (clobber (match_scratch:QI 2 "=j,j,j,j,q,q,q,q"))
- (clobber (match_scratch:QI 3 "=v,y,q,X,v,y,j,X"))]
- "next_cc_user_unsigned (insn)"
- "@
- %2=0\;%3=0\;%2-%3
- %2=0\;%3=0\;%2-%3
- %2=0\;%3=0\;%2-%3
- %2=0\;%0-%H1
- %2=0\;%3=0\;%2-%3
- %2=0\;%3=0\;%2-%3
- %2=0\;%3=0\;%2-%3
- %2=0\;%0-%H1")
-
-(define_split
- [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "register_operand" "")))
- (clobber (match_scratch:QI 2 ""))
- (clobber (match_scratch:QI 3 ""))]
- "reload_completed"
- [(set (match_dup 2)
- (const_int 0))
- (set (match_dup 3)
- (const_int 0))
- (parallel [(set (cc0)
- (compare (match_dup 0)
- (match_dup 1)))
- (use (match_dup 2))
- (use (match_dup 3))])]
- "")
-
-(define_split
- [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "")
- (match_operand:QI 1 "const_int_operand" "")))
- (clobber (match_scratch:QI 2 ""))
- (clobber (match_scratch:QI 3 ""))]
- "reload_completed"
- [(set (match_dup 2)
- (const_int 0))
- (parallel [(set (cc0)
- (compare (match_dup 0)
- (match_dup 1)))
- (use (match_dup 2))])]
- "")
-
-(define_insn "cmpqi_split_reg"
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "j,j,!j,q,q,!q")
- (match_operand:QI 1 "register_operand" "v,y,q,v,y,j")))
- (use (match_scratch:QI 2 "=k,k,k,u,u,u"))
- (use (match_scratch:QI 3 "=w,z,u,w,z,k"))]
- ""
- "@
- %0-%1
- %0-%1
- %0-%1
- %0-%1
- %0-%1
- %0-%1"
- [(set_attr "type" "malu,malu,malu,malu,malu,malu")])
-
-
-(define_insn "cmpqi_split_int"
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "j,q")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_scratch:QI 2 "=k,u"))]
- ""
- "@
- %b0-%H1
- %b0-%H1"
- [(set_attr "type" "f3_alu_i,f3_alu_i")])
-
-(define_insn ""
- [(set (cc0) (compare (match_operand:QI 0 "register_operand" "j,j,!j,j,q,q,!q,q")
- (match_operand:QI 1 "nonmemory_operand" "v,y,q,i,v,y,j,i")))
- (clobber (match_scratch:QI 2 "=k,k,k,k,u,u,u,u"))
- (clobber (match_scratch:QI 3 "=w,z,u,X,w,z,k,X"))]
- ""
- "@
- %2=0\;%3=0\;%0-%1
- %2=0\;%3=0\;%0-%1
- %2=0\;%3=0\;%0-%1
- %2=0\;%b0-%H1
- %2=0\;%3=0\;%0-%1
- %2=0\;%3=0\;%0-%1
- %2=0\;%3=0\;%0-%1
- %2=0\;%b0-%H1")
-
-
-(define_expand "cmphf"
- [(set (cc0)
- (compare (match_operand:HF 0 "register_operand" "")
- (match_operand:HF 1 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_cmphf3_libcall)
- dsp16xx_cmphf3_libcall = gen_rtx_SYMBOL_REF (Pmode, CMPHF3_LIBCALL);
-
- dsp16xx_compare_gen = true;
- dsp16xx_compare_op0 = operands[0];
- dsp16xx_compare_op1 = operands[1];
- emit_library_call (dsp16xx_cmphf3_libcall, 1, HImode, 2,
- operands[0], HFmode,
- operands[1], HFmode);
- emit_insn (gen_tsthi_1 (copy_to_reg(hard_libcall_value (HImode))));
- DONE;
-}")
-
-\f
-;; ....................
-;;
-;; Add instructions
-;;
-;; ....................
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (plus:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !ADD_LOW_16(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))"
- [(parallel [(set (match_dup 3)
- (plus:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_dup 6))])
-
- (parallel [(set (match_dup 6)
- (plus:QI (match_dup 7)
- (match_dup 8)))
- (clobber (match_scratch:QI 9 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[6] = gen_highpart(QImode, operands[0]);
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-
-(define_insn "addhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A,A,A")
- (plus:HI (match_operand:HI 1 "register_operand" "%A,A,A,A,A")
- (match_operand:HI 2 "nonmemory_operand" "Z,d,L,M,?i")))]
- ""
- "@
- %0=%1+%2
- %0=%1+%2
- %0=%w1+%H2
- %0=%b1+%U2
- %0=%w1+%H2\;%0=%b0+%U2"
- [(set_attr "type" "malu,malu,f3_alu_i,f3_alu_i,f3_alu_i")])
-
-(define_insn ""
- [(set (match_operand:QI 0 "register_operand" "=k,u,!k,!u")
- (plus:QI (plus:QI (match_operand:QI 1 "register_operand" "uk,uk,uk,uk")
- (match_operand:QI 2 "register_operand" "wz,wz,uk,uk"))
- (match_operand:QI 3 "immediate_operand" "i,i,i,i")))
- (clobber (match_scratch:QI 4 "=j,q,j,q"))]
- ""
- "@
- %m0=%m1+%m2\;%m0=%0+%H3
- %m0=%m1+%m2\;%m0=%0+%H3
- %m0=%m1+%m2\;%m0=%0+%H3
- %m0=%m1+%m2\;%m0=%0+%H3")
-
-(define_expand "addqi3"
- [(parallel [(set (match_operand:QI 0 "register_operand" "")
- (plus:QI (match_operand:QI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))
- (clobber (match_scratch:QI 3 ""))])]
- ""
- "
-{
- if (reload_in_progress)
- {
- if (REG_P (operands[1]) &&
- (REGNO(operands[1]) == STACK_POINTER_REGNUM ||
- REGNO(operands[1]) == FRAME_POINTER_REGNUM) &&
- GET_CODE (operands[2]) == CONST_INT)
- {
- if (REG_P (operands[0]) && IS_ACCUM_REG(REGNO(operands[0])))
- emit_move_insn (operands[0], operands[1]);
-
- operands[1] = operands[0];
- }
- }
-}")
-
-
-(define_insn "match_addqi3"
- [(set (match_operand:QI 0 "register_operand" "=a,a,k,u,k,u,!k,!u,j,j,q,q")
- (plus:QI (match_operand:QI 1 "register_operand" "0,0,uk,uk,uk,uk,uk,uk,0,q,0,j")
- (match_operand:QI 2 "nonmemory_operand" "W,N,i,i,wz,wz,uk,uk,i,i,i,i")))
- (clobber (match_scratch:QI 3 "=X,X,j,q,j,q,j,q,X,k,X,u"))]
- ""
- "*
-{
- switch (which_alternative)
- {
- case 0:
- return \"*%0++%2\";
-
- case 1:
- switch (INTVAL (operands[2]))
- {
- case -1:
- return \"*%0--\";
-
- case 1:
- return \"*%0++\";
-
- case -2:
- return \"*%0--\;*%0--\";
-
- case 2:
- return \"*%0++\;*%0++\";
- default:
- abort();
- }
-
- case 2:
- case 3:
- return \"%m0=%1+%H2\";
-
- case 4:
- case 5:
- return \"%m0=%m1+%m2\";
-
-
- case 6:
- case 7:
- return \"%m0=%m1+%m2\";
-
- case 8:
- case 9:
- case 10:
- case 11:
- return \"%0=%b1+%H2\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "data_move_memory,data_move_multiple,f3_alu_i,f3_alu_i,f3_alu,f3_alu,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i")])
-
-
-(define_expand "addhf3"
- [(set (match_operand:HF 0 "register_operand" "")
- (plus:HF (match_operand:HF 1 "register_operand" "")
- (match_operand:HF 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_addhf3_libcall)
- dsp16xx_addhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, ADDHF3_LIBCALL);
-
- emit_library_call (dsp16xx_addhf3_libcall, 1, HFmode, 2,
- operands[1], HFmode,
- operands[2], HFmode);
- emit_move_insn (operands[0], hard_libcall_value(HFmode));
- DONE;
-}")
-
-\f
-;;
-;; ....................
-;;
-;; Subtract instructions
-;;
-;; ....................
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (minus:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !ADD_LOW_16(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))"
- [(parallel [(set (match_dup 3)
- (minus:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_dup 6))])
-
- (parallel [(set (match_dup 6)
- (minus:QI (match_dup 7)
- (match_dup 8)))
- (clobber (match_scratch:QI 9 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[6] = gen_highpart(QImode, operands[0]);
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-
-(define_insn "subhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A,A,A")
- (minus:HI (match_operand:HI 1 "register_operand" "A,A,A,A,A")
- (match_operand:HI 2 "nonmemory_operand" "Z,d,L,M,?i")))]
- ""
- "@
- %0=%1-%2
- %0=%1-%2
- %0=%w1-%H2
- %0=%b1-%U2
- %0=%w1-%H2\;%0=%b0-%U2"
- [(set_attr "type" "malu,malu,f3_alu_i,f3_alu_i,f3_alu_i")])
-
-(define_insn "subqi3"
- [(set (match_operand:QI 0 "register_operand" "=a,k,u,k,u,!k,!u,j,j,q,q")
- (minus:QI (match_operand:QI 1 "register_operand" "0,uk,uk,uk,uk,uk,uk,0,q,0,j")
- (match_operand:QI 2 "nonmemory_operand" "N,i,i,wz,wz,uk,uk,i,i,i,i")))
- (clobber (match_scratch:QI 3 "=X,j,q,j,q,j,q,X,k,X,u"))]
- ""
- "*
-{
- switch (which_alternative)
- {
- case 0:
- switch (INTVAL (operands[2]))
- {
- case 1:
- return \"*%0--\";
-
- case -1:
- return \"*%0++\";
-
- default:
- operands[2] = GEN_INT (-INTVAL (operands[2]));
-
- if (SHORT_IMMEDIATE(operands[2]))
- return \"set %3=%H2\;*%0++%3\";
- else
- return \"%3=%H2\;*%0++%3\";
- }
-
- case 1:
- case 2:
- return \"%m0=%1-%H2\";
-
- case 3:
- case 4:
- return \"%m0=%m1-%m2\";
-
- case 5:
- case 6:
- return \"%m0=%m1-%m2\";
-
- case 7: case 8:
- case 9: case 10:
- return \"%0=%b1-%H2\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "data_move_multiple,f3_alu_i,f3_alu_i,f3_alu,f3_alu,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i")])
-
-(define_expand "subhf3"
- [(set (match_operand:HF 0 "register_operand" "")
- (minus:HF (match_operand:HF 1 "register_operand" "")
- (match_operand:HF 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_subhf3_libcall)
- dsp16xx_subhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, SUBHF3_LIBCALL);
-
- emit_library_call (dsp16xx_subhf3_libcall, 1, HFmode, 2,
- operands[1], HFmode,
- operands[2], HFmode);
- emit_move_insn (operands[0], hard_libcall_value(HFmode));
- DONE;
-}")
-
-(define_insn "neghi2"
- [(set (match_operand:HI 0 "register_operand" "=A")
- (neg:HI (match_operand:HI 1 "register_operand" "A")))]
- ""
- "%0=-%1"
- [(set_attr "type" "special")])
-
-(define_expand "neghf2"
- [(set (match_operand:HF 0 "register_operand" "")
- (neg:HF (match_operand:HF 1 "register_operand" "")))]
- ""
- "
-{
- rtx result;
- rtx target;
-
- {
- target = gen_lowpart(HImode, operands[0]);
- result = expand_binop (HImode, xor_optab,
- gen_lowpart(HImode, operands[1]),
- GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
- if (result == 0)
- abort ();
-
- if (result != target)
- emit_move_insn (result, target);
-
- /* Make a place for REG_EQUAL. */
- emit_move_insn (operands[0], operands[0]);
- DONE;
- }
-}")
-
-;;
-;; ....................
-;;
-;; Multiply instructions
-;;
-
-(define_expand "mulhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (mult:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_mulhi3_libcall)
- dsp16xx_mulhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL);
-
- emit_library_call (dsp16xx_mulhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_insn "mulqi3"
- [(set (match_operand:QI 0 "register_operand" "=w")
- (mult:QI (match_operand:QI 1 "register_operand" "%x")
- (match_operand:QI 2 "register_operand" "y")))
- (clobber (match_scratch:QI 3 "=v"))]
- ""
- "%m0=%1*%2"
- [(set_attr "type" "malu_mul")])
-
-(define_insn "mulqihi3"
- [(set (match_operand:HI 0 "register_operand" "=t")
- (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%x"))
- (sign_extend:HI (match_operand:QI 2 "register_operand" "y"))))]
- ""
- "%0=%1*%2"
- [(set_attr "type" "malu_mul")])
-
-(define_expand "mulhf3"
- [(set (match_operand:HF 0 "register_operand" "")
- (mult:HF (match_operand:HF 1 "register_operand" "")
- (match_operand:HF 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_mulhf3_libcall)
- dsp16xx_mulhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, MULHF3_LIBCALL);
-
- emit_library_call (dsp16xx_mulhf3_libcall, 1, HFmode, 2,
- operands[1], HFmode,
- operands[2], HFmode);
- emit_move_insn (operands[0], hard_libcall_value(HFmode));
- DONE;
-}")
-
-\f
-
-;;
-;; *******************
-;;
-;; Divide Instructions
-;;
-
-(define_expand "divhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (div:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_divhi3_libcall)
- dsp16xx_divhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL);
-
- emit_library_call (dsp16xx_divhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_expand "udivhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (udiv:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_udivhi3_libcall)
- dsp16xx_udivhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL);
-
- emit_library_call (dsp16xx_udivhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_expand "divqi3"
- [(set (match_operand:QI 0 "register_operand" "")
- (div:QI (match_operand:QI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_divqi3_libcall)
- dsp16xx_divqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVQI3_LIBCALL);
-
- emit_library_call (dsp16xx_divqi3_libcall, 1, QImode, 2,
- operands[1], QImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(QImode));
- DONE;
-}")
-
-(define_expand "udivqi3"
- [(set (match_operand:QI 0 "register_operand" "")
- (udiv:QI (match_operand:QI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_udivqi3_libcall)
- dsp16xx_udivqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UDIVQI3_LIBCALL);
-
- emit_library_call (dsp16xx_udivqi3_libcall, 1, QImode, 2,
- operands[1], QImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(QImode));
- DONE;
-}")
-\f
-;;
-;; ....................
-;;
-;; Modulo instructions
-;;
-;; ....................
-
-(define_expand "modhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (mod:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_modhi3_libcall)
- dsp16xx_modhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL);
-
- emit_library_call (dsp16xx_modhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_expand "umodhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (umod:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_umodhi3_libcall)
- dsp16xx_umodhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL);
-
- emit_library_call (dsp16xx_umodhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_expand "modqi3"
- [(set (match_operand:QI 0 "register_operand" "")
- (mod:QI (match_operand:QI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_modqi3_libcall)
- dsp16xx_modqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, MODQI3_LIBCALL);
-
- emit_library_call (dsp16xx_modqi3_libcall, 1, QImode, 2,
- operands[1], QImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(QImode));
- DONE;
-}")
-
-(define_expand "umodqi3"
- [(set (match_operand:QI 0 "register_operand" "")
- (umod:QI (match_operand:QI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_umodqi3_libcall)
- dsp16xx_umodqi3_libcall = gen_rtx_SYMBOL_REF (Pmode, UMODQI3_LIBCALL);
-
- emit_library_call (dsp16xx_umodqi3_libcall, 1, QImode, 2,
- operands[1], QImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(QImode));
- DONE;
-}")
-
-(define_expand "divhf3"
- [(set (match_operand:HF 0 "register_operand" "")
- (div:HF (match_operand:HF 1 "register_operand" "")
- (match_operand:HF 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_divhf3_libcall)
- dsp16xx_divhf3_libcall = gen_rtx_SYMBOL_REF (Pmode, DIVHF3_LIBCALL);
-
- emit_library_call (dsp16xx_divhf3_libcall, 1, HFmode, 2,
- operands[1], HFmode,
- operands[2], HFmode);
- emit_move_insn (operands[0], hard_libcall_value(HFmode));
- DONE;
-}")
-
-\f
-
-;;
-;; ********************
-;;
-;; Logical Instructions
-;;
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (and:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !AND_LOW_16(INTVAL(operands[2])) &&
- !AND_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) == REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (and:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_scratch:QI 6 ""))])
- (parallel [(set (match_dup 7)
- (and:QI (match_dup 8)
- (match_dup 9)))
- (clobber (match_scratch:QI 10 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_highpart(QImode, operands[0]);
- operands[9] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (and:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !AND_LOW_16(INTVAL(operands[2])) &&
- !AND_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) != REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (and:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_dup 6))])
- (parallel [(set (match_dup 6)
- (and:QI (match_dup 7)
- (match_dup 8)))
- (clobber (match_scratch:QI 9 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[6] = gen_highpart(QImode, operands[0]);
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_insn "andhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A,A,?A")
- (and:HI (match_operand:HI 1 "register_operand" "%A,!A,A,A,A")
- (match_operand:HI 2 "nonmemory_operand" "Z,A,O,P,i")))]
- ""
- "@
- %0=%1&%2
- %0=%1&%2
- %0=%w1&%H2
- %0=%b1&%U2
- %0=%w1&%H2\;%0=%b0&%U2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i_mult")])
-
-(define_insn "andqi3"
- [(set (match_operand:QI 0 "register_operand" "=k,u,!k,!u,k,u,k,u,j,q,j,q,j,q,!j,!q")
- (and:QI (match_operand:QI 1 "register_operand" "%uk,uk,uk,uk,0,0,u,k,jq,jq,0,0,q,j,jq,jq")
- (match_operand:QI 2 "nonmemory_operand" "wz,wz,uk,uk,i,i,i,i,yv,yv,i,i,i,i,jq,jq")))
- (clobber (match_scratch:QI 3 "=j,q,j,q,X,X,j,q,k,u,X,X,k,u,k,u"))]
- ""
- "@
- %m0=%m1&%m2
- %m0=%m1&%m2
- %m0=%m1&%m2
- %m0=%m1&%m2
- %m0=%1&%H2
- %m0=%1&%H2
- %m0=%1&%H2
- %m0=%1&%H2
- %m0=%m1&%m2
- %m0=%m1&%m2
- %m0=%b1&%H2
- %m0=%b1&%H2
- %m0=%b1&%H2
- %m0=%b1&%H2
- %m0=%m1&%m2
- %m0=%m1&%m2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu")])
-
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (ior:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !SMALL_INTVAL(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) == REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (ior:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_scratch:QI 6 ""))])
- (parallel [(set (match_dup 7)
- (ior:QI (match_dup 8)
- (match_dup 9)))
- (clobber (match_scratch:QI 10 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_highpart(QImode, operands[0]);
- operands[9] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (ior:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !SMALL_INTVAL(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) != REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (ior:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_dup 6))])
- (parallel [(set (match_dup 6)
- (ior:QI (match_dup 7)
- (match_dup 8)))
- (clobber (match_scratch:QI 9 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[6] = gen_highpart(QImode, operands[0]);
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-
-(define_insn "iorhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A,A,?A")
- (ior:HI (match_operand:HI 1 "register_operand" "%A,!A,A,A,A")
- (match_operand:HI 2 "nonmemory_operand" "Z,A,I,M,i")))]
- ""
- "@
- %0=%u1|%u2
- %0=%u1|%u2
- %0=%w1|%H2
- %0=%b1|%U2
- %0=%w1|%H2\;%0=%b0|%U2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i_mult")])
-
-(define_insn "iorqi3"
- [(set (match_operand:QI 0 "register_operand" "=k,u,!k,!u,k,u,k,u,j,q,j,q,j,q,!j,!q")
- (ior:QI (match_operand:QI 1 "register_operand" "%uk,uk,uk,uk,0,0,u,k,jq,jq,0,0,q,j,jq,jq")
- (match_operand:QI 2 "nonmemory_operand" "wz,wz,uk,uk,i,i,i,i,yv,yv,i,i,i,i,jq,jq")))
- (clobber (match_scratch:QI 3 "=j,q,j,q,X,X,j,q,k,u,X,X,k,u,k,u"))]
- ""
- "@
- %m0=%m1|%m2
- %m0=%m1|%m2
- %m0=%m1|%m2
- %m0=%m1|%m2
- %m0=%1|%H2
- %m0=%1|%H2
- %m0=%1|%H2
- %m0=%1|%H2
- %m0=%m1|%m2
- %m0=%m1|%m2
- %m0=%b1|%H2
- %m0=%b1|%H2
- %m0=%b1|%H2
- %m0=%b1|%H2
- %m0=%m1|%m2
- %m0=%m1|%m2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu")])
-
-
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (xor:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !SMALL_INTVAL(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) == REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (xor:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_scratch:QI 6 ""))])
- (parallel [(set (match_dup 7)
- (xor:QI (match_dup 8)
- (match_dup 9)))
- (clobber (match_scratch:QI 10 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_highpart(QImode, operands[0]);
- operands[9] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (xor:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:HI 2 "const_int_operand" "")))]
- "reload_completed && !SMALL_INTVAL(INTVAL(operands[2])) &&
- !ADD_HIGH_16(INTVAL(operands[2]))
- && (REGNO (operands[0]) != REGNO (operands[1]))"
- [(parallel [(set (match_dup 3)
- (xor:QI (match_dup 4)
- (match_dup 5)))
- (clobber (match_dup 6))])
- (parallel [(set (match_dup 6)
- (xor:QI (match_dup 7)
- (match_dup 8)))
- (clobber (match_scratch:QI 9 ""))])]
- "
-{
- operands[3] = gen_lowpart(QImode, operands[0]);
- operands[4] = gen_lowpart(QImode, operands[1]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) & 0xffff);
-
- operands[6] = gen_highpart(QImode, operands[0]);
- operands[7] = gen_highpart(QImode, operands[0]);
- operands[8] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[2]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_insn "xorhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A,A,?A")
- (xor:HI (match_operand:HI 1 "register_operand" "%A,!A,A,A,A")
- (match_operand:HI 2 "nonmemory_operand" "Z,A,I,M,i")))]
- ""
- "@
- %0=%1^%2
- %0=%1^%2
- %0=%w1^%H2
- %0=%b1^%U2
- %0=%w1^%H2\;%0=%b0^%U2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i_mult")])
-
-(define_insn "xorqi3"
- [(set (match_operand:QI 0 "register_operand" "=k,u,!k,!u,k,u,k,u,j,q,j,q,j,q,!j,!q")
- (xor:QI (match_operand:QI 1 "register_operand" "%uk,uk,uk,uk,0,0,u,k,jq,jq,0,0,q,j,jq,jq")
- (match_operand:QI 2 "nonmemory_operand" "wz,wz,uk,uk,i,i,i,i,yv,yv,i,i,i,i,jq,jq")))
- (clobber (match_scratch:QI 3 "=j,q,j,q,X,X,j,q,k,u,X,X,k,u,k,u"))]
- ""
- "@
- %m0=%m1^%m2
- %m0=%m1^%m2
- %m0=%m1^%m2
- %m0=%m1^%m2
- %m0=%1^%H2
- %m0=%1^%H2
- %m0=%1^%H2
- %m0=%1^%H2
- %m0=%m1^%m2
- %m0=%m1^%m2
- %m0=%b1^%H2
- %m0=%b1^%H2
- %m0=%b1^%H2
- %m0=%b1^%H2
- %m0=%m1^%m2
- %m0=%m1^%m2"
- [(set_attr "type" "f3_alu,f3_alu,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu,f3_alu")])
-
-(define_insn "one_cmplhi2"
- [(set (match_operand:HI 0 "register_operand" "=A")
- (not:HI (match_operand:HI 1 "register_operand" "A")))]
- ""
- "%0= ~%1"
- [(set_attr "type" "special")])
-
-
-(define_insn "one_cmplqi2"
- [(set (match_operand:QI 0 "register_operand" "=k,k,u,u,j,j,q,q")
- (not:QI (match_operand:QI 1 "register_operand" "0,u,0,q,0,q,0,j")))
- (clobber (match_scratch:QI 2 "=X,j,X,q,X,k,X,u"))]
- ""
- "@
- %m0= %1 ^ 0xffff
- %m0= %1 ^ 0xffff
- %m0= %1 ^ 0xffff
- %m0= %1 ^ 0xffff
- %m0= %b1 ^ 0xffff
- %m0= %b1 ^ 0xffff
- %m0= %b1 ^ 0xffff
- %m0= %b1 ^ 0xffff"
- [(set_attr "type" "f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i,f3_alu_i")])
-
-\f
-;;
-;; MOVE INSTRUCTIONS
-;;
-
-(define_split
- [(set (mem:HI (match_operand:QI 0 "register_operand" ""))
- (match_operand:HI 1 "register_operand" ""))]
- "reload_completed && (operands[0] != stack_pointer_rtx)"
- [(set (mem:QI (post_inc:QI (match_dup 0)))
- (match_dup 2))
- (set (mem:QI (post_dec:QI (match_dup 0)))
- (match_dup 3))]
- "
-{
- operands[2] = gen_highpart(QImode, operands[1]);
- operands[3] = gen_lowpart(QImode, operands[1]);
-}")
-
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (mem:HI (match_operand:QI 1 "register_operand" "")))]
- "reload_completed && (operands[1] != stack_pointer_rtx)"
- [(set (match_dup 2)
- (mem:QI (post_inc:QI (match_dup 1))))
- (set (match_dup 3)
- (mem:QI (post_dec:QI (match_dup 1))))]
- "
-{
- operands[2] = gen_highpart(QImode, operands[0]);
- operands[3] = gen_lowpart(QImode, operands[0]);
-}")
-
-(define_split
- [(set (mem:HI (post_inc:HI (match_operand:QI 0 "register_operand" "")))
- (match_operand:HI 1 "register_operand" ""))]
- "reload_completed"
- [(set (mem:QI (post_inc:QI (match_dup 0)))
- (match_dup 2))
- (set (mem:QI (post_inc:QI (match_dup 0)))
- (match_dup 3))]
- "
-{
- operands[2] = gen_highpart(QImode, operands[1]);
- operands[3] = gen_lowpart(QImode, operands[1]);
-}")
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (mem:HI (post_inc:HI (match_operand:QI 1 "register_operand" ""))))]
- "reload_completed"
- [(set (match_dup 2)
- (mem:QI (post_inc:QI (match_dup 1))))
- (set (match_dup 3)
- (mem:QI (post_inc:QI (match_dup 1))))]
- "
-{
- operands[2] = gen_highpart(QImode, operands[0]);
- operands[3] = gen_lowpart(QImode, operands[0]);
-}")
-
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (match_operand:HI 1 "register_operand" ""))]
- "reload_completed &&
- !(IS_ACCUM_REG (REGNO(operands[0])) &&
- (REGNO(operands[1]) == REG_PROD || REGNO(operands[1]) == REG_Y))"
- [(set (match_dup 2)
- (match_dup 3))
- (set (match_dup 4)
- (match_dup 5))]
- "
-{
- operands[2] = gen_highpart(QImode, operands[0]);
- operands[3] = gen_highpart(QImode, operands[1]);
- operands[4] = gen_lowpart(QImode, operands[0]);
- operands[5] = gen_lowpart(QImode, operands[1]);
-}")
-
-(define_split
- [(set (match_operand:HI 0 "register_operand" "")
- (match_operand:HI 1 "const_int_operand" ""))]
- "reload_completed"
- [(set (match_dup 2)
- (match_dup 3))
- (set (match_dup 4)
- (match_dup 5))]
- "
-{
- operands[2] = gen_lowpart(QImode, operands[0]);
- operands[3] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 0xffff);
-
- operands[4] = gen_highpart(QImode, operands[0]);
- operands[5] = gen_rtx (CONST_INT, VOIDmode, (((INTVAL (operands[1]) & 0xffff0000) >> 16) & 0xffff));
-}")
-
-(define_expand "movhi"
- [(set (match_operand:HI 0 "general_operand" "")
- (match_operand:HI 1 "general_operand" ""))]
- ""
- "
-{
- if (emit_move_sequence (operands, HImode))
- DONE;
-}")
-
-
-(define_insn "match_movhi1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=A,Z,A,d,d,m,?d,*Y,t,f")
- (match_operand:HI 1 "general_operand" "d,A,K,i,m,d,*Y,?d,t,f"))]
- "register_operand(operands[0], HImode)
- || register_operand(operands[1], HImode)"
- "*
-{
- switch (which_alternative)
- {
- /* register to accumulator */
- case 0:
- return \"%0=%1\";
- case 1:
- return \"%u0=%u1\;%w0=%w1\";
- case 2:
- return \"%0=%0^%0\";
- case 3:
- return \"%u0=%U1\;%w0=%H1\";
- case 4:
- double_reg_from_memory(operands);
- return \"\";
- case 5:
- double_reg_to_memory(operands);
- return \"\";
- case 6:
- case 7:
- return \"%u0=%u1\;%w0=%w1\";
- case 8:
- case 9:
- return \"\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "special,data_move_multiple,f3_alu,data_move_multiple,data_move_multiple,data_move_multiple,data_move_multiple,data_move_multiple,nothing,nothing")])
-
-
-;; NOTE: It is cheaper to do 'y = *r0', than 'r0 = *r0'.
-
-(define_expand "movqi"
- [(set (match_operand:QI 0 "nonimmediate_operand" "")
- (match_operand:QI 1 "general_operand" ""))]
- ""
- "
-{
- if (emit_move_sequence (operands, QImode))
- DONE;
-}")
-
-;; The movqi pattern with the parallel is used for addqi insns (which have a parallel)
-;; that are turned into moveqi insns by the flow phase. This happens when an auto-increment
-;; is detected.
-
-(define_insn "match_movqi1"
- [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "=A,r,aW,c,?D,m<>,e,Y,r,xyz,m<>")
- (match_operand:QI 1 "general_operand" "r,A,J,i,m<>,D,Y,e,0,m<>,xyz"))
- (clobber (match_scratch:QI 2 "=X,X,X,X,X,X,X,X,X,X,X"))])]
- "register_operand(operands[0], QImode)
- || register_operand(operands[1], QImode)"
- "*
-{
- switch (which_alternative)
- {
- case 0:
- /* We have to use the move mneumonic otherwise the 1610 will
- attempt to transfer all 32-bits of 'y', 'p' or an accumulator
- , which we don't want */
- if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
- || IS_ACCUM_REG(REGNO(operands[1])))
- return \"move %0=%1\";
- else
- return \"%0=%1\";
-
- case 1:
- return \"%0=%1\";
-
- case 2:
- return \"set %0=%H1\";
-
- case 3:
- return \"%0=%H1\";
-
- case 4:
- return \"%0=%1\";
-
- case 5:
- case 6:
- return \"%0=%1\";
-
- case 7:
- return \"%0=%1\";
-
- case 8:
- return \"\";
-
- case 9: case 10:
- return \"%0=%1\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "data_move,data_move,data_move_short_i,data_move_i,data_move_memory,data_move_memory,data_move_memory,data_move_memory,nothing,malu,malu")])
-
-(define_insn "match_movqi2"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=A,r,aW,c,?D,m<>,e,Y,r,xyz,m<>")
- (match_operand:QI 1 "general_operand" "r,A,J,i,m<>,D,Y,e,0,m<>,xyz"))]
- "register_operand(operands[0], QImode)
- || register_operand(operands[1], QImode)"
- "*
-{
- switch (which_alternative)
- {
- case 0:
- /* We have to use the move mneumonic otherwise the 1610 will
- attempt to transfer all 32-bits of 'y', 'p' or an accumulator
- , which we don't want */
- if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
- || IS_ACCUM_REG(REGNO(operands[1])))
- return \"move %0=%1\";
- else
- return \"%0=%1\";
-
- case 1:
- return \"%0=%1\";
-
- case 2:
- return \"set %0=%H1\";
-
- case 3:
- return \"%0=%H1\";
-
- case 4:
- return \"%0=%1\";
-
- case 5:
- case 6:
- return \"%0=%1\";
-
- case 7:
- return \"%0=%1\";
-
- case 8:
- return \"\";
-
- case 9: case 10:
- return \"%0=%1\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "data_move,data_move,data_move_short_i,data_move_i,data_move_memory,data_move_memory,data_move_memory,data_move_memory,nothing,malu,malu")])
-
-(define_expand "reload_inqi"
- [(set (match_operand:QI 0 "register_operand" "=u")
- (match_operand:QI 1 "sp_operand" ""))
- (clobber (match_operand:QI 2 "register_operand" "=&q"))]
- ""
- "
-{
- rtx addr_reg = XEXP (operands[1], 0);
- rtx offset = XEXP (operands[1], 1);
-
- /* First, move the frame or stack pointer to the accumulator */
- emit_move_insn (operands[0], addr_reg);
-
- /* Then generate the add insn */
- emit_insn (gen_rtx_PARALLEL
- (VOIDmode,
- gen_rtvec (2,
- gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx_PLUS (QImode, operands[0],
- offset)),
- gen_rtx_CLOBBER (VOIDmode, operands[2]))));
- DONE;
-}")
-
-(define_expand "reload_inhi"
- [(set (match_operand:HI 0 "register_operand" "=r")
- (match_operand:HI 1 "register_operand" "r"))
- (clobber (match_operand:QI 2 "register_operand" "=&h"))]
- ""
- "
-{
- /* Check for an overlap of operand 2 (an accumulator) with
- the msw of operand 0. If we have an overlap we must reverse
- the order of the moves. */
-
- if (REGNO(operands[2]) == REGNO(operands[0]))
- {
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HImode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HImode), operands[2]);
- }
- else
- {
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HImode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HImode), operands[2]);
- }
-
- DONE;
-}")
-
-
-(define_expand "reload_outhi"
- [(set (match_operand:HI 0 "register_operand" "=r")
- (match_operand:HI 1 "register_operand" "r"))
- (clobber (match_operand:QI 2 "register_operand" "=&h"))]
- ""
- "
-{
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HImode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HImode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HImode), operands[2]);
- DONE;
-}")
-
-(define_expand "movstrqi"
- [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
- (match_operand:BLK 1 "memory_operand" ""))
- (use (match_operand:QI 2 "const_int_operand" ""))
- (use (match_operand:QI 3 "const_int_operand" ""))
- (clobber (match_scratch:QI 4 ""))
- (clobber (match_dup 5))
- (clobber (match_dup 6))])]
- ""
- "
-{
- rtx addr0, addr1;
-
- if (GET_CODE (operands[2]) != CONST_INT)
- FAIL;
-
- if (INTVAL(operands[2]) > 127)
- FAIL;
-
- addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
- addr1 = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));
-
- operands[5] = addr0;
- operands[6] = addr1;
-
- operands[0] = change_address (operands[0], VOIDmode, addr0);
- operands[1] = change_address (operands[1], VOIDmode, addr1);
-}")
-
-(define_insn ""
- [(set (mem:BLK (match_operand:QI 0 "register_operand" "a"))
- (mem:BLK (match_operand:QI 1 "register_operand" "a")))
- (use (match_operand:QI 2 "const_int_operand" "n"))
- (use (match_operand:QI 3 "immediate_operand" "i"))
- (clobber (match_scratch:QI 4 "=x"))
- (clobber (match_dup 0))
- (clobber (match_dup 1))]
- ""
- "*
-{ return output_block_move (operands); }")
-
-\f
-;; Floating point move insns
-
-
-(define_expand "movhf"
- [(set (match_operand:HF 0 "general_operand" "")
- (match_operand:HF 1 "general_operand" ""))]
- ""
- "
-{
- if (emit_move_sequence (operands, HFmode))
- DONE;
-}")
-
-(define_insn "match_movhf"
- [(set (match_operand:HF 0 "nonimmediate_operand" "=A,Z,d,d,m,d,Y")
- (match_operand:HF 1 "general_operand" "d,A,F,m,d,Y,d"))]
- ""
- "*
-{
- /* NOTE: When loading the register 16 bits at a time we
- MUST load the high half FIRST (because the 1610 zeros
- the low half) and then load the low half */
-
- switch (which_alternative)
- {
- /* register to accumulator */
- case 0:
- return \"%0=%1\";
- case 1:
- return \"%u0=%u1\;%w0=%w1\";
- case 2:
- output_dsp16xx_float_const(operands);
- return \"\";
- case 3:
- double_reg_from_memory(operands);
- return \"\";
- case 4:
- double_reg_to_memory(operands);
- return \"\";
- case 5:
- case 6:
- return \"%u0=%u1\;%w0=%w1\";
- default:
- abort();
- }
-}"
-[(set_attr "type" "move,move,load_i,load,store,load,store")])
-
-
-
-(define_expand "reload_inhf"
- [(set (match_operand:HF 0 "register_operand" "=r")
- (match_operand:HF 1 "register_operand" "r"))
- (clobber (match_operand:QI 2 "register_operand" "=&h"))]
- ""
- "
-{
- /* Check for an overlap of operand 2 (an accumulator) with
- the msw of operand 0. If we have an overlap we must reverse
- the order of the moves. */
-
- if (REGNO(operands[2]) == REGNO(operands[0]))
- {
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HFmode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HFmode), operands[2]);
- }
- else
- {
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HFmode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HFmode), operands[2]);
- }
-
- DONE;
-}")
-
-(define_expand "reload_outhf"
- [(set (match_operand:HF 0 "register_operand" "=r")
- (match_operand:HF 1 "register_operand" "r"))
- (clobber (match_operand:QI 2 "register_operand" "=&h"))]
- ""
- "
-{
- emit_move_insn (operands[2], operand_subword (operands[1], 0, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 0, 0, HFmode), operands[2]);
- emit_move_insn (operands[2], operand_subword (operands[1], 1, 0, HFmode));
- emit_move_insn (operand_subword (operands[0], 1, 0, HFmode), operands[2]);
- DONE;
-}")
-
-\f
-;;
-;; CONVERSION INSTRUCTIONS
-;;
-
-(define_expand "extendqihi2"
- [(clobber (match_dup 2))
- (set (match_dup 3) (match_operand:QI 1 "register_operand" ""))
- (set (match_operand:HI 0 "register_operand" "")
- (ashift:HI (match_dup 2)
- (const_int 16)))
- (set (match_dup 0)
- (ashiftrt:HI (match_dup 0) (const_int 16)))]
- ""
- "
-{
- operands[2] = gen_reg_rtx (HImode);
- operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1);
-}")
-
-(define_insn "internal_extendqihi2"
- [(set (match_operand:HI 0 "register_operand" "=A")
- (sign_extend:HI (match_operand:QI 1 "register_operand" "ku")))]
- "TARGET_BMU"
- "%0 = extracts(%m1, 0x1000)"
-[(set_attr "type" "shift_i")])
-
-;;(define_insn "extendqihi2"
-;; [(set (match_operand:HI 0 "register_operand" "=A")
-;; (sign_extend:HI (match_operand:QI 1 "register_operand" "h")))]
-;; ""
-;; "%0 = %1 >> 16")
-
-;;(define_insn "zero_extendqihi2"
-;; [(set (match_operand:HI 0 "register_operand" "=t,f,A,?d,?A")
-;; (zero_extend:HI (match_operand:QI 1 "register_operand" "w,z,ku,A,r")))]
-;; ""
-;; "*
-;; {
-;; switch (which_alternative)
-;; {
-;; case 0:
-;; case 1:
-;; return \"%0=0\";
-;;
-;; case 2:
-;; if (REGNO(operands[1]) == (REGNO(operands[0]) + 1))
-;; return \"%0=0\";
-;; else
-;; return \"%w0=%1\;%0=0\";
-;; case 3:
-;; return \"%w0=%1\;%0=0\";
-;;
-;; case 4:
-;; if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
-;; || IS_ACCUM_REG(REGNO(operands[1])))
-;; return \"move %w0=%1\;%0=0\";
-;; else
-;; return \"%w0=%1\;%0=0\";
-;; default:
-;; abort();
-;; }
-;; }")
-
-;;(define_expand "zero_extendqihi2"
-;; [(clobber (match_dup 2))
-;; (set (match_dup 3) (match_operand:QI 1 "register_operand" ""))
-;; (set (match_operand:HI 0 "register_operand" "")
-;; (ashift:HI (match_dup 2)
-;; (const_int 16)))
-;; (set (match_dup 0)
-;; (lshiftrt:HI (match_dup 0) (const_int 16)))]
-;; ""
-;; "
-;;{
-;; operands[2] = gen_reg_rtx (HImode);
-;; operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1);
-;;}")
-
-(define_expand "zero_extendqihi2"
- [(set (match_operand:HI 0 "register_operand" "")
- (zero_extend:HI (match_operand:QI 1 "register_operand" "")))]
- ""
- "")
-
-
-(define_insn "match_zero_extendqihi_bmu"
- [(set (match_operand:HI 0 "register_operand" "=?*Z,?*Z,?A,A")
- (zero_extend:HI (match_operand:QI 1 "register_operand" "?A,?*Y,*Z*x*a*W*Y,ku")))]
- "TARGET_BMU"
- "*
- {
- switch (which_alternative)
- {
- case 0:
- return \"%w0=%1\;%0=0\";
-
- case 1:
- return \"%w0=%1\;%0=0\";
-
- case 2:
- if (REGNO(operands[1]) == (REGNO(operands[0]) + 1))
- return \"%0=0\";
- else if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
- || IS_ACCUM_REG(REGNO(operands[1])))
- {
- return \"move %w0=%1\;%0=0\";
- }
- else
- return \"%w0=%1\;%0=0\";
-
- case 3:
- return \"%0 = extractz(%m1, 0x1000)\";
- default:
- abort();
- }
- }"
- [(set_attr "type" "data_move_2,data_move_2,data_move_2,shift_i")])
-
-(define_insn "match_zero_extendqihi2_nobmu"
- [(set (match_operand:HI 0 "register_operand" "=?Z,?Z,A")
- (zero_extend:HI (match_operand:QI 1 "register_operand" "A,Y,r")))]
- ""
- "*
- {
- switch (which_alternative)
- {
- case 0:
- return \"%w0=%1\;%0=0\";
-
- case 1:
- return \"%w0=%1\;%0=0\";
-
- case 2:
- if (REGNO(operands[1]) + 1 == (REGNO(operands[0]) + 1))
- return \"%0=0\";
- else if (REGNO(operands[1]) == REG_Y || REGNO(operands[1]) == REG_PROD
- || IS_ACCUM_REG(REGNO(operands[1])))
- {
- return \"move %w0=%1\;%0=0\";
- }
- else
- return \"%w0=%1\;%0=0\";
- default:
- abort();
- }
- }"
- [(set_attr "type" "data_move_2,data_move_2,data_move_2")])
-
-;;
-;; Floating point conversions
-;;
-(define_expand "floathihf2"
- [(set (match_operand:HF 0 "register_operand" "")
- (float:HF (match_operand:HI 1 "register_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_floathihf2_libcall)
- dsp16xx_floathihf2_libcall = gen_rtx_SYMBOL_REF (Pmode, FLOATHIHF2_LIBCALL);
-
- emit_library_call (dsp16xx_floathihf2_libcall, 1, HFmode, 1,
- operands[1], HImode);
- emit_move_insn (operands[0], hard_libcall_value(HFmode));
- DONE;
-}")
-
-(define_expand "fix_trunchfhi2"
- [(set (match_operand:HI 0 "register_operand" "")
- (fix:HI (match_operand:HF 1 "register_operand" "")))]
- ""
- "
-{
- if (!dsp16xx_fixhfhi2_libcall)
- dsp16xx_fixhfhi2_libcall = gen_rtx_SYMBOL_REF (Pmode, FIXHFHI2_LIBCALL);
-
- emit_library_call (dsp16xx_fixhfhi2_libcall, 1, HImode, 1,
- operands[1], HFmode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-}")
-
-(define_expand "fixuns_trunchfhi2"
- [(set (match_operand:HI 0 "register_operand" "")
- (unsigned_fix:HI (match_operand:HF 1 "register_operand" "")))]
- ""
- "
-{
- rtx reg1 = gen_reg_rtx (HFmode);
- rtx reg2 = gen_reg_rtx (HFmode);
- rtx reg3 = gen_reg_rtx (HImode);
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
- REAL_VALUE_TYPE offset;
-
- real_2expN (&offset, 31);
-
- if (reg1) /* turn off complaints about unreached code */
- {
- emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, HFmode));
- do_pending_stack_adjust ();
-
- emit_insn (gen_cmphf (operands[1], reg1));
- emit_jump_insn (gen_bge (label1));
-
- emit_insn (gen_fix_trunchfhi2 (operands[0], operands[1]));
- emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
- gen_rtx_LABEL_REF (VOIDmode, label2)));
- emit_barrier ();
-
- emit_label (label1);
- emit_insn (gen_subhf3 (reg2, operands[1], reg1));
- emit_move_insn (reg3, GEN_INT (0x80000000));;
-
- emit_insn (gen_fix_trunchfhi2 (operands[0], reg2));
- emit_insn (gen_iorhi3 (operands[0], operands[0], reg3));
-
- emit_label (label2);
-
- /* allow REG_NOTES to be set on last insn (labels don't have enough
- fields, and can't be used for REG_NOTES anyway). */
- emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
- DONE;
- }
-}")
-
-;;
-;; SHIFT INSTRUCTIONS
-;;
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 1)))]
- ""
- "%0=%1>>1"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 4)))]
- ""
- "%0=%1>>4"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 8)))]
- ""
- "%0=%1>>8"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 16)))]
- ""
- "%0=%1>>16"
- [(set_attr "type" "special")])
-\f
-;;
-;; Arithmetic Right shift
-
-(define_expand "ashrhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!TARGET_BMU)
- {
- /* If we are shifting by a constant we can do it in 1 or more
- 1600 core shift instructions. The core instructions can
- shift by 1, 4, 8, or 16. */
-
- if (GET_CODE(operands[2]) == CONST_INT)
- ;
- else
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
-
-#if 0
- if (!dsp16xx_ashrhi3_libcall)
- dsp16xx_ashrhi3_libcall
- = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL);
-
- emit_library_call (dsp16xx_ashrhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-#else
- do_pending_stack_adjust ();
- emit_insn (gen_tstqi (operands[2]));
- emit_jump_insn (gen_bne (label1));
- emit_move_insn (operands[0], operands[1]);
- emit_jump_insn (gen_jump (label2));
- emit_barrier ();
- emit_label (label1);
-
- if (GET_CODE(operands[2]) != MEM)
- {
- rtx stack_slot;
-
- stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
- stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
- emit_move_insn (stack_slot, operands[2]);
- operands[2] = stack_slot;
- }
-
- emit_insn (gen_match_ashrhi3_nobmu (operands[0], operands[1], operands[2]));
- emit_label (label2);
- DONE;
-#endif
- }
- }
-}")
-
-(define_insn "match_ashrhi3_bmu"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A,A,!A")
- (match_operand:QI 2 "nonmemory_operand" "B,I,h")))]
- "TARGET_BMU"
- "@
- %0=%1>>%2
- %0=%1>>%H2
- %0=%1>>%2"
- [(set_attr "type" "shift,shift_i,shift")])
-
-(define_insn "match_ashrhi3_nobmu"
- [(set (match_operand:HI 0 "register_operand" "=A,A")
- (ashiftrt:HI (match_operand:HI 1 "register_operand" "A,0")
- (match_operand:QI 2 "general_operand" "n,m")))]
- "!TARGET_BMU"
- "*
-{
- if (which_alternative == 0)
- {
- emit_1600_core_shift (ASHIFTRT, operands, INTVAL(operands[2]));
- return \"\";
- }
- else
- {
- output_asm_insn (\"cloop=%2\", operands);
- output_asm_insn (\"do 0 {\", operands);
- output_asm_insn (\"%0=%0>>1\", operands);
- return \"}\";
- }
-}")
-
-
-\f
-;;
-;; Logical Right Shift
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 1)))]
- "!TARGET_BMU"
- "%0=%1>>1\;%0=%b0&0x7fff"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 4)))]
- "!TARGET_BMU"
- "%0=%1>>4\;%0=%b0&0x0fff"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 8)))]
- "!TARGET_BMU"
- "%0=%1>>8\;%0=%b0&0x00ff"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 16)))]
- "!TARGET_BMU"
- "%0=%1>>16\;%0=%b0&0x0000"
- [(set_attr "type" "special")])
-
-(define_expand "lshrhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!TARGET_BMU)
- {
- /* If we are shifting by a constant we can do it in 1 or more
- 1600 core shift instructions. The core instructions can
- shift by 1, 4, 8, or 16. */
-
- if (GET_CODE(operands[2]) == CONST_INT)
- emit_insn (gen_match_lshrhi3_nobmu (operands[0], operands[1], operands[2]));
- else
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
-#if 0
- if (!dsp16xx_lshrhi3_libcall)
- dsp16xx_lshrhi3_libcall
- = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL);
-
- emit_library_call (dsp16xx_lshrhi3_libcall, 1, HImode, 2,
- operands[1], HImode,
- operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-#else
- do_pending_stack_adjust ();
- emit_insn (gen_tstqi (operands[2]));
- emit_jump_insn (gen_bne (label1));
- emit_move_insn (operands[0], operands[1]);
- emit_jump_insn (gen_jump (label2));
- emit_barrier ();
- emit_label (label1);
-
- if (GET_CODE(operands[2]) != MEM)
- {
- rtx stack_slot;
-
- stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
- stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
- emit_move_insn (stack_slot, operands[2]);
- operands[2] = stack_slot;
- }
-
- emit_insn (gen_match_lshrhi3_nobmu (operands[0], operands[1], operands[2]));
- emit_label (label2);
- DONE;
-#endif
- }
- }
-}")
-
-(define_insn "match_lshrhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A,A,!A")
- (match_operand:QI 2 "nonmemory_operand" "B,I,h")))]
- "TARGET_BMU"
- "@
- %0=%1>>>%2
- %0=%1>>>%H2
- %0=%1>>>%2"
- [(set_attr "type" "shift,shift_i,shift")])
-
-(define_insn "match_lshrhi3_nobmu"
- [(set (match_operand:HI 0 "register_operand" "=A,A")
- (lshiftrt:HI (match_operand:HI 1 "register_operand" "A,0")
- (match_operand:QI 2 "general_operand" "n,m")))
- (clobber (match_scratch:QI 3 "=X,Y"))]
- "!TARGET_BMU"
- "*
-{
- if (which_alternative == 0)
- {
- emit_1600_core_shift (LSHIFTRT, operands, INTVAL(operands[2]));
- return \"\";
- }
- else
- {
- output_asm_insn (\"%3=psw\;psw=0\",operands);
- output_asm_insn (\"cloop=%2\", operands);
- output_asm_insn (\"do 0 {\", operands);
- output_asm_insn (\"%0=%0>>1\", operands);
- output_asm_insn (\"}\", operands);
- return \"psw=%3\";
- }
-}")
-
-\f
-;;
-;; Arithmetic Left shift
-
-;; Start off with special case arithmetic left shift by 1,4,8 or 16.
-
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashift:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 1)))]
- ""
- "%0=%1<<1"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashift:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 4)))]
- ""
- "%0=%1<<4"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashift:HI (match_operand:HI 1 "register_operand" "A")
- (const_int 8)))]
- ""
- "%0=%1<<8"
- [(set_attr "type" "special")])
-
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=A")
- (ashift:HI (match_operand:HI 1 "general_operand" "A")
- (const_int 16)))]
- ""
- "%0=%1<<16"
- [(set_attr "type" "special")])
-
-
-\f
-;; Normal Arithmetic Shift Left
-
-
-(define_expand "ashlhi3"
- [(set (match_operand:HI 0 "register_operand" "")
- (ashift:HI (match_operand:HI 1 "register_operand" "")
- (match_operand:QI 2 "nonmemory_operand" "")))]
- ""
- "
-{
- if (!TARGET_BMU)
- {
- /* If we are shifting by a constant we can do it in 1 or more
- 1600 core shift instructions. The core instructions can
- shift by 1, 4, 8, or 16. */
-
- if (GET_CODE(operands[2]) == CONST_INT)
- ;
- else
- {
- rtx label1 = gen_label_rtx ();
- rtx label2 = gen_label_rtx ();
-#if 0
- if (!dsp16xx_ashlhi3_libcall)
- dsp16xx_ashlhi3_libcall
- = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL);
-
- emit_library_call (dsp16xx_ashlhi3_libcall, 1, HImode, 2,
- operands[1], HImode, operands[2], QImode);
- emit_move_insn (operands[0], hard_libcall_value(HImode));
- DONE;
-#else
- do_pending_stack_adjust ();
- emit_insn (gen_tstqi (operands[2]));
- emit_jump_insn (gen_bne (label1));
- emit_move_insn (operands[0], operands[1]);
- emit_jump_insn (gen_jump (label2));
- emit_barrier ();
- emit_label (label1);
-
- if (GET_CODE(operands[2]) != MEM)
- {
- rtx stack_slot;
-
- stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
- stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
- emit_move_insn (stack_slot, operands[2]);
- operands[2] = stack_slot;
- }
- emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1], operands[2]));
- emit_label (label2);
- DONE;
-#endif
- }
- }
-}")
-
-(define_insn "match_ashlhi3"
- [(set (match_operand:HI 0 "register_operand" "=A,A,A")
- (ashift:HI (match_operand:HI 1 "register_operand" "A,A,A")
- (match_operand:QI 2 "nonmemory_operand" "B,I,!h")))]
- "TARGET_BMU"
- "@
- %0=%1<<%2\;move %u0=%u0
- %0=%1<<%H2\;move %u0=%u0
- %0=%1<<%2\;move %u0=%u0"
- [(set_attr "type" "shift_multiple,shift_multiple,shift_multiple")])
-
-(define_insn "match_ashlhi3_nobmu"
- [(set (match_operand:HI 0 "register_operand" "=A,A")
- (ashift:HI (match_operand:HI 1 "register_operand" "A,0")
- (match_operand:QI 2 "general_operand" "n,m")))]
- "!TARGET_BMU"
- "*
-{
- if (which_alternative == 0)
- {
- emit_1600_core_shift (ASHIFT, operands, INTVAL(operands[2]));
- return \"\";
- }
- else
- {
- output_asm_insn (\"cloop=%2\", operands);
- output_asm_insn (\"do 0 {\", operands);
- output_asm_insn (\"%0=%0<<1\", operands);
- return \"}\";
- }
-}")
-
-\f
-
-
-(define_insn "extv"
- [(set (match_operand:QI 0 "register_operand" "=k,u")
- (sign_extract:QI (match_operand:QI 1 "register_operand" "ku,ku")
- (match_operand:QI 2 "const_int_operand" "n,n")
- (match_operand:QI 3 "const_int_operand" "n,n")))
- (clobber (match_scratch:QI 4 "=j,q"))]
- "TARGET_BMU"
- "*
-{
- operands[5]
- = GEN_INT ((INTVAL (operands[2]) << 8) + (INTVAL (operands[3]) & 0xff));
- return \"%m0 = extracts (%m1, %H5)\";
-}"
-[(set_attr "type" "shift_i")])
-
-(define_insn "extzv"
- [(set (match_operand:QI 0 "register_operand" "=k,u")
- (zero_extract:QI (match_operand:QI 1 "register_operand" "ku,ku")
- (match_operand:QI 2 "const_int_operand" "n,n")
- (match_operand:QI 3 "const_int_operand" "n,n")))
- (clobber (match_scratch:QI 4 "=j,q"))]
- "TARGET_BMU"
- "*
-{
- operands[5]
- = GEN_INT ((INTVAL (operands[2]) << 8) + (INTVAL (operands[3]) & 0xff));
- return \"%m0 = extractz (%m1, %H5)\";
-}"
-[(set_attr "type" "shift_i")])
-
-;;
-;; conditional instructions
-;;
-
-(define_expand "seq"
- [(set (match_operand:QI 0 "register_operand" "")
- (eq:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (EQ, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-(define_expand "sne"
- [(set (match_operand:QI 0 "register_operand" "")
- (ne:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (NE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sgt"
- [(set (match_operand:QI 0 "register_operand" "")
- (gt:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GT, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "slt"
- [(set (match_operand:QI 0 "register_operand" "")
- (lt:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LT, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-(define_expand "sge"
- [(set (match_operand:QI 0 "register_operand" "")
- (ge:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sle"
- [(set (match_operand:QI 0 "register_operand" "")
- (le:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sgtu"
- [(set (match_operand:QI 0 "register_operand" "")
- (gtu:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GTU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sltu"
- [(set (match_operand:QI 0 "register_operand" "")
- (ltu:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LTU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sgeu"
- [(set (match_operand:QI 0 "register_operand" "")
- (geu:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GEU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "sleu"
- [(set (match_operand:QI 0 "register_operand" "")
- (leu:QI (match_dup 1) (const_int 0)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LEU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_insn "scc"
- [(set (match_operand:QI 0 "register_operand" "=jq")
- (match_operator:QI 1 "comparison_operator" [(cc0) (const_int 0)]))]
- ""
- "%0 = 0\;if %C1 %b0 = %b0 + 1"
- [(set_attr "type" "special_2")])
-
-;;
-;; Jump Instructions
-;;
-
-(define_expand "beq"
- [(set (pc)
- (if_then_else (eq (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (EQ, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-(define_expand "bne"
- [(set (pc)
- (if_then_else (ne (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (NE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bgt"
- [(set (pc)
- (if_then_else (gt (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GT, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bge"
- [(set (pc)
- (if_then_else (ge (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "blt"
- [(set (pc)
- (if_then_else (lt (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LT, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "ble"
- [(set (pc)
- (if_then_else (le (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LE, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bgtu"
- [(set (pc)
- (if_then_else (gtu (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GTU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bgeu"
- [(set (pc)
- (if_then_else (geu (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (GEU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bltu"
- [(set (pc)
- (if_then_else (ltu (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LTU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_expand "bleu"
- [(set (pc)
- (if_then_else (leu (match_dup 1)
- (const_int 0))
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- ""
- "
-{
- if (dsp16xx_compare_gen)
- operands[1] = gen_compare_reg (LEU, dsp16xx_compare_op0, dsp16xx_compare_op1);
- else
- operands[1] = gen_tst_reg (dsp16xx_compare_op0);
-}")
-
-
-(define_insn ""
- [(set (pc)
- (if_then_else (match_operator 1 "comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l0\;if %C1 goto pt"
- [(set_attr "type" "cond_jump")])
-
-(define_insn ""
- [(set (pc)
- (if_then_else (match_operator 1 "comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 0 "" ""))
- (pc)))]
- "TARGET_NEAR_JUMP"
- "if %C1 goto %l0"
- [(set_attr "type" "cond_jump")])
-\f
-;;
-;; Negated conditional jump instructions.
-;; These are necessary because jump optimization can turn
-;; direct-conditional branches into reverse-conditional
-;; branches.
-
-(define_insn ""
- [(set (pc)
- (if_then_else (match_operator 1 "comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 0 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l0\;if %I1 goto pt"
- [(set_attr "type" "cond_jump")])
-
-(define_insn ""
- [(set (pc)
- (if_then_else (match_operator 1 "comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 0 "" ""))))]
- "TARGET_NEAR_JUMP"
- "if %I1 goto %l0"
- [(set_attr "type" "cond_jump")])
-
-
-;;
-;; JUMPS
-;;
-
-(define_insn "jump"
- [(set (pc)
- (label_ref (match_operand 0 "" "")))]
- ""
- "*
- {
- if (TARGET_NEAR_JUMP)
- return \"goto %l0\";
- else
- return \"pt=%l0\;goto pt\";
- }"
- [(set_attr "type" "jump")])
-
-
-(define_insn "indirect_jump"
- [(set (pc) (match_operand:QI 0 "register_operand" "A"))]
- ""
- "pt=%0\;goto pt"
- [(set_attr "type" "jump")])
-
-(define_insn "tablejump"
- [(set (pc) (match_operand:QI 0 "register_operand" "A"))
- (use (label_ref (match_operand 1 "" "")))]
- ""
- "pt=%0\;goto pt"
- [(set_attr "type" "jump")])
-\f
-;;
-;; FUNCTION CALLS
-;;
-
-;; Call subroutine with no return value.
-
-
-(define_expand "call"
- [(parallel [(call (match_operand:QI 0 "" "")
- (match_operand 1 "" ""))
- (clobber (reg:QI 24))])]
- ""
- "
-{
- if (GET_CODE (operands[0]) == MEM
- && ! call_address_operand (XEXP (operands[0], 0), QImode))
- operands[0] = gen_rtx_MEM (GET_MODE (operands[0]),
- force_reg (Pmode, XEXP (operands[0], 0)));
-}")
-
-(define_insn ""
- [(parallel [(call (mem:QI (match_operand:QI 0 "call_address_operand" "hR"))
- (match_operand 1 "" ""))
- (clobber (reg:QI 24))])]
- ""
- "*
-{
- if (GET_CODE (operands[0]) == REG ||
- (GET_CODE(operands[0]) == SYMBOL_REF && !TARGET_NEAR_CALL))
- return \"pt=%0\;call pt\";
- else
- return \"call %0\";
-}"
-[(set_attr "type" "call")])
-
-;; Call subroutine with return value.
-
-(define_expand "call_value"
- [(parallel [(set (match_operand 0 "register_operand" "=f")
- (call (match_operand:QI 1 "call_address_operand" "hR")
- (match_operand:QI 2 "" "")))
- (clobber (reg:QI 24))])]
- ""
- "
-{
- if (GET_CODE (operands[1]) == MEM
- && ! call_address_operand (XEXP (operands[1], 0), QImode))
- operands[1] = gen_rtx_MEM (GET_MODE (operands[1]),
- force_reg (Pmode, XEXP (operands[1], 0)));
-}")
-
-(define_insn ""
- [(parallel [(set (match_operand 0 "register_operand" "=f")
- (call (mem:QI (match_operand:QI 1 "call_address_operand" "hR"))
- (match_operand:QI 2 "" "")))
- (clobber (reg:QI 24))])]
- ""
- "*
-{
- if (GET_CODE (operands[1]) == REG ||
- (GET_CODE(operands[1]) == SYMBOL_REF && !TARGET_NEAR_CALL))
- return \"pt=%1\;call pt\";
- else
- return \"call %1\";
-}"
-[(set_attr "type" "call")])
-
-
-(define_expand "untyped_call"
- [(parallel [(call (match_operand 0 "" "")
- (const_int 0))
- (match_operand 1 "" "")
- (match_operand 2 "" "")])]
- ""
- "
-{
- int i;
-
- emit_call_insn (GEN_CALL (operands[0], const0_rtx, NULL, const0_rtx));
-
- for (i = 0; i < XVECLEN (operands[2], 0); i++)
- {
- rtx set = XVECEXP (operands[2], 0, i);
- emit_move_insn (SET_DEST (set), SET_SRC (set));
- }
-
- /* The optimizer does not know that the call sets the function value
- registers we stored in the result block. We avoid problems by
- claiming that all hard registers are used and clobbered at this
- point. */
- emit_insn (gen_blockage ());
-
- DONE;
-}")
-
-;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and
-;; all of memory. This blocks insns from being moved across this point.
-
-(define_insn "blockage"
- [(unspec_volatile [(const_int 0)] 0)]
- ""
- "")
-
-(define_insn "nop"
- [(const_int 0)]
- ""
- "nop"
- [(set_attr "type" "nop")])
-\f
-;;
-;; PEEPHOLE PATTERNS
-;;
-
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "k,k,!k,u,u,!u")
- (match_operand:QI 1 "register_operand" "w,z,u,w,z,k")))
- (use (match_operand:QI 2 "register_operand" "=j,j,j,q,q,q"))
- (use (match_operand:QI 3 "register_operand" "=v,y,q,v,y,j"))])
- (set (pc)
- (if_then_else (match_operator 5 "uns_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 4 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l4\;%2-%3\;if %C5 goto pt")
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "k,k,!k,u,u,!u")
- (match_operand:QI 1 "register_operand" "w,z,u,w,z,k")))
- (use (match_operand:QI 2 "register_operand" "=j,j,j,q,q,q"))
- (use (match_operand:QI 3 "register_operand" "=v,y,q,v,y,j"))])
- (set (pc)
- (if_then_else (match_operator 5 "uns_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 4 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l4\;%2-%3\;if %I5 goto pt")
-
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "k,u")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_operand:QI 2 "register_operand" "=j,q"))])
- (set (pc)
- (if_then_else (match_operator 4 "uns_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 3 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l3\;%0-%H1\;if %C4 goto pt")
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "k,u")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_operand:QI 2 "register_operand" "=j,q"))])
- (set (pc)
- (if_then_else (match_operator 4 "uns_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 3 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l3\;%0-%H1\;if %I4 goto pt")
-
-;;
-;;; QImode SIGNED COMPARE PEEPHOLE OPTIMIZATIONS
-;;
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "j,j,h,q,q,q")
- (match_operand:QI 1 "register_operand" "v,y,q,v,y,j")))
- (use (match_operand:QI 2 "register_operand" "=k,k,k,u,u,u"))
- (use (match_operand:QI 3 "register_operand" "=w,z,u,w,z,k"))])
- (set (pc)
- (if_then_else (match_operator 5 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 4 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l4\;%0-%1\;if %C5 goto pt")
-
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "j,j,j,q,q,q")
- (match_operand:QI 1 "register_operand" "v,y,q,v,y,j")))
- (use (match_operand:QI 2 "register_operand" "=k,k,k,u,u,u"))
- (use (match_operand:QI 3 "register_operand" "=w,z,u,w,z,k"))])
- (set (pc)
- (if_then_else (match_operator 5 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 4 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l4\;%0-%1\;if %I5 goto pt")
-
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "j,q")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_operand:QI 2 "register_operand" "=k,u"))])
- (set (pc)
- (if_then_else (match_operator 4 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 3 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l3\;%b0-%H1\;if %C4 goto pt")
-
-(define_peephole
- [(parallel [(set (cc0)
- (compare (match_operand:QI 0 "register_operand" "j,q")
- (match_operand:QI 1 "const_int_operand" "i,i")))
- (use (match_operand:QI 2 "register_operand" "=k,u"))])
- (set (pc)
- (if_then_else (match_operator 4 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 3 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l3\;%b0-%H1\;if %I4 goto pt")
-
-;; TST PEEPHOLE PATTERNS
-
-(define_peephole
- [(parallel [(set (cc0)
- (match_operand:QI 0 "register_operand" "j,q"))
- (use (match_operand:QI 1 "register_operand" "=k,u"))])
- (set (pc)
- (if_then_else (match_operator 3 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 2 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l2\;%b0-0\;if %I3 goto pt")
-
-(define_peephole
- [(parallel [(set (cc0)
- (match_operand:QI 0 "register_operand" "j,q"))
- (use (match_operand:QI 1 "register_operand" "=k,u"))])
- (set (pc)
- (if_then_else (match_operator 3 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 2 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l2\;%b0-0\;if %C3 goto pt")
-
-;; HImode peephole patterns
-
-(define_peephole
- [(set (cc0)
- (compare (match_operand:HI 0 "register_operand" "A,A")
- (match_operand:HI 1 "register_operand" "Z,A")))
- (set (pc)
- (if_then_else (match_operator 3 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 2 "" ""))
- (pc)))]
- "!TARGET_NEAR_JUMP"
- "pt=%l2\;%0-%1\;if %C3 goto pt")
-
-(define_peephole
- [(set (cc0)
- (compare (match_operand:HI 0 "register_operand" "A,A")
- (match_operand:HI 1 "register_operand" "Z,A")))
- (set (pc)
- (if_then_else (match_operator 3 "signed_comparison_operator"
- [(cc0) (const_int 0)])
- (pc)
- (label_ref (match_operand 2 "" ""))))]
- "!TARGET_NEAR_JUMP"
- "pt=%l2\;%0-%1\;if %I3 goto pt")
+++ /dev/null
-
-This directory contains code for building a compiler for the
-32-bit ESA/390 architecture. It supports three different styles
-of assembly:
-
--- MVS for use with the HLASM assembler
--- Open Edition (USS Unix System Services)
--- ELF/Linux for use with the binutils/gas GNU assembler.
-
-
-Cross-compiling Hints
----------------------
-When building a cross-compiler on AIX, set the environment variable CC
-and be sure to set the -ma and -qcpluscmt flags; i.e.
-
- export CC="cc -ma -qcpluscmt"
-
-do this *before* running configure, e.g.
-
- configure --target=i370-ibm-linux --prefix=/where/to/install/usr
-
-The Objective-C and FORTRAN front ends don't build. To avoid looking at
-errors, do only
-
- make LANGUAGES=c
-
-
-OpenEdition Hints
------------------
-The shell script "install" is handy for users of OpenEdition.
-
-
-The ELF ABI
------------
-This compiler, in conjunction with the gas/binutils assembler, defines
-a defacto ELF-based ABI for the ESA/390 architecture. Be warned: this
-ABI has several major faults. It should be fixed. As it is fixed,
-it is subject to change without warning. You should not commit to major
-software systems without further exploring and fixing these problems.
-Here are some of the problems:
-
--- No support for shared libraries or dynamically loadable objects.
- This is because the compiler currently places address literals in
- the text section. Although the GAS assembler supports a syntax for
- USING that will place address literals in the data section, this forces
- the use of two base registers, one for branches and one for the literal
- pool. Work is needed to redesign the function prologue, epilogue and the
- base register reloads to minimize the currently excessive use of reserved
- registers.
-
- I beleive the best solution would be to add a toc or plt, and extending
- the meaning of the USING directive to encompass this. This would
- allow the continued use of the human-readable and familiar practice
- of using =A() and =F'' to denote address literals, as opposed to more
- difficult jump-table notation.
-
--- the stackframe is almost twice as big as it needs to be.
-
--- currently, r15 is used to return 32-bit values. Because this is the
- last register, it prevents 64-bit ints and small structures from being
- returned in registers, forcing return in memory. It would be more
- efficient to use r14 to return 32-bit values, and r14+r15 to return
- 64-bit values.
-
--- all arguments are currently passed in memory. It would be more efficient
- to pass arguments in registers.
-
-
-
-
-ChangeLog
----------
-Oct98-Dec98 -- add ELF back end; work on getting ABI more or less functional.
-98.12.05 -- fix numerous MVC bugs
-99.02.06 -- multiply insn sometimes not generated when needed.
- -- extendsidi bugs, bad literal values printed
- -- remove broken adddi subdi patterns
-99.02.15 -- add clrstrsi pattern
- -- fix -O2 divide bug
-99.03.04 -- base & index reg usage bugs
-99.03.15 -- fixes for returning long longs and structs (struct value return)
-99.03.29 -- fix handling & alignment of shorts
-99.03.31 -- clobbered register 14 is not always clobbered
-99.04.02 -- operand constraints for cmphi
-99.04.07 -- function pointer fixes for call, call_value patterns,
- function pointers derefed once too often.
-99.04.14 -- add pattern to print double-wide int
- -- check intval<4096 for misc operands
- -- add clrstrsi pattern
- -- movstrsi fixes
-99.04.16 -- use r2 to pass args into r11 in subroutine call.
- -- fixes to movsi; some operand combinations impossible;
- rework constraints
- -- start work on forward jump optimization
- -- char alignment bug
-99.04.25 -- add untyped_call pattern so that builtin_apply works
-99.04.27 -- fixes to compare logical under mask
-99.04.28 -- reg 2 is clobbered by calls
-99.04.30 -- fix rare mulsi bug
-99.04.30 -- add constraints so that all RS, SI, SS forms insns have valid
- addressing modes
-99.04.30 -- major condition code fixes. The old code was just way off
- w.r.t. which insns set condition code, and the codes that
- were set. The extent of this damage was unbeleivable.
-99.05.01 -- restructuring of operand constraints on many patterns,
- many lead to invalid instructions being genned.
-99.05.02 -- float pt fixes
- -- fix movdi issue bugs
-99.05.03 -- fix divide insn; was dividing incorrectly
-99.05.05 -- fix sign extension problems on andhi
- -- deprecate some constraints
-99.05.06 -- add set_attr insn lengths; fix misc litpool sizes
- -- add notes about how unsigned jumps work (i.e.
- arithmetic vs. logical vs. signed vs unsigned).
-99.05.11 -- use insn length to predict forward branch target;
- use relative branchining where possible,
- remove un-needed base register reload.
-99.05.15 -- fix movstrsi, clrstrsi, cmpstrsi patterns as per conversation
- w/ Richard Henderson
-
-
-
-
-
-
+++ /dev/null
-/* Subroutines for the C front end for System/370.
- Copyright (C) 1989, 1993, 1995, 1997, 1998, 1999, 2000
- Free Software Foundation, Inc.
- Contributed by Jan Stein (jan@cd.chalmers.se).
- Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
- Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "tree.h"
-#include "toplev.h"
-#include "cpplib.h"
-#include "c-pragma.h"
-#include "tm_p.h"
-
-#ifdef TARGET_HLASM
-
-/* #pragma map (name, alias) -
- In this implementation both name and alias are required to be
- identifiers. The older code seemed to be more permissive. Can
- anyone clarify? */
-
-void
-i370_pr_map (pfile)
- cpp_reader *pfile ATTRIBUTE_UNUSED;
-{
- tree name, alias, x;
-
- if (c_lex (&x) == CPP_OPEN_PAREN
- && c_lex (&name) == CPP_NAME
- && c_lex (&x) == CPP_COMMA
- && c_lex (&alias) == CPP_NAME
- && c_lex (&x) == CPP_CLOSE_PAREN)
- {
- if (c_lex (&x) != CPP_EOF)
- warning ("junk at end of #pragma map");
-
- mvs_add_alias (IDENTIFIER_POINTER (name), IDENTIFIER_POINTER (alias), 1);
- return;
- }
-
- warning ("malformed #pragma map, ignored");
-}
-
-#endif
+++ /dev/null
-/* Definitions of target machine for GNU compiler. System/370 version.
- Copyright (C) 2000 Free Software Foundation, Inc.
- Contributed by Jan Stein (jan@cd.chalmers.se).
- Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
- Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-#ifndef GCC_I370_PROTOS_H
-#define GCC_I370_PROTOS_H
-
-extern void override_options (void);
-
-#ifdef RTX_CODE
-extern int i370_branch_dest (rtx);
-extern int i370_branch_length (rtx);
-extern int i370_short_branch (rtx);
-extern int s_operand (rtx, enum machine_mode);
-extern int r_or_s_operand (rtx, enum machine_mode);
-extern int unsigned_jump_follows_p (rtx);
-#endif /* RTX_CODE */
-
-#ifdef TREE_CODE
-extern int handle_pragma (int (*)(void), void (*)(int), const char *);
-#endif /* TREE_CODE */
-
-extern void mvs_add_label (int);
-extern int mvs_check_label (int);
-extern int mvs_check_page (FILE *, int, int);
-extern int mvs_function_check (const char *);
-extern void mvs_add_alias (const char *, const char *, int);
-extern int mvs_need_alias (const char *);
-extern int mvs_get_alias (const char *, char *);
-extern int mvs_check_alias (const char *, char *);
-extern void check_label_emit (void);
-extern void mvs_free_label_list (void);
-
-extern void i370_pr_map (struct cpp_reader *);
-
-#endif /* ! GCC_I370_PROTOS_H */
+++ /dev/null
-/* Subroutines for insn-output.c for System/370.
- Copyright (C) 1989, 1993, 1995, 1997, 1998, 1999, 2000, 2002
- Free Software Foundation, Inc.
- Contributed by Jan Stein (jan@cd.chalmers.se).
- Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
- Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
-
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
-
-#include "config.h"
-#include "system.h"
-#include "coretypes.h"
-#include "tm.h"
-#include "rtl.h"
-#include "tree.h"
-#include "regs.h"
-#include "hard-reg-set.h"
-#include "real.h"
-#include "insn-config.h"
-#include "conditions.h"
-#include "output.h"
-#include "insn-attr.h"
-#include "function.h"
-#include "expr.h"
-#include "flags.h"
-#include "recog.h"
-#include "toplev.h"
-#include "cpplib.h"
-#include "tm_p.h"
-#include "target.h"
-#include "target-def.h"
-
-extern FILE *asm_out_file;
-
-/* Label node. This structure is used to keep track of labels
- on the various pages in the current routine.
- The label_id is the numeric ID of the label,
- The label_page is the page on which it actually appears,
- The first_ref_page is the page on which the true first ref appears.
- The label_addr is an estimate of its location in the current routine,
- The label_first & last_ref are estimates of where the earliest and
- latest references to this label occur. */
-
-typedef struct label_node
- {
- struct label_node *label_next;
- int label_id;
- int label_page;
- int first_ref_page;
-
- int label_addr;
- int label_first_ref;
- int label_last_ref;
- }
-label_node_t;
-
-/* Is 1 when a label has been generated and the base register must be reloaded. */
-int mvs_need_base_reload = 0;
-
-/* Current function starting base page. */
-int function_base_page;
-
-/* Length of the current page code. */
-int mvs_page_code;
-
-/* Length of the current page literals. */
-int mvs_page_lit;
-
-/* Current function name. */
-char *mvs_function_name = 0;
-
-/* Current function name length. */
-size_t mvs_function_name_length = 0;
-
-/* Page number for multi-page functions. */
-int mvs_page_num = 0;
-
-/* Label node list anchor. */
-static label_node_t *label_anchor = 0;
-
-/* Label node free list anchor. */
-static label_node_t *free_anchor = 0;
-
-/* Assembler source file descriptor. */
-static FILE *assembler_source = 0;
-
-static label_node_t * mvs_get_label (int);
-static void i370_label_scan (void);
-#ifdef TARGET_HLASM
-static bool i370_hlasm_assemble_integer (rtx, unsigned int, int);
-static void i370_globalize_label (FILE *, const char *);
-#endif
-static void i370_output_function_prologue (FILE *, HOST_WIDE_INT);
-static void i370_output_function_epilogue (FILE *, HOST_WIDE_INT);
-static void i370_file_start (void);
-static void i370_file_end (void);
-
-#ifdef LONGEXTERNAL
-static int mvs_hash_alias (const char *);
-#endif
-static void i370_internal_label (FILE *, const char *, unsigned long);
-static bool i370_rtx_costs (rtx, int, int, int *);
-
-/* ===================================================== */
-/* defines and functions specific to the HLASM assembler */
-#ifdef TARGET_HLASM
-
-#define MVS_HASH_PRIME 999983
-#if HOST_CHARSET == HOST_CHARSET_EBCDIC
-#define MVS_SET_SIZE 256
-#else
-#define MVS_SET_SIZE 128
-#endif
-
-#ifndef MAX_MVS_LABEL_SIZE
-#define MAX_MVS_LABEL_SIZE 8
-#endif
-
-#define MAX_LONG_LABEL_SIZE 255
-
-/* Alias node, this structure is used to keep track of aliases to external
- variables. The IBM assembler allows an alias to an external name
- that is longer that 8 characters; but only once per assembly.
- Also, this structure stores the #pragma map info. */
-typedef struct alias_node
- {
- struct alias_node *alias_next;
- int alias_emitted;
- char alias_name [MAX_MVS_LABEL_SIZE + 1];
- char real_name [MAX_LONG_LABEL_SIZE + 1];
- }
-alias_node_t;
-
-/* Alias node list anchor. */
-static alias_node_t *alias_anchor = 0;
-
-/* Define the length of the internal MVS function table. */
-#define MVS_FUNCTION_TABLE_LENGTH 32
-
-/* C/370 internal function table. These functions use non-standard linkage
- and must handled in a special manner. */
-static const char *const mvs_function_table[MVS_FUNCTION_TABLE_LENGTH] =
-{
-#if HOST_CHARSET == HOST_CHARSET_EBCDIC /* Changed for EBCDIC collating sequence */
- "ceil", "edc_acos", "edc_asin", "edc_atan", "edc_ata2", "edc_cos",
- "edc_cosh", "edc_erf", "edc_erfc", "edc_exp", "edc_gamm", "edc_lg10",
- "edc_log", "edc_sin", "edc_sinh", "edc_sqrt", "edc_tan", "edc_tanh",
- "fabs", "floor", "fmod", "frexp", "hypot", "jn",
- "j0", "j1", "ldexp", "modf", "pow", "yn",
- "y0", "y1"
-#else
- "ceil", "edc_acos", "edc_asin", "edc_ata2", "edc_atan", "edc_cos",
- "edc_cosh", "edc_erf", "edc_erfc", "edc_exp", "edc_gamm", "edc_lg10",
- "edc_log", "edc_sin", "edc_sinh", "edc_sqrt", "edc_tan", "edc_tanh",
- "fabs", "floor", "fmod", "frexp", "hypot", "j0",
- "j1", "jn", "ldexp", "modf", "pow", "y0",
- "y1", "yn"
-#endif
-};
-
-#endif /* TARGET_HLASM */
-/* ===================================================== */
-
-\f
-/* Initialize the GCC target structure. */
-#ifdef TARGET_HLASM
-#undef TARGET_ASM_BYTE_OP
-#define TARGET_ASM_BYTE_OP NULL
-#undef TARGET_ASM_ALIGNED_HI_OP
-#define TARGET_ASM_ALIGNED_HI_OP NULL
-#undef TARGET_ASM_ALIGNED_SI_OP
-#define TARGET_ASM_ALIGNED_SI_OP NULL
-#undef TARGET_ASM_INTEGER
-#define TARGET_ASM_INTEGER i370_hlasm_assemble_integer
-#undef TARGET_ASM_GLOBALIZE_LABEL
-#define TARGET_ASM_GLOBALIZE_LABEL i370_globalize_label
-#endif
-
-#undef TARGET_ASM_FUNCTION_PROLOGUE
-#define TARGET_ASM_FUNCTION_PROLOGUE i370_output_function_prologue
-#undef TARGET_ASM_FUNCTION_EPILOGUE
-#define TARGET_ASM_FUNCTION_EPILOGUE i370_output_function_epilogue
-#undef TARGET_ASM_FILE_START
-#define TARGET_ASM_FILE_START i370_file_start
-#undef TARGET_ASM_FILE_END
-#define TARGET_ASM_FILE_END i370_file_end
-#undef TARGET_ASM_INTERNAL_LABEL
-#define TARGET_ASM_INTERNAL_LABEL i370_internal_label
-#undef TARGET_RTX_COSTS
-#define TARGET_RTX_COSTS i370_rtx_costs
-
-struct gcc_target targetm = TARGET_INITIALIZER;
-\f
-/* Set global variables as needed for the options enabled. */
-
-void
-override_options ()
-{
- /* We're 370 floating point, not IEEE floating point. */
- memset (real_format_for_mode, 0, sizeof real_format_for_mode);
- REAL_MODE_FORMAT (SFmode) = &i370_single_format;
- REAL_MODE_FORMAT (DFmode) = &i370_double_format;
-}
-
-/* ===================================================== */
-/* The following three routines are used to determine whther
- forward branch is on this page, or is a far jump. We use
- the "length" attr on an insn [(set_atter "length" "4")]
- to store the largest possible code length that insn
- could have. This gives us a hint of the address of a
- branch destination, and from that, we can work out
- the length of the jump, and whether its on page or not.
- */
-
-/* Return the destination address of a branch. */
-
-int
-i370_branch_dest (branch)
- rtx branch;
-{
- rtx dest = SET_SRC (PATTERN (branch));
- int dest_uid;
- int dest_addr;
-
- /* first, compute the estimated address of the branch target */
- if (GET_CODE (dest) == IF_THEN_ELSE)
- dest = XEXP (dest, 1);
- dest = XEXP (dest, 0);
- dest_uid = INSN_UID (dest);
- dest_addr = INSN_ADDRESSES (dest_uid);
-
- /* next, record the address of this insn as the true addr of first ref */
- {
- label_node_t *lp;
- rtx label = JUMP_LABEL (branch);
- int labelno = CODE_LABEL_NUMBER (label);
-
- if (!label || CODE_LABEL != GET_CODE (label)) abort ();
-
- lp = mvs_get_label (labelno);
- if (-1 == lp -> first_ref_page) lp->first_ref_page = mvs_page_num;
- }
- return dest_addr;
-}
-
-int
-i370_branch_length (insn)
- rtx insn;
-{
- int here, there;
- here = INSN_ADDRESSES (INSN_UID (insn));
- there = i370_branch_dest (insn);
- return (there - here);
-}
-
-
-int
-i370_short_branch (insn)
- rtx insn;
-{
- int base_offset;
-
- base_offset = i370_branch_length(insn);
- if (0 > base_offset)
- {
- base_offset += mvs_page_code;
- }
- else
- {
- /* avoid bumping into lit pool; use 2x to estimate max possible lits */
- base_offset *= 2;
- base_offset += mvs_page_code + mvs_page_lit;
- }
-
- /* make a conservative estimate of room left on page */
- if ((4060 >base_offset) && ( 0 < base_offset)) return 1;
- return 0;
-}
-
-/* The i370_label_scan() routine is supposed to loop over
- all labels and label references in a compilation unit,
- and determine whether all label refs appear on the same
- code page as the label. If they do, then we can avoid
- a reload of the base register for that label.
-
- Note that the instruction addresses used here are only
- approximate, and make the sizes of the jumps appear
- farther apart then they will actually be. This makes
- this code far more conservative than it needs to be.
- */
-
-#define I370_RECORD_LABEL_REF(label,addr) { \
- label_node_t *lp; \
- int labelno = CODE_LABEL_NUMBER (label); \
- lp = mvs_get_label (labelno); \
- if (addr < lp -> label_first_ref) lp->label_first_ref = addr; \
- if (addr > lp -> label_last_ref) lp->label_last_ref = addr; \
-}
-
-static void
-i370_label_scan ()
-{
- rtx insn;
- label_node_t *lp;
- int tablejump_offset = 0;
-
- for (insn = get_insns(); insn; insn = NEXT_INSN(insn))
- {
- int here = INSN_ADDRESSES (INSN_UID (insn));
- enum rtx_code code = GET_CODE(insn);
-
- /* ??? adjust for tables embedded in the .text section that
- * the compiler didn't take into account */
- here += tablejump_offset;
- INSN_ADDRESSES (INSN_UID (insn)) = here;
-
- /* check to see if this insn is a label ... */
- if (CODE_LABEL == code)
- {
- int labelno = CODE_LABEL_NUMBER (insn);
-
- lp = mvs_get_label (labelno);
- lp -> label_addr = here;
-#if 0
- /* Supposedly, labels are supposed to have circular
- lists of label-refs that reference them,
- setup in flow.c, but this does not appear to be the case. */
- rtx labelref = LABEL_REFS (insn);
- rtx ref = labelref;
- do
- {
- rtx linsn = CONTAINING_INSN(ref);
- ref = LABEL_NEXTREF(ref);
- } while (ref && (ref != labelref));
-#endif
- }
- else
- if (JUMP_INSN == code)
- {
- rtx label = JUMP_LABEL (insn);
-
- /* If there is no label for this jump, then this
- had better be a ADDR_VEC or an ADDR_DIFF_VEC
- and there had better be a vector of labels. */
- if (!label)
- {
- int j;
- rtx body = PATTERN (insn);
- if (ADDR_VEC == GET_CODE(body))
- {
- for (j=0; j < XVECLEN (body, 0); j++)
- {
- rtx lref = XVECEXP (body, 0, j);
- if (LABEL_REF != GET_CODE (lref)) abort ();
- label = XEXP (lref,0);
- if (CODE_LABEL != GET_CODE (label)) abort ();
- tablejump_offset += 4;
- here += 4;
- I370_RECORD_LABEL_REF(label,here);
- }
- /* finished with the vector go do next insn */
- continue;
- }
- else
- if (ADDR_DIFF_VEC == GET_CODE(body))
- {
-/* XXX hack alert.
- Right now, we leave this as a no-op, but strictly speaking,
- this is incorrect. It is possible that a table-jump
- driven off of a relative address could take us off-page,
- to a place where we need to reload the base reg. So really,
- we need to examing both labels, and compare thier values
- to the current basereg value.
-
- More generally, this brings up a troubling issue overall:
- what happens if a tablejump is split across two pages? I do
- not beleive that this case is handled correctly at all, and
- can only lead to horrible results if this were to occur.
-
- However, the current situation is not any worse than it was
- last week, and so we punt for now. */
-
- debug_rtx (insn);
- for (j=0; j < XVECLEN (body, 0); j++)
- {
- }
- /* finished with the vector go do next insn */
- continue;
- }
- else
- {
-/* XXX hack alert.
- Compiling the exception handling (L_eh) in libgcc2.a will trip
- up right here, with something that looks like
- (set (pc) (mem:SI (plus:SI (reg/v:SI 1 r1) (const_int 4))))
- {indirect_jump}
- I'm not sure of what leads up to this, but it looks like
- the makings of a long jump which will surely get us into trouble
- because the base & page registers don't get reloaded. For now
- I'm not sure of what to do ... again we punt ... we are not worse
- off than yesterday. */
-
- /* print_rtl_single (stdout, insn); */
- debug_rtx (insn);
- /* abort(); */
- continue;
- }
- }
- else
- {
- /* At this point, this jump_insn had better be a plain-old
- ordinary one, grap the label id and go */
- if (CODE_LABEL != GET_CODE (label)) abort ();
- I370_RECORD_LABEL_REF(label,here);
- }
- }
-
- /* Sometimes, we take addresses of labels and use them
- as instruction operands ... these show up as REG_NOTES */
- else
- if (INSN == code)
- {
- if ('i' == GET_RTX_CLASS (code))
- {
- rtx note;
- for (note = REG_NOTES (insn); note; note = XEXP(note,1))
- {
- if (REG_LABEL == REG_NOTE_KIND(note))
- {
- rtx label = XEXP (note,0);
- if (!label || CODE_LABEL != GET_CODE (label)) abort ();
-
- I370_RECORD_LABEL_REF(label,here);
- }
- }
- }
- }
- }
-}
-
-/* ===================================================== */
-
-/* Emit reload of base register if indicated. This is to eliminate multiple
- reloads when several labels are generated pointing to the same place
- in the code.
-
- The page table is written at the end of the function.
- The entries in the page table look like
- .LPGT0: // PGT0 EQU *
- .long .LPG0 // DC A(PG0)
- .long .LPG1 // DC A(PG1)
- while the prologue generates
- L r4,=A(.LPGT0)
-
- Note that this paging scheme breaks down if a single subroutine
- has more than about 10MB of code in it ... as long as humans write
- code, this shouldn't be a problem ...
- */
-
-void
-check_label_emit ()
-{
- if (mvs_need_base_reload)
- {
- mvs_need_base_reload = 0;
-
- mvs_page_code += 4;
- fprintf (assembler_source, "\tL\t%d,%d(,%d)\n",
- BASE_REGISTER, (mvs_page_num - function_base_page) * 4,
- PAGE_REGISTER);
- }
-}
-
-/* Add the label to the current page label list. If a free element is available
- it will be used for the new label. Otherwise, a label element will be
- allocated from memory.
- ID is the label number of the label being added to the list. */
-
-static label_node_t *
-mvs_get_label (id)
- int id;
-{
- label_node_t *lp;
-
- /* first, lets see if we already go one, if so, use that. */
- for (lp = label_anchor; lp; lp = lp->label_next)
- {
- if (lp->label_id == id) return lp;
- }
-
- /* not found, get a new one */
- if (free_anchor)
- {
- lp = free_anchor;
- free_anchor = lp->label_next;
- }
- else
- {
- lp = (label_node_t *) xmalloc (sizeof (label_node_t));
- }
-
- /* initialize for new label */
- lp->label_id = id;
- lp->label_page = -1;
- lp->label_next = label_anchor;
- lp->label_first_ref = 2000123123;
- lp->label_last_ref = -1;
- lp->label_addr = -1;
- lp->first_ref_page = -1;
- label_anchor = lp;
-
- return lp;
-}
-
-void
-mvs_add_label (id)
- int id;
-{
- label_node_t *lp;
- int fwd_distance;
-
- lp = mvs_get_label (id);
- lp->label_page = mvs_page_num;
-
- /* OK, we just saw the label. Determine if this label
- * needs a reload of the base register */
- if ((-1 != lp->first_ref_page) &&
- (lp->first_ref_page != mvs_page_num))
- {
- /* Yep; the first label_ref was on a different page. */
- mvs_need_base_reload ++;
- return;
- }
-
- /* Hmm. Try to see if the estimated address of the last
- label_ref is on the current page. If it is, then we
- don't need a base reg reload. Note that this estimate
- is very conservatively handled; we'll tend to have
- a good bit more reloads than actually needed. Someday,
- we should tighten the estimates (which are driven by
- the (set_att "length") insn attibute.
-
- Currently, we estimate that number of page literals
- same as number of insns, which is a vast overestimate,
- esp that the estimate of each insn size is its max size. */
-
- /* if latest ref comes before label, we are clear */
- if (lp->label_last_ref < lp->label_addr) return;
-
- fwd_distance = lp->label_last_ref - lp->label_addr;
-
- if (mvs_page_code + 2 * fwd_distance + mvs_page_lit < 4060) return;
-
- mvs_need_base_reload ++;
-}
-
-/* Check to see if the label is in the list and in the current
- page. If not found, we have to make worst case assumption
- that label will be on a different page, and thus will have to
- generate a load and branch on register. This is rather
- ugly for forward-jumps, but what can we do? For backward
- jumps on the same page we can branch directly to address.
- ID is the label number of the label being checked. */
-
-int
-mvs_check_label (id)
- int id;
-{
- label_node_t *lp;
-
- for (lp = label_anchor; lp; lp = lp->label_next)
- {
- if (lp->label_id == id)
- {
- if (lp->label_page == mvs_page_num)
- {
- return 1;
- }
- else
- {
- return 0;
- }
- }
- }
- return 0;
-}
-
-/* Get the page on which the label sits. This will be used to
- determine is a register reload is really needed. */
-
-#if 0
-int
-mvs_get_label_page(int id)
-{
- label_node_t *lp;
-
- for (lp = label_anchor; lp; lp = lp->label_next)
- {
- if (lp->label_id == id)
- return lp->label_page;
- }
- return -1;
-}
-#endif
-
-/* The label list for the current page freed by linking the list onto the free
- label element chain. */
-
-void
-mvs_free_label_list ()
-{
-
- if (label_anchor)
- {
- label_node_t *last_lp = label_anchor;
- while (last_lp->label_next) last_lp = last_lp->label_next;
- last_lp->label_next = free_anchor;
- free_anchor = label_anchor;
- }
- label_anchor = 0;
-}
-
-/* ====================================================================== */
-/* If the page size limit is reached a new code page is started, and the base
- register is set to it. This page break point is counted conservatively,
- most literals that have the same value are collapsed by the assembler.
- True is returned when a new page is started.
- FILE is the assembler output file descriptor.
- CODE is the length, in bytes, of the instruction to be emitted.
- LIT is the length of the literal to be emitted. */
-
-#ifdef TARGET_HLASM
-int
-mvs_check_page (file, code, lit)
- FILE *file;
- int code, lit;
-{
- if (file)
- assembler_source = file;
-
- if (mvs_page_code + code + mvs_page_lit + lit > MAX_MVS_PAGE_LENGTH)
- {
- fprintf (assembler_source, "\tB\tPGE%d\n", mvs_page_num);
- fprintf (assembler_source, "\tDS\t0F\n");
- fprintf (assembler_source, "\tLTORG\n");
- fprintf (assembler_source, "\tDS\t0F\n");
- fprintf (assembler_source, "PGE%d\tEQU\t*\n", mvs_page_num);
- fprintf (assembler_source, "\tDROP\t%d\n", BASE_REGISTER);
- mvs_page_num++;
- /* Safe to use BASR not BALR, since we are
- * not switching addressing mode here ... */
- fprintf (assembler_source, "\tBASR\t%d,0\n", BASE_REGISTER);
- fprintf (assembler_source, "PG%d\tEQU\t*\n", mvs_page_num);
- fprintf (assembler_source, "\tUSING\t*,%d\n", BASE_REGISTER);
- mvs_page_code = code;
- mvs_page_lit = lit;
- return 1;
- }
- mvs_page_code += code;
- mvs_page_lit += lit;
- return 0;
-}
-#endif /* TARGET_HLASM */
-
-
-#ifdef TARGET_ELF_ABI
-int
-mvs_check_page (file, code, lit)
- FILE *file;
- int code, lit;
-{
- if (file)
- assembler_source = file;
-
- if (mvs_page_code + code + mvs_page_lit + lit > MAX_MVS_PAGE_LENGTH)
- {
- /* hop past the literal pool */
- fprintf (assembler_source, "\tB\t.LPGE%d\n", mvs_page_num);
-
- /* dump the literal pool. The .baligns are optional, since
- * ltorg will align to the size of the largest literal
- * (which is possibly 8 bytes) */
- fprintf (assembler_source, "\t.balign\t4\n");
- fprintf (assembler_source, "\t.LTORG\n");
- fprintf (assembler_source, "\t.balign\t4\n");
-
- /* we continue execution here ... */
- fprintf (assembler_source, ".LPGE%d:\n", mvs_page_num);
- fprintf (assembler_source, "\t.DROP\t%d\n", BASE_REGISTER);
- mvs_page_num++;
-
- /* BASR puts the contents of the PSW into r3
- * that is, r3 will be loaded with the address of "." */
- fprintf (assembler_source, "\tBASR\tr%d,0\n", BASE_REGISTER);
- fprintf (assembler_source, ".LPG%d:\n", mvs_page_num);
- fprintf (assembler_source, "\t.USING\t.,r%d\n", BASE_REGISTER);
- mvs_page_code = code;
- mvs_page_lit = lit;
- return 1;
- }
- mvs_page_code += code;
- mvs_page_lit += lit;
- return 0;
-}
-#endif /* TARGET_ELF_ABI */
-
-/* ===================================================== */
-/* defines and functions specific to the HLASM assembler */
-#ifdef TARGET_HLASM
-
-/* Check for C/370 runtime function, they don't use standard calling
- conventions. True is returned if the function is in the table.
- NAME is the name of the current function. */
-
-int
-mvs_function_check (name)
- const char *name;
-{
- int lower, middle, upper;
- int i;
-
- lower = 0;
- upper = MVS_FUNCTION_TABLE_LENGTH - 1;
- while (lower <= upper)
- {
- middle = (lower + upper) / 2;
- i = strcmp (name, mvs_function_table[middle]);
- if (i == 0)
- return 1;
- if (i < 0)
- upper = middle - 1;
- else
- lower = middle + 1;
- }
- return 0;
-}
-
-/* Generate a hash for a given key. */
-
-#ifdef LONGEXTERNAL
-static int
-mvs_hash_alias (key)
- const char *key;
-{
- int h;
- int i;
- int l = strlen (key);
-
- h = key[0];
- for (i = 1; i < l; i++)
- h = ((h * MVS_SET_SIZE) + key[i]) % MVS_HASH_PRIME;
- return (h);
-}
-#endif
-
-/* Add the alias to the current alias list. */
-
-void
-mvs_add_alias (realname, aliasname, emitted)
- const char *realname;
- const char *aliasname;
- int emitted;
-{
- alias_node_t *ap;
-
- ap = (alias_node_t *) xmalloc (sizeof (alias_node_t));
- if (strlen (realname) > MAX_LONG_LABEL_SIZE)
- {
- warning ("real name is too long - alias ignored");
- return;
- }
- if (strlen (aliasname) > MAX_MVS_LABEL_SIZE)
- {
- warning ("alias name is too long - alias ignored");
- return;
- }
-
- strcpy (ap->real_name, realname);
- strcpy (ap->alias_name, aliasname);
- ap->alias_emitted = emitted;
- ap->alias_next = alias_anchor;
- alias_anchor = ap;
-}
-
-/* Check to see if the name needs aliasing. ie. the name is either:
- 1. Longer than 8 characters
- 2. Contains an underscore
- 3. Is mixed case */
-
-int
-mvs_need_alias (realname)
- const char *realname;
-{
- int i, j = strlen (realname);
-
- if (mvs_function_check (realname))
- return 0;
-#if 0
- if (!strcmp (realname, "gccmain"))
- return 0;
- if (!strcmp (realname, "main"))
- return 0;
-#endif
- if (j > MAX_MVS_LABEL_SIZE)
- return 1;
- if (strchr (realname, '_') != 0)
- return 1;
- if (ISUPPER (realname[0]))
- {
- for (i = 1; i < j; i++)
- {
- if (ISLOWER (realname[i]))
- return 1;
- }
- }
- else
- {
- for (i = 1; i < j; i++)
- {
- if (ISUPPER (realname[i]))
- return 1;
- }
- }
-
- return 0;
-}
-
-/* Get the alias from the list.
- If 1 is returned then it's in the alias list, 0 if it was not */
-
-int
-mvs_get_alias (realname, aliasname)
- const char *realname;
- char *aliasname;
-{
-#ifdef LONGEXTERNAL
- alias_node_t *ap;
-
- for (ap = alias_anchor; ap; ap = ap->alias_next)
- {
- if (!strcmp (ap->real_name, realname))
- {
- strcpy (aliasname, ap->alias_name);
- return 1;
- }
- }
- if (mvs_need_alias (realname))
- {
- char c1, c2;
-
- c1 = realname[0];
- c2 = realname[1];
- if (ISLOWER (c1)) c1 = TOUPPER (c1);
- else if (c1 == '_') c1 = 'A';
- if (ISLOWER (c2)) c2 = TOUPPER (c2);
- else if (c2 == '_' || c2 == '\0') c2 = '#';
-
- sprintf (aliasname, "%c%c%06d", c1, c2, mvs_hash_alias (realname));
- mvs_add_alias (realname, aliasname, 0);
- return 1;
- }
-#else
- if (strlen (realname) > MAX_MVS_LABEL_SIZE)
- {
- strncpy (aliasname, realname, MAX_MVS_LABEL_SIZE);
- aliasname[MAX_MVS_LABEL_SIZE] = '\0';
- return 1;
- }
-#endif
- return 0;
-}
-
-/* Check to see if the alias is in the list.
- If 1 is returned then it's in the alias list, 2 it was emitted */
-
-int
-mvs_check_alias (realname, aliasname)
- const char *realname;
- char *aliasname;
-{
-#ifdef LONGEXTERNAL
- alias_node_t *ap;
-
- for (ap = alias_anchor; ap; ap = ap->alias_next)
- {
- if (!strcmp (ap->real_name, realname))
- {
- int rc = (ap->alias_emitted == 1) ? 1 : 2;
- strcpy (aliasname, ap->alias_name);
- ap->alias_emitted = 1;
- return rc;
- }
- }
- if (mvs_need_alias (realname))
- {
- char c1, c2;
-
- c1 = realname[0];
- c2 = realname[1];
- if (ISLOWER (c1)) c1 = TOUPPER (c1);
- else if (c1 == '_') c1 = 'A';
- if (ISLOWER (c2)) c2 = TOUPPER (c2);
- else if (c2 == '_' || c2 == '\0') c2 = '#';
-
- sprintf (aliasname, "%c%c%06d", c1, c2, mvs_hash_alias (realname));
- mvs_add_alias (realname, aliasname, 0);
- alias_anchor->alias_emitted = 1;
- return 2;
- }
-#else
- if (strlen (realname) > MAX_MVS_LABEL_SIZE)
- {
- strncpy (aliasname, realname, MAX_MVS_LABEL_SIZE);
- aliasname[MAX_MVS_LABEL_SIZE] = '\0';
- return 1;
- }
-#endif
- return 0;
-}
-
-/* defines and functions specific to the HLASM assembler */
-#endif /* TARGET_HLASM */
-/* ===================================================== */
-/* ===================================================== */
-/* defines and functions specific to the gas assembler */
-#ifdef TARGET_ELF_ABI
-
-/* Check for C/370 runtime function, they don't use standard calling
- conventions. True is returned if the function is in the table.
- NAME is the name of the current function. */
-/* no special calling conventions (yet ??) */
-
-int
-mvs_function_check (name)
- const char *name ATTRIBUTE_UNUSED;
-{
- return 0;
-}
-
-#endif /* TARGET_ELF_ABI */
-/* ===================================================== */
-
-
-/* Return 1 if OP is a valid S operand for an RS, SI or SS type instruction.
- OP is the current operation.
- MODE is the current operation mode. */
-
-int
-s_operand (op, mode)
- register rtx op;
- enum machine_mode mode;
-{
- extern int volatile_ok;
- register enum rtx_code code = GET_CODE (op);
-
- if (CONSTANT_ADDRESS_P (op))
- return 1;
- if (mode == VOIDmode || GET_MODE (op) != mode)
- return 0;
- if (code == MEM)
- {
- register rtx x = XEXP (op, 0);
-
- if (!volatile_ok && op->volatil)
- return 0;
- if (REG_P (x) && REG_OK_FOR_BASE_P (x))
- return 1;
- if (GET_CODE (x) == PLUS
- && REG_P (XEXP (x, 0)) && REG_OK_FOR_BASE_P (XEXP (x, 0))
- && GET_CODE (XEXP (x, 1)) == CONST_INT
- && (unsigned) INTVAL (XEXP (x, 1)) < 4096)
- return 1;
- }
- return 0;
-}
-
-
-/* Return 1 if OP is a valid R or S operand for an RS, SI or SS type
- instruction.
- OP is the current operation.
- MODE is the current operation mode. */
-
-int
-r_or_s_operand (op, mode)
- register rtx op;
- enum machine_mode mode;
-{
- extern int volatile_ok;
- register enum rtx_code code = GET_CODE (op);
-
- if (CONSTANT_ADDRESS_P (op))
- return 1;
- if (mode == VOIDmode || GET_MODE (op) != mode)
- return 0;
- if (code == REG)
- return 1;
- else if (code == MEM)
- {
- register rtx x = XEXP (op, 0);
-
- if (!volatile_ok && op->volatil)
- return 0;
- if (REG_P (x) && REG_OK_FOR_BASE_P (x))
- return 1;
- if (GET_CODE (x) == PLUS
- && REG_P (XEXP (x, 0)) && REG_OK_FOR_BASE_P (XEXP (x, 0))
- && GET_CODE&nb
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