+2005-04-04 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/mcore/mcore.h (target_flags, HARDLIT_BIT, ALIGN8_BIT, DIV_BIT)
+ (RELAX_IMM_BIT, W_FIELD_BIT, OVERALIGN_FUNC_BIT, CGDATA_BIT)
+ (SLOW_BYTES_BIT, LITTLE_END_BIT, M340_BIT, TARGET_HARDLIT)
+ (TARGET_DIV, TARGET_RELAX_IMM, TARGET_W_FIELD, TARGET_OVERALIGN_FUNC)
+ (TARGET_CG_DATA, TARGET_SLOW_BYTES, TARGET_LITTLE_END, TARGET_M340)
+ (TARGET_SWITCHES, mcore_stack_increment_string)
+ (TARGET_OPTIONS): Delete.
+ (TARGET_DEFAULT, OPTIMIZATION_OPTIONS): Use MASK_* constants rather
+ than *_BIT constants.
+ (TARGET_8ALIGN): #undef old definition before redefining to 1.
+ * config/mcore/mcore.c (mcore_stack_increment_string): Delete.
+ (TARGET_DEFAULT_TARGET_FLAGS): Override default to TARGET_DEFAULT.
+ (mcore_override_options): Delete mcore_stack_increment code.
+ Change use of M340_BIT to MASK_M340.
+ * config/mcore/mcore.opt: New file.
+
2005-04-04 Ian Lance Taylor <ian@airs.com>
* config/arm/arm.c (replace_symbols_in_block): Remove static
/* Maximum size we are allowed to grow the stack in a single operation.
If we want more, we must do it in increments of at most this size.
If this value is 0, we don't check at all. */
-const char * mcore_stack_increment_string = 0;
-int mcore_stack_increment = STACK_UNITS_MAXSTEP;
+int mcore_stack_increment = STACK_UNITS_MAXSTEP;
/* For dumping information about frame sizes. */
char * mcore_current_function_name = 0;
#define TARGET_ASM_UNIQUE_SECTION mcore_unique_section
#undef TARGET_ASM_FUNCTION_RODATA_SECTION
#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO mcore_encode_section_info
#undef TARGET_STRIP_NAME_ENCODING
void
mcore_override_options (void)
{
- if (mcore_stack_increment_string)
- {
- mcore_stack_increment = atoi (mcore_stack_increment_string);
-
- if (mcore_stack_increment < 0
- || (mcore_stack_increment == 0
- && (mcore_stack_increment_string[0] != '0'
- || mcore_stack_increment_string[1] != 0)))
- error ("invalid option %<-mstack-increment=%s%>",
- mcore_stack_increment_string);
- }
-
/* Only the m340 supports little endian code. */
if (TARGET_LITTLE_END && ! TARGET_M340)
- target_flags |= M340_BIT;
+ target_flags |= MASK_M340;
}
\f
/* Compute the number of word sized registers needed to
#undef LINK_SPEC
#define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
-/* Can only count on 16 bits of availability; change to long would affect
- many architecture specific files (other architectures...). */
-extern int target_flags;
-
-#define HARDLIT_BIT (1 << 0) /* Build in-line literals using 2 insns. */
-#define ALIGN8_BIT (1 << 1) /* Max alignment goes to 8 instead of 4. */
-#define DIV_BIT (1 << 2) /* Generate divide instructions. */
-#define RELAX_IMM_BIT (1 << 3) /* Arbitrary immediates in and, or, tst. */
-#define W_FIELD_BIT (1 << 4) /* Generate bit insv/extv using SImode. */
-#define OVERALIGN_FUNC_BIT (1 << 5) /* Align functions to 4 byte boundary. */
-#define CGDATA_BIT (1 << 6) /* Generate callgraph data. */
-#define SLOW_BYTES_BIT (1 << 7) /* Slow byte access. */
-#define LITTLE_END_BIT (1 << 8) /* Generate little endian code. */
-#define M340_BIT (1 << 9) /* Generate code for the m340. */
-
-#define TARGET_DEFAULT \
- (HARDLIT_BIT | ALIGN8_BIT | DIV_BIT | RELAX_IMM_BIT | M340_BIT | LITTLE_END_BIT)
+#define TARGET_DEFAULT \
+ (MASK_HARDLIT \
+ | MASK_8ALIGN \
+ | MASK_DIV \
+ | MASK_RELAX_IMM \
+ | MASK_M340 \
+ | MASK_LITTLE_END)
#ifndef MULTILIB_DEFAULTS
#define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
#endif
-#define TARGET_HARDLIT (target_flags & HARDLIT_BIT)
/* The ability to have 4 byte alignment is being suppressed for now.
- If this ability is reenabled, you must enable the definition below
+ If this ability is reenabled, you must disable the definition below
*and* edit t-mcore to enable multilibs for 4 byte alignment code. */
-#if 0
-#define TARGET_8ALIGN (target_flags & ALIGN8_BIT)
-#else
-#define TARGET_8ALIGN 1
-#endif
-#define TARGET_DIV (target_flags & DIV_BIT)
-#define TARGET_RELAX_IMM (target_flags & RELAX_IMM_BIT)
-#define TARGET_W_FIELD (target_flags & W_FIELD_BIT)
-#define TARGET_OVERALIGN_FUNC (target_flags & OVERALIGN_FUNC_BIT)
-#define TARGET_CG_DATA (target_flags & CGDATA_BIT)
-#define TARGET_CG_DATA (target_flags & CGDATA_BIT)
-#define TARGET_SLOW_BYTES (target_flags & SLOW_BYTES_BIT)
-#define TARGET_LITTLE_END (target_flags & LITTLE_END_BIT)
-#define TARGET_M340 (target_flags & M340_BIT)
-
-
-#define TARGET_SWITCHES \
-{ {"hardlit", HARDLIT_BIT, \
- N_("Inline constants if it can be done in 2 insns or less") }, \
- {"no-hardlit", - HARDLIT_BIT, \
- N_("Inline constants if it only takes 1 instruction") }, \
- {"4align", - ALIGN8_BIT, \
- N_("Set maximum alignment to 4") }, \
- {"8align", ALIGN8_BIT, \
- N_("Set maximum alignment to 8") }, \
- {"div", DIV_BIT, \
- "" }, \
- {"no-div", - DIV_BIT, \
- N_("Do not use the divide instruction") }, \
- {"relax-immediates", RELAX_IMM_BIT, \
- "" }, \
- {"no-relax-immediates", - RELAX_IMM_BIT, \
- N_("Do not arbitrary sized immediates in bit operations") }, \
- {"wide-bitfields", W_FIELD_BIT, \
- N_("Always treat bit-field as int-sized") }, \
- {"no-wide-bitfields", - W_FIELD_BIT, \
- "" }, \
- {"4byte-functions", OVERALIGN_FUNC_BIT, \
- N_("Force functions to be aligned to a 4 byte boundary") }, \
- {"no-4byte-functions", - OVERALIGN_FUNC_BIT, \
- N_("Force functions to be aligned to a 2 byte boundary") }, \
- {"callgraph-data", CGDATA_BIT, \
- N_("Emit call graph information") }, \
- {"no-callgraph-data", - CGDATA_BIT, \
- "" }, \
- {"slow-bytes", SLOW_BYTES_BIT, \
- N_("Prefer word accesses over byte accesses") }, \
- {"no-slow-bytes", - SLOW_BYTES_BIT, \
- "" }, \
- { "no-lsim", 0, "" }, \
- {"little-endian", LITTLE_END_BIT, \
- N_("Generate little endian code") }, \
- {"big-endian", - LITTLE_END_BIT, \
- "" }, \
- {"210", - M340_BIT, \
- "" }, \
- {"340", M340_BIT, \
- N_("Generate code for the M*Core M340") }, \
- {"", TARGET_DEFAULT, \
- "" } \
-}
+#undef TARGET_8ALIGN
+#define TARGET_8ALIGN 1
extern char * mcore_current_function_name;
-/* Target specific options (as opposed to the switches above). */
-extern const char * mcore_stack_increment_string;
-
-#define TARGET_OPTIONS \
-{ \
- {"stack-increment=", & mcore_stack_increment_string, \
- N_("Maximum amount for a single stack increment operation"), 0} \
-}
-
/* The MCore ABI says that bitfields are unsigned by default. */
#define CC1_SPEC "-funsigned-bitfields"
} \
if (SIZE) \
{ \
- target_flags &= ~ HARDLIT_BIT; \
+ target_flags &= ~MASK_HARDLIT; \
} \
}
--- /dev/null
+; Options for the Motorola MCore port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING. If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+m210
+Target RejectNegative Report InverseMask(M340)
+Generate code for the M*Core M210
+
+m340
+Target RejectNegative Report Mask(M340)
+Generate code for the M*Core M340
+
+m4align
+Target RejectNegative Report InverseMask(8ALIGN)
+Set maximum alignment to 4
+
+m4byte-functions
+Target Report Mask(OVERALIGN_FUNC)
+Force functions to be aligned to a 4 byte boundary
+
+m8align
+Target RejectNegative Report Mask(8ALIGN)
+Set maximum alignment to 8
+
+mbig-endian
+Target RejectNegative Report InverseMask(LITTLE_END)
+Generate big-endian code
+
+mcallgraph-data
+Target Report Mask(CG_DATA)
+Emit call graph information
+
+mdiv
+Target Report Mask(DIV)
+Use the divide instruction
+
+mhardlit
+Target Report Mask(HARDLIT)
+Inline constants if it can be done in 2 insns or less
+
+mlittle-endian
+Target RejectNegative Report Mask(LITTLE_END)
+Generate little-endian code
+
+; Not used by the compiler proper.
+mno-lsim
+Target RejectNegative Undocumented
+
+mrelax-immediates
+Target Report Mask(RELAX_IMM)
+Use arbitrary sized immediates in bit operations
+
+mslow-bytes
+Target Report Mask(SLOW_BYTES)
+Prefer word accesses over byte accesses
+
+mstack-increment=
+Target RejectNegative Joined UInteger Var(mcore_stack_increment) VarExists
+Set the maximum amount for a single stack increment operation
+
+mwide-bitfields
+Target Report Mask(W_FIELD)
+Always treat bitfields as int-sized
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