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* arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 17 Aug 2004 23:38:53 +0000 (23:38 +0000)
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 17 Aug 2004 23:38:53 +0000 (23:38 +0000)
avoid use of preserve_subexpressions_p.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@86159 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm.md

index 3e3252d..e8108e5 100644 (file)
@@ -1,3 +1,8 @@
+2004-08-18  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to
+       avoid use of preserve_subexpressions_p.
+
 2004-08-17  Richard Henderson  <rth@redhat.com>
 
        PR 17051
index 26ac278..351ce2b 100644 (file)
     {
       arm_split_constant (PLUS, SImode, NULL_RTX,
                          INTVAL (operands[2]), operands[0], operands[1],
-                         (no_new_pseudos ? 0 : preserve_subexpressions_p ()));
+                         optimize && !no_new_pseudos);
       DONE;
     }
   "
         {
           arm_split_constant (MINUS, SImode, NULL_RTX,
                              INTVAL (operands[1]), operands[0],
-                             operands[2],
-                             (no_new_pseudos ? 0
-                              :  preserve_subexpressions_p ()));
+                             operands[2], optimize && !no_new_pseudos);
           DONE;
        }
       else /* TARGET_THUMB */
         {
           arm_split_constant (AND, SImode, NULL_RTX,
                              INTVAL (operands[2]), operands[0],
-                             operands[1],
-                             (no_new_pseudos
-                              ? 0 : preserve_subexpressions_p ()));
+                             operands[1], optimize && !no_new_pseudos);
+
           DONE;
         }
     }
         {
           arm_split_constant (IOR, SImode, NULL_RTX,
                              INTVAL (operands[2]), operands[0], operands[1],
-                             (no_new_pseudos
-                             ? 0 : preserve_subexpressions_p ()));
+                             optimize && !no_new_pseudos);
           DONE;
        }
       else /* TARGET_THUMB */
         {
            arm_split_constant (SET, SImode, NULL_RTX,
                               INTVAL (operands[1]), operands[0], NULL_RTX,
-                             (no_new_pseudos ? 0
-                              : preserve_subexpressions_p ()));
+                              optimize && !no_new_pseudos);
           DONE;
         }
     }
              emit_insn (gen_movsi (reg, GEN_INT (val)));
              operands[1] = gen_lowpart (HImode, reg);
            }
-         else if (arm_arch4 && !no_new_pseudos && optimize > 0
+         else if (arm_arch4 && optimize && !no_new_pseudos
                   && GET_CODE (operands[1]) == MEM)
            {
              rtx reg = gen_reg_rtx (SImode);