OSDN Git Service

* doc/tm.texi (defmac SMALL_REGISTER_CLASSES): Remove.
authorsteven <steven@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 3 May 2010 17:47:47 +0000 (17:47 +0000)
committerMasaki Muranaka <monaka@monami-software.com>
Sun, 23 May 2010 05:37:55 +0000 (14:37 +0900)
(TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Add documentation,
based on the above, for new target hook.

* hooks.c (hook_bool_mode_true): New generic hook.
* hooks.h (hook_bool_mode_true): Add prototype.

* target.h (struct gcc_target): Add small_register_classes_for_mode_p
target hook.
* target-def.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): New default
target hook, set to hook_bool_mode_false.
* regs.h: Remove default definition of SMALL_REGISTER_CLASSES.
* reload.c (push_secondary_reload): Replace SMALL_REGISTER_CLASSES
with targetm.small_register_classes_for_mode_p.
(find_reusable_reload): Likewise.
(combine_reloads): Likewise.
* reload1.c (reload_as_needed): Likewise.
* cse.c (approx_reg_cost_1, hash_rtx_cb): Likewise.
* ifcvt.c (noce_process_if_block, check_cond_move_block,
dead_or_predicable): Likewise.
* regmove.c (optimize_reg_copy_1): Likewise.
* calls.c (prepare_call_address): Likewise.
(precompute_register_parameters): Likewise.

* config/sh/sh.h: Replace SMALL_REGISTER_CLASSES with new target
hook definition.
* config/sh/sh.c (sh_small_register_classes_for_mode_p): Add
implementation of the hook that considers all register classes
small except for SH64.
(sh_override_options): Use the new hook.
* config/sh/sh-protos.h (sh_small_register_classes_for_mode_p):
Add prototype.

* config/arm/arm.h: Replace SMALL_REGISTER_CLASSES with new target
hook definition.
* config/arm/arm.c (arm_small_register_classes_for_mode_p): Add
implementation of the hook that considers all register classes
small for THUMB1.
* config/arm/arm-protos.h (arm_small_register_classes_for_mode_p):
Add prototype.

* config/mips/mips.h: Replace SMALL_REGISTER_CLASSES with new target
hook definition.
* config/mips/mips.c (mips_small_register_classes_for_mode_p): Add
implementation of the hook that considers all register classes
small for MIPS16.
* config/mips/mips-protos.h (mips_small_register_classes_for_mode_p):
Add prototype.

* config/i386/i386.h: Replace SMALL_REGISTER_CLASSES with new target
hook definition.
* config/m32c/m32c.h: Likewise.
* config/pdp11/pdp11.h: Likewise.
* config/avr/avr.h: Likewise.
* config/xtensa/xtensa.h: Likewise.
* config/m68hc11/m68hc11.h: Likewise.
* config/mn10300/mn10300.h: Likewise.
* config/mcore/mcore.h: Likewise.
* config/h8300/h8300.h: Likewise.
* config/bfin/bfin.h: Likewise.

* config/iq2000/iq2000.h: Remove SMALL_REGISTER_CLASSES definition.
* config/rx/rx.h: Remove SMALL_REGISTER_CLASSES definition.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158997 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/mips/mips-protos.h
gcc/config/mips/mips.h
gcc/config/sh/sh.c

index 485dfbe..727f897 100644 (file)
@@ -1,3 +1,69 @@
+2010-05-03  Steven Bosscher  <steven@gcc.gnu.org>
+
+       * doc/tm.texi (defmac SMALL_REGISTER_CLASSES): Remove.
+       (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Add documentation,
+       based on the above, for new target hook.
+
+       * hooks.c (hook_bool_mode_true): New generic hook.
+       * hooks.h (hook_bool_mode_true): Add prototype.
+
+       * target.h (struct gcc_target): Add small_register_classes_for_mode_p
+       target hook.
+       * target-def.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): New default
+       target hook, set to hook_bool_mode_false.
+       * regs.h: Remove default definition of SMALL_REGISTER_CLASSES.
+       * reload.c (push_secondary_reload): Replace SMALL_REGISTER_CLASSES
+       with targetm.small_register_classes_for_mode_p.
+       (find_reusable_reload): Likewise.
+       (combine_reloads): Likewise.
+       * reload1.c (reload_as_needed): Likewise.
+       * cse.c (approx_reg_cost_1, hash_rtx_cb): Likewise.
+       * ifcvt.c (noce_process_if_block, check_cond_move_block,
+       dead_or_predicable): Likewise.
+       * regmove.c (optimize_reg_copy_1): Likewise.
+       * calls.c (prepare_call_address): Likewise.
+       (precompute_register_parameters): Likewise.
+
+       * config/sh/sh.h: Replace SMALL_REGISTER_CLASSES with new target
+       hook definition.
+       * config/sh/sh.c (sh_small_register_classes_for_mode_p): Add
+       implementation of the hook that considers all register classes
+       small except for SH64.
+       (sh_override_options): Use the new hook.
+       * config/sh/sh-protos.h (sh_small_register_classes_for_mode_p):
+       Add prototype.
+
+       * config/arm/arm.h: Replace SMALL_REGISTER_CLASSES with new target
+       hook definition.
+       * config/arm/arm.c (arm_small_register_classes_for_mode_p): Add
+       implementation of the hook that considers all register classes
+       small for THUMB1.
+       * config/arm/arm-protos.h (arm_small_register_classes_for_mode_p):
+       Add prototype.
+
+       * config/mips/mips.h: Replace SMALL_REGISTER_CLASSES with new target
+       hook definition.
+       * config/mips/mips.c (mips_small_register_classes_for_mode_p): Add
+       implementation of the hook that considers all register classes
+       small for MIPS16.
+       * config/mips/mips-protos.h (mips_small_register_classes_for_mode_p):
+       Add prototype.
+
+       * config/i386/i386.h: Replace SMALL_REGISTER_CLASSES with new target
+       hook definition.
+       * config/m32c/m32c.h: Likewise.
+       * config/pdp11/pdp11.h: Likewise.
+       * config/avr/avr.h: Likewise.
+       * config/xtensa/xtensa.h: Likewise.
+       * config/m68hc11/m68hc11.h: Likewise.
+       * config/mn10300/mn10300.h: Likewise.
+       * config/mcore/mcore.h: Likewise.
+       * config/h8300/h8300.h: Likewise.
+       * config/bfin/bfin.h: Likewise.
+
+       * config/iq2000/iq2000.h: Remove SMALL_REGISTER_CLASSES definition.
+       * config/rx/rx.h: Remove SMALL_REGISTER_CLASSES definition.
+
 2010-05-03  Anatoly Sokolov  <aesok@post.ru>
 
        * double-int.h (tree_to_double_int): Remove macro.
index e4fbb32..89a0007 100644 (file)
@@ -291,6 +291,7 @@ extern rtx mips_function_value (const_tree, const_tree, enum machine_mode);
 
 extern bool mips_cannot_change_mode_class (enum machine_mode,
                                           enum machine_mode, enum reg_class);
+extern bool mips_small_register_classes_for_mode_p (enum machine_mode);
 extern bool mips_dangerous_for_la25_p (rtx);
 extern bool mips_modes_tieable_p (enum machine_mode, enum machine_mode);
 extern enum reg_class mips_preferred_reload_class (rtx, enum reg_class);
index 891ea1f..d5c98a6 100644 (file)
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler.  MIPS version.
    Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
-   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
+   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
    Free Software Foundation, Inc.
    Contributed by A. Lichnewsky (lich@inria.inria.fr).
    Changed by Michael Meissner (meissner@osf.org).
@@ -228,7 +228,7 @@ enum mips_code_readable_setting {
 #define TARGET_GPWORD                          \
   (TARGET_ABICALLS                             \
    && !TARGET_ABSOLUTE_ABICALLS                        \
-   && !(mips_abi == ABI_64 && TARGET_IRIX6))
+   && !(mips_abi == ABI_64 && TARGET_IRIX))
 
 /* True if the output must have a writable .eh_frame.
    See ASM_PREFERRED_EH_DATA_FORMAT for details.  */
@@ -369,6 +369,7 @@ enum mips_code_readable_setting {
 #define TARGET_SYNC_AFTER_SC (!TARGET_OCTEON)
 
 /* IRIX specific stuff.  */
+#define TARGET_IRIX       0
 #define TARGET_IRIX6      0
 
 /* Define preprocessor macros for the -march and -mtune options.
@@ -395,7 +396,7 @@ enum mips_code_readable_setting {
   do                                                                   \
     {                                                                  \
       /* Everyone but IRIX defines this to mips.  */                   \
-      if (!TARGET_IRIX6)                                               \
+      if (!TARGET_IRIX                                               \
        builtin_assert ("machine=mips");                                \
                                                                        \
       builtin_assert ("cpu=mips");                                     \
@@ -415,7 +416,7 @@ enum mips_code_readable_setting {
       if (TARGET_64BIT)                                                        \
        builtin_define ("__mips64");                                    \
                                                                        \
-      if (!TARGET_IRIX6)                                               \
+      if (!TARGET_IRIX)                                                        \
        {                                                               \
          /* Treat _R3000 and _R4000 like register-size                 \
             defines, which is how they've historically                 \
@@ -2005,6 +2006,13 @@ enum reg_class
 
 #define INDEX_REG_CLASS NO_REGS
 
+/* When this hook returns true for MODE, the compiler allows
+   registers explicitly used in the rtl to be used as spill registers
+   but prevents the compiler from extending the lifetime of these
+   registers.  */
+#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \
+  mips_small_register_classes_for_mode_p
+
 /* We generally want to put call-clobbered registers ahead of
    call-saved ones.  (IRA expects this.)  */
 
index 036c6e5..c3293fe 100644 (file)
@@ -11255,7 +11255,7 @@ sh_cannot_change_mode_class (enum machine_mode from, enum machine_mode to,
 /* Return true if registers in machine mode MODE will likely be
    allocated to registers in small register classes.  */
 
-bool
+static bool
 sh_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED)
 {
   return (! TARGET_SHMEDIA);