2009-06-18 Sandra Loosemore <sandra@codesourcery.com>

	gcc/
	* config/arm/arm.c (TARGET_SCALAR_MODE_SUPPORTED_P): Redefine.
	(arm_scalar_mode_supported_p): New function.

	gcc/testsuite/
	* gcc.target/arm/fp16-compile-none-2.c: New.
	* gcc.target/arm/fp16-compile-ieee-12.c: New.
	* gcc.target/arm/fp16-compile-alt-12.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@148657 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 27a7432..e216ec1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-06-18  Sandra Loosemore  <sandra@codesourcery.com>
+
+       * config/arm/arm.c (TARGET_SCALAR_MODE_SUPPORTED_P): Redefine.
+       (arm_scalar_mode_supported_p): New function.
+
 2009-06-18  Paul Brook  <paul@codesourcery.com>
            Sandra Loosemore  <sandra@codesourcery.com>
 

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e6b2edb..a51cbb1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -205,6 +205,7 @@ static const char *arm_invalid_parameter_type (const_tree t);
 static const char *arm_invalid_return_type (const_tree t);
 static tree arm_promoted_type (const_tree t);
 static tree arm_convert_to_type (tree type, tree expr);
+static bool arm_scalar_mode_supported_p (enum machine_mode);
 
 \f
 /* Initialize the GCC target structure.  */
@@ -424,6 +425,9 @@ static tree arm_convert_to_type (tree type, tree expr);
 #undef TARGET_CONVERT_TO_TYPE
 #define TARGET_CONVERT_TO_TYPE arm_convert_to_type
 
+#undef TARGET_SCALAR_MODE_SUPPORTED_P
+#define TARGET_SCALAR_MODE_SUPPORTED_P arm_scalar_mode_supported_p
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 \f
 /* Obstack for minipool constant handling.  */
@@ -16419,6 +16423,21 @@ arm_convert_to_type (tree type, tree expr)
   return NULL_TREE;
 }
 
+/* Implement TARGET_SCALAR_MODE_SUPPORTED_P.
+   This simply adds HFmode as a supported mode; even though we don't
+   implement arithmetic on this type directly, it's supported by
+   optabs conversions, much the way the double-word arithmetic is
+   special-cased in the default hook.  */
+
+static bool
+arm_scalar_mode_supported_p (enum machine_mode mode)
+{
+  if (mode == HFmode)
+    return (arm_fp16_format != ARM_FP16_FORMAT_NONE);
+  else
+    return default_scalar_mode_supported_p (mode);
+}
+
 /* Errors in the source file can cause expand_expr to return const0_rtx
    where we expect a vector.  To avoid crashing, use one of the vector
    clear instructions.  */

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 09565f5..9a7c599 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,11 @@
 2009-06-18  Sandra Loosemore  <sandra@codesourcery.com>
 
+       * gcc.target/arm/fp16-compile-none-2.c: New.
+       * gcc.target/arm/fp16-compile-ieee-12.c: New.
+       * gcc.target/arm/fp16-compile-alt-12.c: New.
+
+2009-06-18  Sandra Loosemore  <sandra@codesourcery.com>
+
        * gcc.target/arm/fp16-compile-alt-1.c: New.
        * gcc.target/arm/fp16-compile-alt-2.c: New.
        * gcc.target/arm/fp16-compile-alt-3.c: New.

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
new file mode 100644 (file)
index 0000000..09586e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-12.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+float xx __attribute__((mode(HF))) = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 2" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-12.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-12.c
new file mode 100644 (file)
index 0000000..244c96f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-12.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+float xx __attribute__((mode(HF))) = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 1" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */

diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c
new file mode 100644 (file)
index 0000000..eb7eef5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-none-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=none" } */
+
+/* mode(HF) attributes are not recognized unless you explicitly enable
+   half-precision floating point by selecting -mfp16-format=ieee or
+   -mfp16-format=alternative.  */
+float xx __attribute__((mode(HF))) = 0.0;  /* { dg-error "HF" } */