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* config/i386/i386.md (*ashr<mode>3_cconly): Fix wrong mode of
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 11 Apr 2010 14:26:27 +0000 (14:26 +0000)
committerMasaki Muranaka <monaka@monami-software.com>
Sun, 23 May 2010 00:55:45 +0000 (09:55 +0900)
scratch register.
(*lshr<mode>3_cconly): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158204 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/i386/i386.md

index f718ae0..6e467e5 100644 (file)
@@ -1,5 +1,11 @@
 2010-04-11  Uros Bizjak  <ubizjak@gmail.com>
 
 2010-04-11  Uros Bizjak  <ubizjak@gmail.com>
 
+       * config/i386/i386.md (*ashr<mode>3_cconly): Fix wrong mode of
+       scratch register.
+       (*lshr<mode>3_cconly): Ditto.
+
+2010-04-11  Uros Bizjak  <ubizjak@gmail.com>
+
        * config/i386/i386.md (lshr<mode>3): Macroize expander from
        lshr{qi,hi,si,di,ti}3_1 using SDWIM mode iterator.
        (*lshr<mode>3_doubleword): New insn_and_split_pattern.  Macroize
        * config/i386/i386.md (lshr<mode>3): Macroize expander from
        lshr{qi,hi,si,di,ti}3_1 using SDWIM mode iterator.
        (*lshr<mode>3_doubleword): New insn_and_split_pattern.  Macroize
@@ -46,7 +52,7 @@
        *ashrdi3_one_bit_cconly_rex64. Macroize insn from
        *ashr{qi,hi,si}3_cconly and *ashrdi3_cconly_rex64 using
        SWI mode iterator.
        *ashrdi3_one_bit_cconly_rex64. Macroize insn from
        *ashr{qi,hi,si}3_cconly and *ashrdi3_cconly_rex64 using
        SWI mode iterator.
-       (sign_extend splitters): Update for renamed ashr{di,si}3_31 patterns.
+       (sign_extend splitters): Update for renamed ashr{di,si}3_cvt patterns.
        * config/i386/i386.c (ix86_split_ashr): Update for renamed
        x86_shift<mode>_adj_3 expanders.
 
        * config/i386/i386.c (ix86_split_ashr): Update for renamed
        x86_shift<mode>_adj_3 expanders.
 
 
        * tree-vectorizer.h (struct _stmt_vec_info): Document
        that vectype is the type of the LHS.
 
        * tree-vectorizer.h (struct _stmt_vec_info): Document
        that vectype is the type of the LHS.
-       (supportable_widening_operation, supportable_narrowing_operation): 
+       (supportable_widening_operation, supportable_narrowing_operation):
        Get both input and output vector types as arguments.
        (vect_is_simple_use_1): Declare.
        (get_same_sized_vectype): Likewise.
        Get both input and output vector types as arguments.
        (vect_is_simple_use_1): Declare.
        (get_same_sized_vectype): Likewise.
        inserting GIMPLE_NOPs into the IL.
        * tree-ssa-structalias.c (get_constraint_for_component_ref):
        Explicitly strip handled components and indirect references.
        inserting GIMPLE_NOPs into the IL.
        * tree-ssa-structalias.c (get_constraint_for_component_ref):
        Explicitly strip handled components and indirect references.
+
        * fold-const.c (fold_unary_loc): Do not strip qualifiers when
        folding address expressions.
        * gimple.c (gimple_ior_addresses_taken_1): Use get_base_address.
        * fold-const.c (fold_unary_loc): Do not strip qualifiers when
        folding address expressions.
        * gimple.c (gimple_ior_addresses_taken_1): Use get_base_address.
index 03e4f38..8ff8643 100644 (file)
          (ashiftrt:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")
                        (match_operand:QI 2 "<shift_immediate_operand>" "<S>"))
          (const_int 0)))
          (ashiftrt:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")
                        (match_operand:QI 2 "<shift_immediate_operand>" "<S>"))
          (const_int 0)))
-   (clobber (match_scratch:DI 0 "=<r>"))]
+   (clobber (match_scratch:SWI 0 "=<r>"))]
   "(optimize_function_for_size_p (cfun)
     || !TARGET_PARTIAL_FLAG_REG_STALL
     || (operands[2] == const1_rtx
   "(optimize_function_for_size_p (cfun)
     || !TARGET_PARTIAL_FLAG_REG_STALL
     || (operands[2] == const1_rtx
          (lshiftrt:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")
                        (match_operand:QI 2 "<shift_immediate_operand>" "<S>"))
          (const_int 0)))
          (lshiftrt:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")
                        (match_operand:QI 2 "<shift_immediate_operand>" "<S>"))
          (const_int 0)))
-   (clobber (match_scratch:DI 0 "=<r>"))]
+   (clobber (match_scratch:SWI 0 "=<r>"))]
   "(optimize_function_for_size_p (cfun)
     || !TARGET_PARTIAL_FLAG_REG_STALL
     || (operands[2] == const1_rtx
   "(optimize_function_for_size_p (cfun)
     || !TARGET_PARTIAL_FLAG_REG_STALL
     || (operands[2] == const1_rtx