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* MAINTAINERS (Blanket Write Privs): Change to Global Reviewers.
authormmitchel <mmitchel@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 1 Oct 2008 18:38:07 +0000 (18:38 +0000)
committermmitchel <mmitchel@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 1 Oct 2008 18:38:07 +0000 (18:38 +0000)
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@140817 138bc75d-0d04-0410-961f-82ee72b054a4

ChangeLog
MAINTAINERS

index 0420f25..07558fe 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2008-10-01  Mark Mitchell  <mark@codesourcery.com>
+
+       * MAINTAINERS (Blanket Write Privs): Change to Global Reviewers.
+
 2008-09-29  David Daney        <david.daney@caviumnetworks.com>
 
        * MAINTAINERS (Write After Approval): Update e-mail address.
 2008-09-29  David Daney        <david.daney@caviumnetworks.com>
 
        * MAINTAINERS (Write After Approval): Update e-mail address.
index b60d24d..4a43632 100644 (file)
@@ -18,7 +18,7 @@ To report problems in GCC, please visit:
 Maintainers
 ===========
 
 Maintainers
 ===========
 
-                       Blanket Write Privs.
+                       Global Reviewers
 
 Richard Earnshaw                               richard.earnshaw@arm.com
 Richard Henderson                              rth@redhat.com
 
 Richard Earnshaw                               richard.earnshaw@arm.com
 Richard Henderson                              rth@redhat.com
@@ -32,6 +32,9 @@ Mark Mitchell                                 mark@codesourcery.com
 Bernd Schmidt                                  bernd.schmidt@analog.com
 Jim Wilson                                     wilson@tuliptree.org
 
 Bernd Schmidt                                  bernd.schmidt@analog.com
 Jim Wilson                                     wilson@tuliptree.org
 
+Note that while global reviewers can approve changes to any part of
+the compiler or associated libraries, they still need approval for
+their own patches from other maintainers or reviewers.
 
                        CPU Port Maintainers    (CPU alphabetical order)
 
 
                        CPU Port Maintainers    (CPU alphabetical order)