* config/i386/i386.md (*jcc_fused_1): Handle all valid compare

	operators for "test" insn.  Macroize insn using SWI mode macro.
	(*jcc_fused_2): Ditto.
	(*jcc_fused_3): Macroize insn using SWI mode macro.
	(*jcc_fused_4): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@136988 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 908ccc1..3edbc56 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,12 +1,19 @@
+2008-06-20  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*jcc_fused_1): Handle all valid compare
+       operators for "test" insn.  Macroize insn using SWI mode macro.
+       (*jcc_fused_2): Ditto.
+       (*jcc_fused_3): Macroize insn using SWI mode macro.
+       (*jcc_fused_4): Ditto.
+
 2008-06-20  Bernhard Fischer  <aldot@gcc.gnu.org>
 
-        * tree-ssa-pre.c: Fix typo in comment.
-        (init_antic, fini_antic): Add explicit funtions for
-        initializing and deinitializing ANTIC and AVAIL sets.
-        (create_expression_by_pieces): Fix typo in comment.
-        Remove redundant set of new_stuff and use NULL_TREE instead of
-        NULL.
-        (execute_pre): Eventually dump details about ANTIC_IN.
+       * tree-ssa-pre.c: Fix typo in comment.
+       (init_antic, fini_antic): Add explicit funtions for
+       initializing and deinitializing ANTIC and AVAIL sets.
+       (create_expression_by_pieces): Fix typo in comment.
+       Remove redundant set of new_stuff and use NULL_TREE instead of NULL.
+       (execute_pre): Eventually dump details about ANTIC_IN.
 
 2008-06-19  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index abfd253..b6b19a1 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14038,45 +14038,69 @@
 
 (define_insn "*jcc_fused_1"
   [(set (pc)
-       (if_then_else (match_operator 1 "ix86_comparison_uns_operator"
-                       [(match_operand:SI 2 "nonimmediate_operand" "r,m,r")
-                        (match_operand:SI 3 "general_operand" "ri,r,m")])
+       (if_then_else (match_operator 1 "comparison_operator"
+                       [(match_operand:SWI 2 "register_operand" "<r>")
+                        (match_operand:SWI 3 "const0_operand" "n")])
         (label_ref (match_operand 0 "" ""))
         (pc)))]
-  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT
-   && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
+  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
 {
-  if (REG_P (operands[2])
-      && operands[3] == CONST0_RTX (GET_MODE (operands[3])))
-    output_asm_insn ("test{l}\t%2, %2", operands);
-  else
-    output_asm_insn ("cmp{l}\t{%3, %2|%2, %3}",operands);
-
-  return "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
+  return "test{<imodesuffix>}\t%2, %2\n\t"
+        "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
 }
   [(set_attr "type" "multi")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "<MODE>")])
 
 (define_insn "*jcc_fused_2"
   [(set (pc)
-       (if_then_else (match_operator 1 "ix86_comparison_uns_operator"
-                       [(match_operand:SI 2 "nonimmediate_operand" "r,m,r")
-                        (match_operand:SI 3 "general_operand" "ri,r,m")])
+       (if_then_else (match_operator 1 "comparison_operator"
+                       [(match_operand:SWI 2 "register_operand" "<r>")
+                        (match_operand:SWI 3 "const0_operand" "n")])
         (pc)
         (label_ref (match_operand 0 "" ""))))]
+  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
+{
+  return "test{<imodesuffix>}\t%2, %2\n\t"
+        "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
+}
+  [(set_attr "type" "multi")
+   (set_attr "mode" "<MODE>")])
+
+(define_insn "*jcc_fused_3"
+  [(set (pc)
+       (if_then_else
+         (match_operator 1 "ix86_comparison_uns_operator"
+           [(match_operand:SWI 2 "nonimmediate_operand" "<r>,m,<r>")
+            (match_operand:SWI 3 "<general_operand>" "<r><i>,<r>,m")])
+        (label_ref (match_operand 0 "" ""))
+        (pc)))]
   "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT
-   && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
+   && !(MEM_P (operands[2])
+       && (MEM_P (operands[3]) || CONST_INT_P (operands[3])))"
 {
-  if (REG_P (operands[2])
-      && operands[3] == CONST0_RTX (GET_MODE (operands[3])))
-    output_asm_insn ("test{l}\t%2, %2", operands);
-  else
-    output_asm_insn ("cmp{l}\t{%3, %2|%2, %3}",operands);
+  return "cmp{<imodesuffix>}\t{%3, %2|%2, %3}\n\t"
+        "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
+}
+  [(set_attr "type" "multi")
+   (set_attr "mode" "<MODE>")])
 
-  return "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
+(define_insn "*jcc_fused_4"
+  [(set (pc)
+       (if_then_else
+         (match_operator 1 "ix86_comparison_uns_operator"
+           [(match_operand:SWI 2 "nonimmediate_operand" "<r>,m,<r>")
+            (match_operand:SWI 3 "<general_operand>" "<r><i>,<r>,m")])
+        (pc)
+        (label_ref (match_operand 0 "" ""))))]
+  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT
+   && !(MEM_P (operands[2])
+       && (MEM_P (operands[3]) || CONST_INT_P (operands[3])))"
+{
+  return "cmp{<imodesuffix>}\t{%3, %2|%2, %3}\n\t"
+        "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
 }
   [(set_attr "type" "multi")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "<MODE>")])
 
 ;; In general it is not safe to assume too much about CCmode registers,
 ;; so simplify-rtx stops when it sees a second one.  Under certain