* config/m32r/m32r.h (IRA_COVER_CLASSES): Define.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@139718 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c4430b7..e350c09 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2008-08-28  Nick Clifton  <nickc@redhat.com>
+
+       * config/m32r/m32r.h (IRA_COVER_CLASSES): Define.
+
 2008-08-28  Paul Brook  <paul@codesourcery.com>
 
        * config/arm/vfp11.md: Update license notice.

diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 0c9e318..eed0734 100644 (file)
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -1,6 +1,6 @@
 /* Definitions of target machine for GNU compiler, Renesas M32R cpu.
    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
-   2005, 2006, 2007 Free Software Foundation, Inc.
+   2005, 2006, 2007, 2008  Free Software Foundation, Inc.
 
    This file is part of GCC.
 
@@ -624,6 +624,11 @@ enum reg_class
   NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
 };
 
+#define IRA_COVER_CLASSES                              \
+{                                                      \
+  ACCUM_REGS, GENERAL_REGS, LIM_REG_CLASSES            \
+}
+
 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
 
 /* Give names of register classes as strings for dump file.  */