2006-08-06 Paolo Bonzini <bonzini@gnu.org>

	PR target/26827
	* config/i386/i386.md: Add peephole2 to avoid "fld %st"
	instructions.

2006-08-06  Paolo Bonzini  <bonzini@gnu.org>

	PR target/26827
	* gcc.target/i386/pr27827.c: New testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@115969 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e1156df..2f0a1ec 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2006-08-06  Paolo Bonzini  <bonzini@gnu.org>
+
+       PR target/27827
+
+       * conffig/i386/i386.md: Add peephole2 to avoid "fld %st"
+       instructions.
+
 2006-08-06  Andreas Schwab  <schwab@suse.de>
 
        * config/m68k/m68k.c (m68k_output_function_epilogue): Fix format

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 4808853..a608b74 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18757,6 +18757,32 @@
   [(set_attr "type" "sseadd")
    (set_attr "mode" "DF")])
 
+;; Make two stack loads independent:
+;;   fld aa              fld aa
+;;   fld %st(0)     ->   fld bb
+;;   fmul bb             fmul %st(1), %st
+;;
+;; Actually we only match the last two instructions for simplicity.
+(define_peephole2
+  [(set (match_operand 0 "fp_register_operand" "")
+       (match_operand 1 "fp_register_operand" ""))
+   (set (match_dup 0)
+       (match_operator 2 "binary_fp_operator"
+          [(match_dup 0)
+           (match_operand 3 "memory_operand" "")]))]
+  "REGNO (operands[0]) != REGNO (operands[1])"
+  [(set (match_dup 0) (match_dup 3))
+   (set (match_dup 0) (match_dup 4))]
+
+  ;; The % modifier is not operational anymore in peephole2's, so we have to
+  ;; swap the operands manually in the case of addition and multiplication.
+  "if (COMMUTATIVE_ARITH_P (operands[2]))
+     operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[2]), GET_MODE (operands[2]),
+                                operands[0], operands[1]);
+   else
+     operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[2]), GET_MODE (operands[2]),
+                                operands[1], operands[0]);")
+
 ;; Conditional addition patterns
 (define_expand "addqicc"
   [(match_operand:QI 0 "register_operand" "")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bdce8ca..5fef813 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-08-06  Paolo Bonzini  <bonzini@gnu.org>
+
+       PR target/27827
+       * gcc.target/i386/pr27827.c: New testcase.
+
 2006-08-06  Paul Thomas  <pault@gcc.gnu.org>
 
        PR fortran/28590

diff --git a/gcc/testsuite/gcc.target/i386/pr27827.c b/gcc/testsuite/gcc.target/i386/pr27827.c
new file mode 100644 (file)
index 0000000..b3b377a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr27827.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+double a, b;
+double f(double c)
+{
+  double x = a * b;
+  return x + c * a;
+}
+
+/* { dg-final { scan-assembler-not "fld\[ \t\]*%st" } } */
+/* { dg-final { scan-assembler "fmul\[ \t\]*%st" } } */