* config/m32c/m32c.h (ENDFILE_SPEC, LINK_SPEC, SIZE_TYPE,

	PTRDIFF_TYPE, WCHAR_TYPE, WCHAR_TYPE_SIZE): Define.
	* config.gcc (m32c-*-rtems*, m32c-*-elf*): Don't use svr4.h.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167780 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8288373..02a21a0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2010-12-13  Joseph Myers  <joseph@codesourcery.com>
+
+       * config/m32c/m32c.h (ENDFILE_SPEC, LINK_SPEC, SIZE_TYPE,
+       PTRDIFF_TYPE, WCHAR_TYPE, WCHAR_TYPE_SIZE): Define.
+       * config.gcc (m32c-*-rtems*, m32c-*-elf*): Don't use svr4.h.
+
 2010-12-14  Bernd Schmidt  <bernds@codesourcery.com>
 
        PR rtl-optimization/44374

diff --git a/gcc/config.gcc b/gcc/config.gcc
index ceecc24..38a343b 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2675,13 +2675,13 @@ am33_2.0-*-linux*)
        use_collect2=no
        ;;
 m32c-*-rtems*)
-       tm_file="dbxelf.h elfos.h svr4.h ${tm_file} m32c/rtems.h rtems.h newlib-stdint.h"
+       tm_file="dbxelf.h elfos.h ${tm_file} m32c/rtems.h rtems.h newlib-stdint.h"
        tmake_file="${tmake_file} t-rtems"
        c_target_objs="m32c-pragma.o"
        cxx_target_objs="m32c-pragma.o"
        ;;
 m32c-*-elf*)
-       tm_file="dbxelf.h elfos.h svr4.h newlib-stdint.h ${tm_file}"
+       tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
        c_target_objs="m32c-pragma.o"
        cxx_target_objs="m32c-pragma.o"
        ;;

diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h
index f72260d..a953ee3 100644 (file)
--- a/gcc/config/m32c/m32c.h
+++ b/gcc/config/m32c/m32c.h
@@ -27,6 +27,13 @@
 #undef  STARTFILE_SPEC
 #define STARTFILE_SPEC "crt0.o%s crtbegin.o%s"
 
+#undef  ENDFILE_SPEC
+#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
+
+#undef  LINK_SPEC
+#define LINK_SPEC "%{h*} %{v:-V} \
+                  %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
+
 /* There are four CPU series we support, but they basically break down
    into two families - the R8C/M16C families, with 16-bit address
    registers and one set of opcodes, and the M32CM/M32C group, with
@@ -190,6 +197,18 @@ machine_function;
 #undef UINTPTR_TYPE
 #define UINTPTR_TYPE (TARGET_A16 ? "unsigned int" : "long unsigned int")
 
+#undef  SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef  PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef  WCHAR_TYPE
+#define WCHAR_TYPE "long int"
+
+#undef  WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
+
 /* REGISTER USAGE */
 
 /* Register Basics */