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PR target/46098
authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 14 May 2012 21:30:23 +0000 (21:30 +0000)
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 14 May 2012 21:30:23 +0000 (21:30 +0000)
* config/i386/i386.c (ix86_expand_special_args_builtin): Always
generate target register for "load" class builtins.

Revert:
2010-10-22  Uros Bizjak  <ubizjak@gmail.com>

PR target/46098
* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
(<sse>_movu<ssemodesuffix>): New expander.
(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
(avx_movdqu<avxmodesuffix>): New expander.
(*sse2_movdqu): Rename from sse2_movdqu.
(sse2_movdqu): New expander.

testsuite/ChangeLog:

* gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
* gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@187482 138bc75d-0d04-0410-961f-82ee72b054a4

12 files changed:
gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c

index 7e36c78..5c2ff61 100644 (file)
@@ -1,3 +1,23 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/i386.c (ix86_expand_special_args_builtin): Always
+       generate target register for "load" class builtins.
+
+       Revert:
+       2010-10-22  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
+       Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
+       (avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
+       (*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
+       (<sse>_movu<ssemodesuffix>): New expander.
+       (*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
+       (avx_movdqu<avxmodesuffix>): New expander.
+       (*sse2_movdqu): Rename from sse2_movdqu.
+       (sse2_movdqu): New expander.
+
 2012-05-14  Jakub Jelinek  <jakub@redhat.com>
 
        * dwarf2out.c (dwarf2out_define, dwarf2out_undef): Treat
index 3884c4d..acc8ea9 100644 (file)
@@ -28955,8 +28955,8 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
       arg_adjust = 0;
       if (optimize
          || target == 0
-         || GET_MODE (target) != tmode
-         || !insn_p->operand[0].predicate (target, tmode))
+         || !register_operand (target, tmode)
+         || GET_MODE (target) != tmode)
        target = gen_reg_rtx (tmode);
     }
 
index 1b4684d..7979db5 100644 (file)
   DONE;
 })
 
-(define_expand "<sse>_movu<ssemodesuffix><avxsizesuffix>"
-  [(set (match_operand:VF 0 "nonimmediate_operand" "")
-       (unspec:VF
-         [(match_operand:VF 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "TARGET_SSE"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse>_movu<ssemodesuffix><avxsizesuffix>"
+(define_insn "<sse>_movu<ssemodesuffix><avxsizesuffix>"
   [(set (match_operand:VF 0 "nonimmediate_operand" "=x,m")
        (unspec:VF
          [(match_operand:VF 1 "nonimmediate_operand" "xm,x")]
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<MODE>")])
 
-(define_expand "<sse2>_movdqu<avxsizesuffix>"
-  [(set (match_operand:VI1 0 "nonimmediate_operand" "")
-       (unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand" "")]
-                   UNSPEC_MOVU))]
-  "TARGET_SSE2"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse2>_movdqu<avxsizesuffix>"
+(define_insn "<sse2>_movdqu<avxsizesuffix>"
   [(set (match_operand:VI1 0 "nonimmediate_operand" "=x,m")
        (unspec:VI1 [(match_operand:VI1 1 "nonimmediate_operand" "xm,x")]
                    UNSPEC_MOVU))]
index aa5e030..b2c7ecb 100644 (file)
@@ -1,3 +1,8 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/avx256-unaligned-load-[1234].c: Update scan strings.
+       * gcc.target/i386/avx256-unaligned-store-[1234].c: Ditto.
+
 2012-05-12  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gnat.dg/null_pointer_deref3.adb: New test.
index c909b94..c2511c6 100644 (file)
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler "\\*sse_movups/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/1" } } */
+/* { dg-final { scan-assembler "sse_movups/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */
index f1d7979..9d71673 100644 (file)
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/1" } } */
-/* { dg-final { scan-assembler "\\*sse2_movdqu/1" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/1" } } */
+/* { dg-final { scan-assembler "sse2_movdqu/1" } } */
 /* { dg-final { scan-assembler "vinsert.128" } } */
index fe36248..efb5f57 100644 (file)
@@ -14,6 +14,6 @@ avx_test (void)
     c[i] = a[i] * b[i+3];
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/1" } } */
-/* { dg-final { scan-assembler "\\*sse2_movupd/1" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/1" } } */
+/* { dg-final { scan-assembler "sse2_movupd/1" } } */
 /* { dg-final { scan-assembler "vinsertf128" } } */
index 0d3ef33..7c015a8 100644 (file)
@@ -14,6 +14,6 @@ avx_test (void)
     b[i] = a[i+3] * 2;
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/1" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/1" } } */
+/* { dg-final { scan-assembler "avx_movups256/1" } } */
+/* { dg-final { scan-assembler-not "avx_movups/1" } } */
 /* { dg-final { scan-assembler-not "vinsertf128" } } */
index 6af02a2..0b58396 100644 (file)
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups256/2" } } */
 /* { dg-final { scan-assembler "vmovups.*\\*movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */
index 3339cc5..eac460f 100644 (file)
@@ -24,6 +24,6 @@ avx_test (void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movdqu256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movdqu256/2" } } */
 /* { dg-final { scan-assembler "vmovdqu.*\\*movv16qi_internal/3" } } */
 /* { dg-final { scan-assembler "vextract.128" } } */
index 8ecd363..7536258 100644 (file)
@@ -17,6 +17,6 @@ avx_test (void)
     d[i] = c[i] * 20.0;
 }
 
-/* { dg-final { scan-assembler-not "\\*avx_movupd256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movupd256/2" } } */
 /* { dg-final { scan-assembler "vmovupd.*\\*movv2df_internal/3" } } */
 /* { dg-final { scan-assembler "vextractf128" } } */
index 96cca66..39b6f3b 100644 (file)
@@ -14,7 +14,7 @@ avx_test (void)
     b[i+3] = a[i] * c[i];
 }
 
-/* { dg-final { scan-assembler "\\*avx_movups256/2" } } */
-/* { dg-final { scan-assembler-not "\\*avx_movups/2" } } */
+/* { dg-final { scan-assembler "avx_movups256/2" } } */
+/* { dg-final { scan-assembler-not "avx_movups/2" } } */
 /* { dg-final { scan-assembler-not "\\*avx_movv4sf_internal/3" } } */
 /* { dg-final { scan-assembler-not "vextractf128" } } */