+2002-06-05 David S. Miller <davem@redhat.com>
+
+ Delete SEQUENCE rtl usage outside of reorg and ssa passes.
+ * rtl.h (gen_sequence, emit_insns, emit_insns_before,
+ emit_insns_before_scope, emit_insns_after,
+ emit_insns_after_scope): Delete declaration.
+ * ada/misc.c (insert_code_for): Use emit_insn* instead of
+ emit_insns_foo.
+ * config/alpha/alpha.c (alpha_set_memflags_1): Abort on SEQUENCE.
+ (alpha_set_memflags): Fix comment.
+ (set_frame_related_p): Use get_insns instead of gen_sequence.
+ * config/alpha/alpha.md (setjmp receiver splitter): Avoid
+ emitting no insns.
+ * config/arm/arm.c (arm_finalize_pic): Use get_insns instead of
+ gen_sequence.
+ (arm_gen_load_multiple, arm_gen_store_multiple): Likewise.
+ * config/fr30/fr30.c (fr30_move_double): Likewise.
+ * config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_movstr):
+ Likewise.
+ * config/ia64/ia64.c (spill_restore_mem): Likewise.
+ * config/ia64/ia64.md (conditional move spliiter): Avoid emitting
+ no insns.
+ * config/m32r/m32r.c (gen_split_move_double): Use get_insns
+ instead of gen_sequence.
+ * config/mips/mips.c (embedded_pic_fnaddr_reg): Likewise.
+ (mips_expand_prologue, mips16_gp_pseudo_reg): Likewise.
+ * config/sh/sh.c (sh_need_epilogue): Likewise.
+ * config/sparc/sparc.md (current_function_calls_alloca, flat): New
+ attributes.
+ (setjmp pattern and split): Use them to avoid splitter which emits
+ no RTL.
+ * genattrtab.c (main): Emit include of function.h
+ * config/stormy16/stormy16.c (xstormy16_split_cbranch): Use
+ get_insns instead of gen_sequence.
+ * config/cris/cris.c (cris_split_movdx): Likewise.
+ * emit-rtl.c (emit_insns*): Kill.
+ (try_split): Expect insn list instead of SEQUENCE.
+ (make_jump_insn_raw, make_call_insn_raw): Fix comments.
+ (emit_*insn*): Reimplement to work with INSN lists and PATTERNs.
+ Make them abort if a SEQUENCE is given and RTL checking is
+ enabled.
+ (emit_*_scope): Don't forget to set scope on final insn.
+ (gen_sequence): Move from here...
+ * ssa.c (gen_sequence): To here as private function.
+ * builtins.c (expand_builtin_apply_args): Use emit_insn_foo, fix
+ comments.
+ (expand_builtin_return, expand_builtin_mathfn): Likewise.
+ (expand_builtin_strlen): Use get_insns instead of gen_sequence.
+ (expand_builtin_saveregs): Use emit_insn_foo, fix comments.
+ (expand_builtin_expect_jump): Use get_insns and fix comments.
+ * calls.c (try_to_integrate): Use emit_insn_foo.
+ (expand_call, emit_library_call_value_1): Likewise.
+ * expr.c (emit_queue): Handle insn lists instead of SEQUENCE.
+ (emit_move_insn_1): Use get_insns instead of gen_sequence.
+ (expand_expr): Use emit_insn_foo.
+ * cfgrtl.c (commit_one_edge_insertion): Use emit_insn_foo.
+ * except.c (build_post_landing_pads): Likewise.
+ * flow.c (attempt_auto_inc): Likewise.
+ * stmt.c (expand_fixup, fixup_gotos, expand_nl_handler_label,
+ expand_nl_goto_receivers, expand_decl_cleanup): Likewise.
+ * function.c (fixup_var_refs_insn): Use get_insns instead of
+ gen_sequence.
+ (fixup_var_refs_1): Likewise and expect insn list from gen_foo.
+ (fixup_memory_subreg): Use get_insns instead of gen_sequence.
+ (fixup_stack_1, purge_addressof_1, expand_main_function,
+ get_arg_pointer_save_area): Likewise.
+ (optimize_bit_field, instantiate_virtual_regs_1, assign_parms,
+ expand_function_end): Use emit_insn_foo.
+ (record_insns, keep_stack_depressed): Work with insn list instead
+ of SEQUENCE, fix comments.
+ * ifcvt.c (noce_emit_store_flag, noce_try_store_flag,
+ noce_try_store_flag_constants, noce_try_store_flag_inc,
+ noce_try_store_flag_mask, noce_emit_cmove, noce_try_cmove_arith,
+ noce_try_minmax, noce_try_abs): Use emit_insn_foo.
+ (noce_process_if_block): Use get_insns instead of gen_sequence.
+ * optabs.c (add_equal_note): Work with insn list, fix comments.
+ (expand_binop): Expect insn list from GEN_FCN(), use emit_insn_foo.
+ (expand_unop, expand_complex_abs, expand_unop_insn,
+ expand_no_conflict_block): Likewise.
+ (gen_move_insn): Use get_insns instead of gen_sequence.
+ (gen_cond_trap): Likewise.
+ * integrate.c (copy_rtx_and_substitute): Likewise.
+ (emit_initial_value_sets): Use emit_insn_foo.
+ * reload1.c (emit_output_reload_insns, emit_reload_insns): Likewise.
+ (fixup_abnormal_edges): Avoid losing REG_NOTES more intelligently
+ now that RTL generators give insn lists.
+ * sibcall.c (replace_call_placeholder): Use emit_insn_foo.
+ * doloop.c (doloop_modify, doloop_modify_runtime): Use get_insns
+ instead of gen_sequence.
+ (doloop_optimize): Work with insn lists instead of SEQUENCE rtl.
+ * explow.c (emit_stack_save, emit_stack_restore): Use get_insns
+ instead of gen_sequence.
+ * loop.c (move_movables, emit_prefetch_instructions,
+ gen_add_mult, check_dbra_loop, gen_load_of_final_value):
+ Likewise.
+ (loop_regs_update): Work with insn list instead of SEQUENCE rtl.
+ (product_cheap_p): Likewise, and add commentary about RTL wastage
+ here.
+ * lcm.c (optimize_mode_switching): Use get_insns instead of
+ gen_sequence.
+ * profile.c (gen_edge_profiler): Likewise.
+ * regmove.c (copy_src_to_dest): Likewise.
+ * reg-stack.c (compensate_edge): Likewise and fix comment.
+ * gcse.c (process_insert_insn): Likewise.
+ (insert_insn_end_bb): Work with insn list instead of SEQUENCE rtl.
+ * jump.c (delete_prior_computation): Update comment.
+ * genemit.c (gen_expand, gen_split, main): Use get_insns instead
+ of gen_sequence, update comments to match.
+ * recog.c (peephole2_optimize): Work with insn lists instead of
+ SEQUENCE rtl.
+ * sched-vis.c (print_pattern): Abort on SEQUENCE.
+ * unroll.c (unroll_loop, find_splittable_givs, final_giv_value):
+ Use get_insns instead of gen_sequence.
+ (copy_loop_body): Likewise and don't emit dummy NOTE.
+ * genrecog.c: Don't mention SEQUENCE rtl in comments.
+ * combine.c (try_combine): Expect insn lists from split generator.
+ * reorg.c (relax_delay_slots): Emit SEQUENCE into insn list by
+ hand.
+
2002-06-11 Roger Sayle <roger@eyesopen.com>
Andreas Jaeger <aj@suse.de>
do_pending_stack_adjust ();
insns = get_insns ();
end_sequence ();
- emit_insns_after (insns, RTL_EXPR_RTL (get_gnu_tree (gnat_node)));
+ emit_insn_after (insns, RTL_EXPR_RTL (get_gnu_tree (gnat_node)));
}
}
apply_args_value = temp;
- /* Put the sequence after the NOTE that starts the function.
- If this is inside a SEQUENCE, make the outer-level insn
+ /* Put the insns after the NOTE that starts the function.
+ If this is inside a start_sequence, make the outer-level insn
chain current, so the code is placed at the start of the
function. */
push_topmost_sequence ();
- emit_insns_before (seq, NEXT_INSN (get_insns ()));
+ emit_insn_before (seq, NEXT_INSN (get_insns ()));
pop_topmost_sequence ();
return temp;
}
}
/* Put the USE insns before the return. */
- emit_insns (call_fusage);
+ emit_insn (call_fusage);
/* Return whatever values was restored by jumping directly to the end
of the function. */
/* Output the entire sequence. */
insns = get_insns ();
end_sequence ();
- emit_insns (insns);
+ emit_insn (insns);
return target;
}
expand_expr (src, src_reg, ptr_mode, EXPAND_SUM));
if (pat != src_reg)
emit_move_insn (src_reg, pat);
- pat = gen_sequence ();
+ pat = get_insns ();
end_sequence ();
if (before_strlen)
saveregs_value = val;
- /* Put the sequence after the NOTE that starts the function. If this
- is inside a SEQUENCE, make the outer-level insn chain current, so
+ /* Put the insns after the NOTE that starts the function. If this
+ is inside a start_sequence, make the outer-level insn chain current, so
the code is placed at the start of the function. */
push_topmost_sequence ();
- emit_insns_after (seq, get_insns ());
+ emit_insn_after (seq, get_insns ());
pop_topmost_sequence ();
return val;
/* Like expand_builtin_expect, except do this in a jump context. This is
called from do_jump if the conditional is a __builtin_expect. Return either
- a SEQUENCE of insns to emit the jump or NULL if we cannot optimize
+ a list of insns to emit the jump or NULL if we cannot optimize
__builtin_expect. We need to optimize this at jump time so that machines
like the PowerPC don't turn the test into a SCC operation, and then jump
based on the test being 0/1. */
if (TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
&& (integer_zerop (arg1) || integer_onep (arg1)))
{
- int j;
int num_jumps = 0;
+ rtx insn;
/* If we fail to locate an appropriate conditional jump, we'll
fall back to normal evaluation. Ensure that the expression
/* Expand the jump insns. */
start_sequence ();
do_jump (arg0, if_false_label, if_true_label);
- ret = gen_sequence ();
+ ret = get_insns ();
end_sequence ();
/* Now that the __builtin_expect has been validated, go through and add
the expect's to each of the conditional jumps. If we run into an
error, just give up and generate the 'safe' code of doing a SCC
operation and then doing a branch on that. */
- for (j = 0; j < XVECLEN (ret, 0); j++)
+ insn = ret;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (ret, 0, j);
+ rtx next = NEXT_INSN (insn);
rtx pattern;
if (GET_CODE (insn) == JUMP_INSN && any_condjump_p (insn)
int taken;
if (GET_CODE (ifelse) != IF_THEN_ELSE)
- continue;
+ goto do_next_insn;
if (GET_CODE (XEXP (ifelse, 1)) == LABEL_REF)
{
label = NULL_RTX;
}
else
- continue;
+ goto do_next_insn;
/* If the test is expected to fail, reverse the
probabilities. */
else if (label == if_false_label)
taken = 1 - taken;
else if (label != if_true_label)
- continue;
+ goto do_next_insn;
num_jumps++;
predict_insn_def (insn, PRED_BUILTIN_EXPECT, taken);
}
+
+ do_next_insn:
+ insn = next;
}
/* If no jumps were modified, fail and do __builtin_expect the normal
NULL_RTX, BITS_PER_UNIT);
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, first_insn);
+ emit_insn_before (seq, first_insn);
emit_stack_restore (SAVE_BLOCK, old_stack_level, NULL_RTX);
}
}
{
insns = get_insns ();
end_sequence ();
- emit_insns (insns);
+ emit_insn (insns);
}
else
{
/* Write out the sequence. */
insns = get_insns ();
end_sequence ();
- emit_insns (insns);
+ emit_insn (insns);
valreg = temp;
}
tail_recursion_label));
}
else
- emit_insns (normal_call_insns);
+ emit_insn (normal_call_insns);
currently_expanding_call--;
{
insns = get_insns ();
end_sequence ();
- emit_insns (insns);
+ emit_insn (insns);
}
else
{
if (before)
{
- emit_insns_before (insns, before);
+ emit_insn_before (insns, before);
last = prev_nonnote_insn (before);
}
else
- last = emit_insns_after (insns, after);
+ last = emit_insn_after (insns, after);
if (returnjump_p (last))
{
}
}
- /* If we've split a jump pattern, we'll wind up with a sequence even
- with one instruction. We can handle that below, so extract it. */
- if (m_split && GET_CODE (m_split) == SEQUENCE
- && XVECLEN (m_split, 0) == 1)
- m_split = PATTERN (XVECEXP (m_split, 0, 0));
-
- if (m_split && GET_CODE (m_split) != SEQUENCE)
+ if (m_split && NEXT_INSN (m_split) == NULL_RTX)
{
+ m_split = PATTERN (m_split);
insn_code_number = recog_for_combine (&m_split, i3, &new_i3_notes);
if (insn_code_number >= 0)
newpat = m_split;
}
- else if (m_split && GET_CODE (m_split) == SEQUENCE
- && XVECLEN (m_split, 0) == 2
+ else if (m_split && NEXT_INSN (NEXT_INSN (m_split)) == NULL_RTX
&& (next_real_insn (i2) == i3
- || ! use_crosses_set_p (PATTERN (XVECEXP (m_split, 0, 0)),
- INSN_CUID (i2))))
+ || ! use_crosses_set_p (PATTERN (m_split), INSN_CUID (i2))))
{
rtx i2set, i3set;
- rtx newi3pat = PATTERN (XVECEXP (m_split, 0, 1));
- newi2pat = PATTERN (XVECEXP (m_split, 0, 0));
+ rtx newi3pat = PATTERN (NEXT_INSN (m_split));
+ newi2pat = PATTERN (m_split);
- i3set = single_set (XVECEXP (m_split, 0, 1));
- i2set = single_set (XVECEXP (m_split, 0, 0));
+ i3set = single_set (NEXT_INSN (m_split));
+ i2set = single_set (m_split);
/* In case we changed the mode of I2DEST, replace it in the
pseudo-register table here. We can't do it above in case this
we can make put both sources together and make a split point
in the middle. */
- if (seq && XVECLEN (seq, 0) == 2
- && GET_CODE (XVECEXP (seq, 0, 0)) == INSN
- && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) == SET
- && SET_DEST (PATTERN (XVECEXP (seq, 0, 0))) == reg
+ if (seq
+ && NEXT_INSN (seq) != NULL_RTX
+ && NEXT_INSN (NEXT_INSN (seq)) == NULL_RTX
+ && GET_CODE (seq) == INSN
+ && GET_CODE (PATTERN (seq)) == SET
+ && SET_DEST (PATTERN (seq)) == reg
&& ! reg_mentioned_p (reg,
- SET_SRC (PATTERN (XVECEXP (seq, 0, 0))))
- && GET_CODE (XVECEXP (seq, 0, 1)) == INSN
- && GET_CODE (PATTERN (XVECEXP (seq, 0, 1))) == SET
- && SET_DEST (PATTERN (XVECEXP (seq, 0, 1))) == reg
+ SET_SRC (PATTERN (seq)))
+ && GET_CODE (NEXT_INSN (seq)) == INSN
+ && GET_CODE (PATTERN (NEXT_INSN (seq))) == SET
+ && SET_DEST (PATTERN (NEXT_INSN (seq))) == reg
&& memory_address_p (GET_MODE (x),
- SET_SRC (PATTERN (XVECEXP (seq, 0, 1)))))
+ SET_SRC (PATTERN (NEXT_INSN (seq)))))
{
- rtx src1 = SET_SRC (PATTERN (XVECEXP (seq, 0, 0)));
- rtx src2 = SET_SRC (PATTERN (XVECEXP (seq, 0, 1)));
+ rtx src1 = SET_SRC (PATTERN (seq));
+ rtx src2 = SET_SRC (PATTERN (NEXT_INSN (seq)));
/* Replace the placeholder in SRC2 with SRC1. If we can
find where in SRC2 it was placed, that can become our
switch (GET_CODE (x))
{
case SEQUENCE:
+ abort ();
+
case PARALLEL:
for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
}
}
-/* Given INSN, which is either an INSN or a SEQUENCE generated to
- perform a memory operation, look for any MEMs in either a SET_DEST or
- a SET_SRC and copy the in-struct, unchanging, and volatile flags from
- REF into each of the MEMs found. If REF is not a MEM, don't do
- anything. */
+/* Given INSN, which is an INSN list or the PATTERN of a single insn
+ generated to perform a memory operation, look for any MEMs in either
+ a SET_DEST or a SET_SRC and copy the in-struct, unchanging, and
+ volatile flags from REF into each of the MEMs found. If REF is not
+ a MEM, don't do anything. */
void
alpha_set_memflags (insn, ref)
static rtx
set_frame_related_p ()
{
- rtx seq = gen_sequence ();
+ rtx seq = get_insns ();
+ rtx insn;
+
end_sequence ();
- if (GET_CODE (seq) == SEQUENCE)
+ if (!seq)
+ return NULL_RTX;
+
+ if (INSN_P (seq))
{
- int i = XVECLEN (seq, 0);
- while (--i >= 0)
- RTX_FRAME_RELATED_P (XVECEXP (seq, 0, i)) = 1;
- return emit_insn (seq);
+ insn = seq;
+ while (insn != NULL_RTX)
+ {
+ RTX_FRAME_RELATED_P (insn) = 1;
+ insn = NEXT_INSN (insn);
+ }
+ seq = emit_insn (seq);
}
else
{
seq = emit_insn (seq);
RTX_FRAME_RELATED_P (seq) = 1;
- return seq;
}
+ return seq;
}
#define FRP(exp) (start_sequence (), exp, set_frame_related_p ())
"TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF
&& prev_nonnote_insn (insn) == operands[0]"
[(const_int 0)]
- "DONE;")
+ "
+{
+ emit_note (NULL, NOTE_INSN_DELETED);
+ DONE;
+}")
(define_insn "*builtin_setjmp_receiver_1"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]
emit_insn (gen_pic_add_dot_plus_four (pic_offset_table_rtx, l1));
}
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
if (prologue)
emit_insn_after (seq, get_insns ());
if (write_back)
emit_move_insn (from, plus_constant (from, count * 4 * sign));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
return seq;
if (write_back)
emit_move_insn (to, plus_constant (to, count * 4 * sign));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
return seq;
else
abort ();
- val = gen_sequence ();
+ val = get_insns ();
end_sequence ();
return val;
}
/* This should have been prevented by the constraints on movdi_insn. */
abort ();
- val = gen_sequence ();
+ val = get_insns ();
end_sequence ();
return val;
start_sequence ();
compare_op = ix86_expand_compare (code, &second_test, &bypass_test);
- compare_seq = gen_sequence ();
+ compare_seq = get_insns ();
end_sequence ();
compare_code = GET_CODE (compare_op);
end_sequence ();
ix86_set_move_mem_attrs (insns, dst, src, destreg, srcreg);
- emit_insns (insns);
+ emit_insn (insns);
return 1;
}
spill_fill_data.init_reg[iter],
disp_rtx));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
}
[(const_int 0)]
{
rtx tmp;
+ int emitted_something;
+
+ emitted_something = 0;
if (! rtx_equal_p (operands[0], operands[2]))
{
tmp = gen_rtx_SET (VOIDmode, operands[0], operands[2]);
tmp = gen_rtx_COND_EXEC (VOIDmode, operands[4], tmp);
emit_insn (tmp);
+ emitted_something = 1;
}
if (! rtx_equal_p (operands[0], operands[3]))
{
gen_rtx_SET (VOIDmode, operands[0],
operands[3]));
emit_insn (tmp);
+ emitted_something = 1;
}
+ if (! emitted_something)
+ emit_note (NULL, NOTE_INSN_DELETED);
DONE;
})
else
abort ();
- val = gen_sequence ();
+ val = get_insns ();
end_sequence ();
return val;
}
start_sequence ();
emit_insn (gen_get_fnaddr (cfun->machine->embedded_pic_fnaddr_rtx,
XEXP (DECL_RTL (current_function_decl), 0)));
- seq = gen_sequence ();
+ seq = get_insn ();
end_sequence ();
push_topmost_sequence ();
emit_insn_after (seq, get_insns ());
GEN_INT (gp_offset
- base_offset))),
reg_rtx);
- reg_18_save = gen_sequence ();
+ reg_18_save = get_insns ();
end_sequence ();
}
start_sequence ();
emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx,
const_gp);
- insn = gen_sequence ();
+ insn = get_insns ();
end_sequence ();
push_topmost_sequence ();
start_sequence ();
sh_expand_epilogue ();
- epilogue = gen_sequence ();
+ epilogue = get_insns ();
end_sequence ();
- sh_need_epilogue_known
- = (GET_CODE (epilogue) == SEQUENCE && XVECLEN (epilogue, 0) == 0
- ? -1 : 1);
+ sh_need_epilogue_known = (epilogue == NULL ? -1 : 1);
}
return sh_need_epilogue_known > 0;
}
(define_attr "pic" "false,true"
(symbol_ref "flag_pic != 0"))
+(define_attr "current_function_calls_alloca" "false,true"
+ (symbol_ref "current_function_calls_alloca != 0"))
+
+(define_attr "flat" "false,true"
+ (symbol_ref "TARGET_FLAT != 0"))
+
;; Length (in # of insns).
(define_attr "length" ""
(cond [(eq_attr "type" "uncond_branch,call,sibcall")
""
"*
{
- if (! current_function_calls_alloca || ! TARGET_V9 || TARGET_FLAT)
- return \"#\";
+ if (! current_function_calls_alloca)
+ return \"\";
+ if (! TARGET_V9 || TARGET_FLAT)
+ return \"\tta\t3\n\";
fputs (\"\tflushw\n\", asm_out_file);
if (flag_pic)
fprintf (asm_out_file, \"\tst%c\t%%l7, [%%sp+%d]\n\",
return \"\";
}"
[(set_attr "type" "multi")
- (set (attr "length") (if_then_else (eq_attr "pic" "true")
- (const_int 4)
- (const_int 3)))])
-
-(define_split
- [(unspec_volatile [(const_int 0)] UNSPECV_SETJMP)]
- "! current_function_calls_alloca || ! TARGET_V9 || TARGET_FLAT"
- [(const_int 0)]
- "
-{
- if (current_function_calls_alloca)
- emit_insn (gen_flush_register_windows ());
- DONE;
-}")
+ (set (attr "length")
+ (cond [(eq_attr "current_function_calls_alloca" "false")
+ (const_int 0)
+ (eq_attr "flat" "true")
+ (const_int 1)
+ (eq_attr "isa" "!v9")
+ (const_int 1)
+ (eq_attr "pic" "true")
+ (const_int 4)] (const_int 3)))])
;; Pattern for use after a setjmp to store FP and the return register
;; into the stack area.
{
rtx op0 = XEXP (comparison, 0);
rtx op1 = XEXP (comparison, 1);
- rtx seq;
+ rtx seq, last_insn;
rtx compare;
start_sequence ();
xstormy16_expand_arith (mode, COMPARE, dest, op0, op1, carry);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
- compare = SET_SRC (XVECEXP (PATTERN (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1)),
- 0, 0));
+
+ if (! INSN_P (seq))
+ abort ();
+
+ last_insn = seq;
+ while (NEXT_INSN (last_insn) != NULL_RTX)
+ last_insn = NEXT_INSN (last_insn);
+
+ compare = SET_SRC (XVECEXP (PATTERN (last_insn), 0, 0));
PUT_CODE (XEXP (compare, 0), GET_CODE (comparison));
XEXP (compare, 1) = gen_rtx_LABEL_REF (VOIDmode, label);
emit_insn (seq);
/* Insert initialization of the count register into the loop header. */
convert_move (counter_reg, count, 1);
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
emit_insn_before (sequence, loop->start);
{
start_sequence ();
emit_insn (init);
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
emit_insn_after (sequence, loop->start);
}
}
}
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
emit_insn_before (sequence, loop->start);
return 0;
}
- /* A raw define_insn may yield a plain pattern. If a sequence
- was involved, the last must be the jump instruction. */
- if (GET_CODE (doloop_seq) == SEQUENCE)
+ /* If multiple instructions were created, the last must be the
+ jump instruction. Also, a raw define_insn may yield a plain
+ pattern. */
+ doloop_pat = doloop_seq;
+ if (INSN_P (doloop_pat) && NEXT_INSN (doloop_pat) != NULL_RTX)
{
- doloop_pat = XVECEXP (doloop_seq, 0, XVECLEN (doloop_seq, 0) - 1);
- if (GET_CODE (doloop_pat) == JUMP_INSN)
- doloop_pat = PATTERN (doloop_pat);
- else
+ while (NEXT_INSN (doloop_pat) != NULL_RTX)
+ doloop_pat = NEXT_INSN (doloop_pat);
+ if (GET_CODE (doloop_pat) != JUMP_INSN)
doloop_pat = NULL_RTX;
}
- else
- doloop_pat = doloop_seq;
if (! doloop_pat
|| ! (condition = doloop_condition_get (doloop_pat)))
if (seq)
{
- /* SEQ can either be a SEQUENCE or the pattern of a single insn.
- The latter case will normally arise only when being done so that
- it, in turn, will be split (SFmode on the 29k is an example). */
- if (GET_CODE (seq) == SEQUENCE)
+ /* SEQ can only be a list of insns. */
+ if (! INSN_P (seq))
+ abort ();
+
+ /* Sometimes there will be only one insn in that list, this case will
+ normally arise only when we want it in turn to be split (SFmode on
+ the 29k is an example). */
+ if (NEXT_INSN (seq) != NULL_RTX)
{
- int i, njumps = 0;
+ rtx insn_last, insn;
+ int njumps = 0;
/* Avoid infinite loop if any insn of the result matches
the original pattern. */
- for (i = 0; i < XVECLEN (seq, 0); i++)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
- && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
- return trial;
+ insn_last = seq;
+ while (1)
+ {
+ if (rtx_equal_p (PATTERN (insn_last), pat))
+ return trial;
+ if (NEXT_INSN (insn_last) == NULL_RTX)
+ break;
+ insn_last = NEXT_INSN (insn_last);
+ }
/* Mark labels. */
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
- {
- rtx insn = XVECEXP (seq, 0, i);
- mark_jump_label (PATTERN (insn),
- XVECEXP (seq, 0, i), 0);
- njumps++;
- if (probability != -1
- && any_condjump_p (insn)
- && !find_reg_note (insn, REG_BR_PROB, 0))
- {
- /* We can preserve the REG_BR_PROB notes only if exactly
- one jump is created, otherwise the machine description
- is responsible for this step using
- split_branch_probability variable. */
- if (njumps != 1)
- abort ();
- REG_NOTES (insn)
- = gen_rtx_EXPR_LIST (REG_BR_PROB,
- GEN_INT (probability),
- REG_NOTES (insn));
- }
- }
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == JUMP_INSN)
+ {
+ mark_jump_label (PATTERN (insn), insn, 0);
+ njumps++;
+ if (probability != -1
+ && any_condjump_p (insn)
+ && !find_reg_note (insn, REG_BR_PROB, 0))
+ {
+ /* We can preserve the REG_BR_PROB notes only if exactly
+ one jump is created, otherwise the machine description
+ is responsible for this step using
+ split_branch_probability variable. */
+ if (njumps != 1)
+ abort ();
+ REG_NOTES (insn)
+ = gen_rtx_EXPR_LIST (REG_BR_PROB,
+ GEN_INT (probability),
+ REG_NOTES (insn));
+ }
+ }
+
+ insn = PREV_INSN (insn);
+ }
/* If we are splitting a CALL_INSN, look for the CALL_INSN
in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
if (GET_CODE (trial) == CALL_INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
- CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
- = CALL_INSN_FUNCTION_USAGE (trial);
+ {
+ insn = insn_last;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == CALL_INSN)
+ CALL_INSN_FUNCTION_USAGE (insn)
+ = CALL_INSN_FUNCTION_USAGE (trial);
+
+ insn = PREV_INSN (insn);
+ }
+ }
/* Copy notes, particularly those related to the CFG. */
for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
switch (REG_NOTE_KIND (note))
{
case REG_EH_REGION:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == CALL_INSN
|| (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn))))
= gen_rtx_EXPR_LIST (REG_EH_REGION,
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
case REG_NORETURN:
case REG_SETJMP:
case REG_ALWAYS_RETURN:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == CALL_INSN)
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
case REG_NON_LOCAL_GOTO:
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
+ insn = insn_last;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
if (GET_CODE (insn) == JUMP_INSN)
REG_NOTES (insn)
= gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
XEXP (note, 0),
REG_NOTES (insn));
+ insn = PREV_INSN (insn);
}
break;
/* If there are LABELS inside the split insns increment the
usage count so we don't delete the label. */
if (GET_CODE (trial) == INSN)
- for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
- if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
- mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
+ {
+ insn = last_insn;
+ while (insn != NULL_RTX)
+ {
+ if (GET_CODE (insn) == INSN)
+ mark_label_nuses (PATTERN (insn));
+
+ insn = PREV_INSN (insn);
+ }
+ }
tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
tem = try_split (PATTERN (tem), tem, 1);
}
/* Avoid infinite loop if the result matches the original pattern. */
- else if (rtx_equal_p (seq, pat))
+ else if (rtx_equal_p (PATTERN (seq), pat))
return trial;
else
{
- PATTERN (trial) = seq;
+ PATTERN (trial) = PATTERN (seq);
INSN_CODE (trial) = -1;
- try_split (seq, trial, last);
+ try_split (PATTERN (trial), trial, last);
}
/* Return either the first or the last insn, depending on which was
return insn;
}
-/* Like `make_insn' but make a JUMP_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
static rtx
make_jump_insn_raw (pattern)
return insn;
}
-/* Like `make_insn' but make a CALL_INSN instead of an insn. */
+/* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
static rtx
make_call_insn_raw (pattern)
}
\f
-/* Emit an insn of given code and pattern
- at a specified place within the doubly-linked list. */
+/* Emit insn(s) of given code and pattern
+ at a specified place within the doubly-linked list.
-/* Make an instruction with body PATTERN
- and output it before the instruction BEFORE. */
+ All of the emit_foo global entry points accept an object
+ X which is either an insn list or a PATTERN of a single
+ instruction.
-rtx
-emit_insn_before (pattern, before)
- rtx pattern, before;
-{
- rtx insn = before;
+ There are thus a few canonical ways to generate code and
+ emit it at a specific place in the instruction stream. For
+ example, consider the instruction named SPOT and the fact that
+ we would like to emit some instructions before SPOT. We might
+ do it like this:
- if (GET_CODE (pattern) == SEQUENCE)
- {
- int i;
+ start_sequence ();
+ ... emit the new instructions ...
+ insns_head = get_insns ();
+ end_sequence ();
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn_before (insn, before);
- }
- }
- else
- {
- insn = make_insn_raw (pattern);
- add_insn_before (insn, before);
- }
+ emit_insn_before (insns_head, SPOT);
- return insn;
-}
+ It used to be common to generate SEQUENCE rtl instead, but that
+ is a relic of the past which no longer occurs. The reason is that
+ SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
+ generated would almost certainly die right after it was created. */
-/* Make an instruction with body PATTERN and code JUMP_INSN
- and output it before the instruction BEFORE. */
+/* Make X be output before the instruction BEFORE. */
rtx
-emit_jump_insn_before (pattern, before)
- rtx pattern, before;
+emit_insn_before (x, before)
+ rtx x, before;
{
+ rtx last = before;
rtx insn;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ if (x == NULL_RTX)
+ return last;
+
+ switch (GET_CODE (x))
{
- insn = make_jump_insn_raw (pattern);
- add_insn_before (insn, before);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
-/* Make an instruction with body PATTERN and code CALL_INSN
+/* Make an instruction with body X and code JUMP_INSN
and output it before the instruction BEFORE. */
rtx
-emit_call_insn_before (pattern, before)
- rtx pattern, before;
+emit_jump_insn_before (x, before)
+ rtx x, before;
{
- rtx insn;
+ rtx insn, last;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_before (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_call_insn_raw (pattern);
- add_insn_before (insn, before);
- PUT_CODE (insn, CALL_INSN);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
-/* Make an instruction with body PATTERN and code CALL_INSN
+/* Make an instruction with body X and code CALL_INSN
and output it before the instruction BEFORE. */
rtx
-emit_call_insn_after (pattern, before)
- rtx pattern, before;
+emit_call_insn_before (x, before)
+ rtx x, before;
{
- rtx insn;
+ rtx last, insn;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_after (pattern, before);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (before == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_call_insn_raw (pattern);
- add_insn_after (insn, before);
- PUT_CODE (insn, CALL_INSN);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn_before (insn, before);
+ last = insn;
+ insn = next;
+ }
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_before (last, before);
+ break;
}
- return insn;
+ return last;
}
/* Make an insn of code BARRIER
return note;
}
\f
-/* Make an insn of code INSN with body PATTERN
- and output it after the insn AFTER. */
+/* Helper for emit_insn_after, handles lists of instructions
+ efficiently. */
-rtx
-emit_insn_after (pattern, after)
- rtx pattern, after;
+static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
+
+static rtx
+emit_insn_after_1 (first, after)
+ rtx first, after;
{
- rtx insn = after;
+ rtx last;
+ rtx after_after;
+ basic_block bb;
- if (GET_CODE (pattern) == SEQUENCE)
+ if (GET_CODE (after) != BARRIER
+ && (bb = BLOCK_FOR_INSN (after)))
{
- int i;
-
- for (i = 0; i < XVECLEN (pattern, 0); i++)
- {
- insn = XVECEXP (pattern, 0, i);
- add_insn_after (insn, after);
- after = insn;
- }
+ bb->flags |= BB_DIRTY;
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (GET_CODE (last) != BARRIER)
+ set_block_for_insn (last, bb);
+ if (bb->end == after)
+ bb->end = last;
}
else
+ for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
+ continue;
+
+ after_after = NEXT_INSN (after);
+
+ NEXT_INSN (after) = first;
+ PREV_INSN (first) = after;
+ NEXT_INSN (last) = after_after;
+ if (after_after)
+ PREV_INSN (after_after) = last;
+
+ if (after == last_insn)
+ last_insn = last;
+ return last;
+}
+
+/* Make X be output after the insn AFTER. */
+
+rtx
+emit_insn_after (x, after)
+ rtx x, after;
+{
+ rtx last = after;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ if (x == NULL_RTX)
+ return last;
+
+ switch (GET_CODE (x))
{
- insn = make_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
}
/* Similar to emit_insn_after, except that line notes are to be inserted so
as to act as if this insn were at FROM. */
void
-emit_insn_after_with_line_notes (pattern, after, from)
- rtx pattern, after, from;
+emit_insn_after_with_line_notes (x, after, from)
+ rtx x, after, from;
{
rtx from_line = find_line_note (from);
rtx after_line = find_line_note (after);
- rtx insn = emit_insn_after (pattern, after);
+ rtx insn = emit_insn_after (x, after);
if (from_line)
emit_line_note_after (NOTE_SOURCE_FILE (from_line),
insn);
}
-/* Make an insn of code JUMP_INSN with body PATTERN
+/* Make an insn of code JUMP_INSN with body X
and output it after the insn AFTER. */
rtx
-emit_jump_insn_after (pattern, after)
- rtx pattern, after;
+emit_jump_insn_after (x, after)
+ rtx x, after;
{
- rtx insn;
+ rtx last;
- if (GET_CODE (pattern) == SEQUENCE)
- insn = emit_insn_after (pattern, after);
- else
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
{
- insn = make_jump_insn_raw (pattern);
- add_insn_after (insn, after);
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn_after (last, after);
+ break;
}
- return insn;
+ return last;
+}
+
+/* Make an instruction with body X and code CALL_INSN
+ and output it after the instruction AFTER. */
+
+rtx
+emit_call_insn_after (x, after)
+ rtx x, after;
+{
+ rtx last;
+
+#ifdef ENABLE_RTL_CHECKING
+ if (after == NULL_RTX)
+ abort ();
+#endif
+
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ last = emit_insn_after_1 (x, after);
+ break;
+
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ last = make_call_insn_raw (x);
+ add_insn_after (last, after);
+ break;
+ }
+
+ return last;
}
/* Make an insn of code BARRIER
tree scope;
{
rtx last = emit_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
- return last;
-}
-/* Like emit_insns_after, but set INSN_SCOPE according to SCOPE. */
-rtx
-emit_insns_after_scope (pattern, after, scope)
- rtx pattern, after;
- tree scope;
-{
- rtx last = emit_insns_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
tree scope;
{
rtx last = emit_jump_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
tree scope;
{
rtx last = emit_call_insn_after (pattern, after);
- for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
- INSN_SCOPE (after) = scope;
+
+ after = NEXT_INSN (after);
+ while (1)
+ {
+ INSN_SCOPE (after) = scope;
+ if (after == last)
+ break;
+ after = NEXT_INSN (after);
+ }
return last;
}
rtx first = PREV_INSN (before);
rtx last = emit_insn_before (pattern, before);
- for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
- INSN_SCOPE (first) = scope;
- return last;
-}
-
-/* Like emit_insns_before, but set INSN_SCOPE according to SCOPE. */
-rtx
-emit_insns_before_scope (pattern, before, scope)
- rtx pattern, before;
- tree scope;
-{
- rtx first = PREV_INSN (before);
- rtx last = emit_insns_before (pattern, before);
-
- for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
- INSN_SCOPE (first) = scope;
+ first = NEXT_INSN (first);
+ while (1)
+ {
+ INSN_SCOPE (first) = scope;
+ if (first == last)
+ break;
+ first = NEXT_INSN (first);
+ }
return last;
}
\f
-/* Make an insn of code INSN with pattern PATTERN
- and add it to the end of the doubly-linked list.
- If PATTERN is a SEQUENCE, take the elements of it
- and emit an insn for each element.
+/* Take X and emit it at the end of the doubly-linked
+ INSN list.
Returns the last insn emitted. */
rtx
-emit_insn (pattern)
- rtx pattern;
+emit_insn (x)
+ rtx x;
{
- rtx insn = last_insn;
+ rtx last = last_insn;
+ rtx insn;
- if (GET_CODE (pattern) == SEQUENCE)
- {
- int i;
+ if (x == NULL_RTX)
+ return last;
- for (i = 0; i < XVECLEN (pattern, 0); i++)
+ switch (GET_CODE (x))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
{
- insn = XVECEXP (pattern, 0, i);
+ rtx next = NEXT_INSN (insn);
add_insn (insn);
+ last = insn;
+ insn = next;
}
- }
- else
- {
- insn = make_insn_raw (pattern);
- add_insn (insn);
- }
-
- return insn;
-}
-
-/* Emit the insns in a chain starting with INSN.
- Return the last insn emitted. */
+ break;
-rtx
-emit_insns (insn)
- rtx insn;
-{
- rtx last = 0;
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- while (insn)
- {
- rtx next = NEXT_INSN (insn);
- add_insn (insn);
- last = insn;
- insn = next;
+ default:
+ last = make_insn_raw (x);
+ add_insn (last);
+ break;
}
return last;
}
-/* Emit the insns in a chain starting with INSN and place them in front of
- the insn BEFORE. Return the last insn emitted. */
+/* Make an insn of code JUMP_INSN with pattern X
+ and add it to the end of the doubly-linked list. */
rtx
-emit_insns_before (insn, before)
- rtx insn;
- rtx before;
+emit_jump_insn (x)
+ rtx x;
{
- rtx last = 0;
+ rtx last, insn;
- while (insn)
+ switch (GET_CODE (x))
{
- rtx next = NEXT_INSN (insn);
- add_insn_before (insn, before);
- last = insn;
- insn = next;
- }
-
- return last;
-}
-
-/* Emit the insns in a chain starting with FIRST and place them in back of
- the insn AFTER. Return the last insn emitted. */
-
-rtx
-emit_insns_after (first, after)
- rtx first;
- rtx after;
-{
- rtx last;
- rtx after_after;
- basic_block bb;
-
- if (!after)
- abort ();
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = x;
+ while (insn)
+ {
+ rtx next = NEXT_INSN (insn);
+ add_insn (insn);
+ last = insn;
+ insn = next;
+ }
+ break;
- if (!first)
- return after;
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
- if (GET_CODE (after) != BARRIER
- && (bb = BLOCK_FOR_INSN (after)))
- {
- bb->flags |= BB_DIRTY;
- for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
- if (GET_CODE (last) != BARRIER)
- set_block_for_insn (last, bb);
- if (GET_CODE (last) != BARRIER)
- set_block_for_insn (last, bb);
- if (bb->end == after)
- bb->end = last;
+ default:
+ last = make_jump_insn_raw (x);
+ add_insn (last);
+ break;
}
- else
- for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
- continue;
-
- after_after = NEXT_INSN (after);
-
- NEXT_INSN (after) = first;
- PREV_INSN (first) = after;
- NEXT_INSN (last) = after_after;
- if (after_after)
- PREV_INSN (after_after) = last;
- if (after == last_insn)
- last_insn = last;
return last;
}
-/* Make an insn of code JUMP_INSN with pattern PATTERN
+/* Make an insn of code CALL_INSN with pattern X
and add it to the end of the doubly-linked list. */
rtx
-emit_jump_insn (pattern)
- rtx pattern;
+emit_call_insn (x)
+ rtx x;
{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
+ rtx insn;
+
+ switch (GET_CODE (x))
{
- rtx insn = make_jump_insn_raw (pattern);
- add_insn (insn);
- return insn;
- }
-}
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ insn = emit_insn (x);
+ break;
-/* Make an insn of code CALL_INSN with pattern PATTERN
- and add it to the end of the doubly-linked list. */
+#ifdef ENABLE_RTL_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
-rtx
-emit_call_insn (pattern)
- rtx pattern;
-{
- if (GET_CODE (pattern) == SEQUENCE)
- return emit_insn (pattern);
- else
- {
- rtx insn = make_call_insn_raw (pattern);
+ default:
+ insn = make_call_insn_raw (x);
add_insn (insn);
- PUT_CODE (insn, CALL_INSN);
- return insn;
+ break;
}
+
+ return insn;
}
/* Add the label LABEL to the end of the doubly-linked list. */
/* After emitting to a sequence, restore previous saved state.
To get the contents of the sequence just made, you must call
- `gen_sequence' *before* calling here.
+ `get_insns' *before* calling here.
If the compiler might have deferred popping arguments while
generating this sequence, and this sequence will not be immediately
inserted into the instruction stream, use do_pending_stack_adjust
- before calling gen_sequence. That will ensure that the deferred
+ before calling get_insns. That will ensure that the deferred
pops are inserted into this sequence, and not into some random
location in the instruction stream. See INHIBIT_DEFER_POP for more
information about deferred popping of arguments. */
{
return seq_stack != 0;
}
-
-/* Generate a SEQUENCE rtx containing the insns already emitted
- to the current sequence.
-
- This is how the gen_... function from a DEFINE_EXPAND
- constructs the SEQUENCE that it returns. */
-
-rtx
-gen_sequence ()
-{
- rtx result;
- rtx tem;
- int i;
- int len;
-
- /* Count the insns in the chain. */
- len = 0;
- for (tem = first_insn; tem; tem = NEXT_INSN (tem))
- len++;
-
- /* If only one insn, return it rather than a SEQUENCE.
- (Now that we cache SEQUENCE expressions, it isn't worth special-casing
- the case of an empty list.)
- We only return the pattern of an insn if its code is INSN and it
- has no notes. This ensures that no information gets lost. */
- if (len == 1
- && GET_CODE (first_insn) == INSN
- && ! RTX_FRAME_RELATED_P (first_insn)
- /* Don't throw away any reg notes. */
- && REG_NOTES (first_insn) == 0)
- return PATTERN (first_insn);
-
- result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
-
- for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
- XVECEXP (result, 0, i) = tem;
-
- return result;
-}
\f
/* Put the various virtual registers into REGNO_REG_RTX. */
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, region->u.try.catch->label);
+ emit_insn_before (seq, region->u.try.catch->label);
break;
case ERT_ALLOWED_EXCEPTIONS:
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, region->label);
+ emit_insn_before (seq, region->label);
break;
case ERT_CLEANUP:
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, region->resume);
+ emit_insn_before (seq, region->resume);
delete_insn (region->resume);
}
}
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, region->post_landing_pad);
+ emit_insn_before (seq, region->post_landing_pad);
}
}
p = get_insns ();
end_sequence ();
- emit_insns_before (p, before);
+ emit_insn_before (p, before);
last_call_site = this_call_site;
}
}
if (GET_CODE (fn_begin) == NOTE
&& NOTE_LINE_NUMBER (fn_begin) == NOTE_INSN_FUNCTION_BEG)
break;
- emit_insns_after (seq, fn_begin);
+ emit_insn_after (seq, fn_begin);
}
/* Call back from expand_function_end to know where we should put
post-dominates all can_throw_internal instructions. This is
the last possible moment. */
- emit_insns_after (seq, cfun->eh->sjlj_exit_after);
+ emit_insn_after (seq, cfun->eh->sjlj_exit_after);
}
static void
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, (cfun->eh->region_array[first_reachable]
- ->post_landing_pad));
+ emit_insn_before (seq, (cfun->eh->region_array[first_reachable]
+ ->post_landing_pad));
}
static void
if (sa != 0)
sa = validize_mem (sa);
emit_insn (fcn (sa, stack_pointer_rtx));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_after (seq, after);
}
start_sequence ();
emit_insn (fcn (stack_pointer_rtx, sa));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_after (seq, after);
}
{
rtx body = QUEUED_BODY (p);
- if (GET_CODE (body) == SEQUENCE)
- {
- QUEUED_INSN (p) = XVECEXP (QUEUED_BODY (p), 0, 0);
- emit_insn (QUEUED_BODY (p));
+ switch (GET_CODE (body))
+ {
+ case INSN:
+ case JUMP_INSN:
+ case CALL_INSN:
+ case CODE_LABEL:
+ case BARRIER:
+ case NOTE:
+ QUEUED_INSN (p) = body;
+ emit_insn (body);
+ break;
+
+#ifdef ENABLE_CHECKING
+ case SEQUENCE:
+ abort ();
+ break;
+#endif
+
+ default:
+ QUEUED_INSN (p) = emit_insn (body);
+ break;
}
- else
- QUEUED_INSN (p) = emit_insn (QUEUED_BODY (p));
+
pending_chain = QUEUED_NEXT (p);
}
}
last_insn = emit_move_insn (xpart, ypart);
}
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
/* Show the output dies here. This is necessary for SUBREGs
{
if (RTL_EXPR_SEQUENCE (exp) == const0_rtx)
abort ();
- emit_insns (RTL_EXPR_SEQUENCE (exp));
+ emit_insn (RTL_EXPR_SEQUENCE (exp));
RTL_EXPR_SEQUENCE (exp) = const0_rtx;
}
preserve_rtl_expr_result (RTL_EXPR_RTL (exp));
if (GET_CODE (target) != CONCAT)
emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
else
- emit_insns (insns);
+ emit_insn (insns);
return target;
}
if (GET_CODE (target) != CONCAT)
emit_no_conflict_block (insns, target, op0, NULL_RTX, NULL_RTX);
else
- emit_insns (insns);
+ emit_insn (insns);
return target;
}
/* We now know we'll be doing this change, so emit the
new insn(s) and do the updates. */
- emit_insns_before (insns, insn);
+ emit_insn_before (insns, insn);
if (pbi->bb->head == insn)
pbi->bb->head = insns;
start_sequence ();
convert_move (replacements->new,
replacements->old, unsignedp);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
}
else
start_sequence ();
new_insn = emit_insn (gen_rtx_SET (VOIDmode, y, sub));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
if (recog_memoized (new_insn) < 0)
sub = force_operand (sub, y);
if (sub != y)
emit_insn (gen_move_insn (y, sub));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
}
no other function that to do X. */
pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
- if (GET_CODE (pat) == SEQUENCE)
+ if (NEXT_INSN (pat) != NULL_RTX)
{
last = emit_insn_before (pat, insn);
delete_insn (last);
}
else
- PATTERN (insn) = pat;
+ PATTERN (insn) = PATTERN (pat);
return;
}
return;
pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
- if (GET_CODE (pat) == SEQUENCE)
+ if (NEXT_INSN (pat) != NULL_RTX)
{
last = emit_insn_before (pat, insn);
delete_insn (last);
}
else
- PATTERN (insn) = pat;
+ PATTERN (insn) = PATTERN (pat);
return;
}
rtx mem = SUBREG_REG (x);
rtx addr = XEXP (mem, 0);
enum machine_mode mode = GET_MODE (x);
- rtx result;
+ rtx result, seq;
/* Paradoxical SUBREGs are usually invalid during RTL generation. */
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (mem)) && ! uncritical)
start_sequence ();
result = adjust_address (mem, mode, offset);
- emit_insn_before (gen_sequence (), insn);
+ seq = get_insns ();
end_sequence ();
+
+ emit_insn_before (seq, insn);
return result;
}
start_sequence ();
temp = copy_to_reg (ad);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
return replace_equiv_address (x, temp);
memref = adjust_address (memref, mode, offset);
insns = get_insns ();
end_sequence ();
- emit_insns_before (insns, insn);
+ emit_insn_before (insns, insn);
/* Store this memory reference where
we found the bit field reference. */
special; just let the optimization be suppressed. */
if (apply_change_group () && seq)
- emit_insns_before (seq, insn);
+ emit_insn_before (seq, insn);
}
}
}
&& ! validate_replace_rtx (x, sub, insn))
abort ();
- insns = gen_sequence ();
+ insns = get_insns ();
end_sequence ();
emit_insn_before (insns, insn);
return true;
end_sequence ();
goto give_up;
}
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
might have created. */
unshare_all_rtl_again (get_insns ());
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
p = emit_insn_after (seq, insn);
if (NEXT_INSN (insn))
goto give_up;
}
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, object);
+ emit_insn_before (seq, object);
SET_DEST (x) = new;
if (! validate_change (object, &SET_SRC (x), temp, 0)
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, object);
+ emit_insn_before (seq, object);
if (! validate_change (object, loc, temp, 0)
&& ! validate_replace_rtx (x, temp, object))
abort ();
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, object);
+ emit_insn_before (seq, object);
if (! validate_change (object, loc, temp, 0)
&& ! validate_replace_rtx (x, temp, object))
abort ();
/* Output all parameter conversion instructions (possibly including calls)
now that all parameters have been copied out of hard registers. */
- emit_insns (conversion_insns);
+ emit_insn (conversion_insns);
last_parm_insn = get_last_insn ();
/* Enlist allocate_dynamic_stack_space to pick up the pieces. */
tmp = force_reg (Pmode, const0_rtx);
allocate_dynamic_stack_space (tmp, NULL_RTX, BIGGEST_ALIGNMENT);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
for (tmp = get_last_insn (); tmp; tmp = PREV_INSN (tmp))
end_sequence ();
/* Put those insns at entry to the containing function (this one). */
- emit_insns_before (seq, tail_recursion_reentry);
+ emit_insn_before (seq, tail_recursion_reentry);
}
/* If we are doing stack checking and this function makes calls,
GEN_INT (STACK_CHECK_MAX_FRAME_SIZE));
seq = get_insns ();
end_sequence ();
- emit_insns_before (seq, tail_recursion_reentry);
+ emit_insn_before (seq, tail_recursion_reentry);
break;
}
}
start_sequence ();
clobber_return_register ();
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
after = emit_insn_after (seq, clobber_after);
have to check it and fix it if necessary. */
start_sequence ();
emit_move_insn (validize_mem (ret), virtual_incoming_args_rtx);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
push_topmost_sequence ();
return ret;
}
\f
-/* Extend a vector that records the INSN_UIDs of INSNS (either a
- sequence or a single insn). */
+/* Extend a vector that records the INSN_UIDs of INSNS
+ (a list of one or more insns). */
static void
record_insns (insns, vecp)
rtx insns;
varray_type *vecp;
{
- if (GET_CODE (insns) == SEQUENCE)
- {
- int len = XVECLEN (insns, 0);
- int i = VARRAY_SIZE (*vecp);
+ int i, len;
+ rtx tmp;
- VARRAY_GROW (*vecp, i + len);
- while (--len >= 0)
- {
- VARRAY_INT (*vecp, i) = INSN_UID (XVECEXP (insns, 0, len));
- ++i;
- }
+ tmp = insns;
+ len = 0;
+ while (tmp != NULL_RTX)
+ {
+ len++;
+ tmp = NEXT_INSN (tmp);
}
- else
+
+ i = VARRAY_SIZE (*vecp);
+ VARRAY_GROW (*vecp, i + len);
+ tmp = insns;
+ while (tmp != NULL_RTX)
{
- int i = VARRAY_SIZE (*vecp);
- VARRAY_GROW (*vecp, i + 1);
- VARRAY_INT (*vecp, i) = INSN_UID (insns);
+ VARRAY_INT (*vecp, i) = INSN_UID (tmp);
+ i++;
+ tmp = NEXT_INSN (tmp);
}
}
-/* Determine how many INSN_UIDs in VEC are part of INSN. */
+/* Determine how many INSN_UIDs in VEC are part of INSN. Because we can
+ be running after reorg, SEQUENCE rtl is possible. */
static int
contains (insn, vec)
static void handle_epilogue_set PARAMS ((rtx, struct epi_info *));
static void emit_equiv_load PARAMS ((struct epi_info *));
-/* Modify SEQ, a SEQUENCE that is part of the epilogue, to no modifications
- to the stack pointer. Return the new sequence. */
+/* Modify INSN, a list of one or more insns that is part of the epilogue, to
+ no modifications to the stack pointer. Return the new list of insns. */
static rtx
-keep_stack_depressed (seq)
- rtx seq;
+keep_stack_depressed (insns)
+ rtx insns;
{
- int i, j;
+ int j;
struct epi_info info;
+ rtx insn, next;
/* If the epilogue is just a single instruction, it ust be OK as is. */
- if (GET_CODE (seq) != SEQUENCE)
- return seq;
+ if (NEXT_INSN (insns) == NULL_RTX)
+ return insns;
/* Otherwise, start a sequence, initialize the information we have, and
process all the insns we were given. */
info.sp_offset = 0;
info.equiv_reg_src = 0;
- for (i = 0; i < XVECLEN (seq, 0); i++)
+ insn = insns;
+ next = NULL_RTX;
+ while (insn != NULL_RTX)
{
- rtx insn = XVECEXP (seq, 0, i);
+ next = NEXT_INSN (insn);
if (!INSN_P (insn))
{
add_insn (insn);
+ insn = next;
continue;
}
{
emit_equiv_load (&info);
add_insn (insn);
+ insn = next;
continue;
}
else if (GET_CODE (retaddr) == MEM
info.sp_equiv_reg = info.new_sp_equiv_reg;
info.sp_offset = info.new_sp_offset;
+
+ insn = next;
}
- seq = gen_sequence ();
+ insns = get_insns ();
end_sequence ();
- return seq;
+ return insns;
}
/* SET is a SET from an insn in the epilogue. P is a pointer to the epi_info
emit_insn (seq);
/* Retain a map of the prologue insns. */
- if (GET_CODE (seq) != SEQUENCE)
- seq = get_insns ();
record_insns (seq, &prologue);
prologue_end = emit_note (NULL, NOTE_INSN_PROLOGUE_END);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
/* Can't deal with multiple successors of the entry block
emit_jump_insn (seq);
/* Retain a map of the epilogue insns. */
- if (GET_CODE (seq) != SEQUENCE)
- seq = get_insns ();
record_insns (seq, &epilogue);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
insert_insn_on_edge (seq, e);
seq = gen_sibcall_epilogue ();
end_sequence ();
+ /* Retain a map of the epilogue insns. Used in life analysis to
+ avoid getting rid of sibcall epilogue insns. Do this before we
+ actually emit the sequence. */
+ record_insns (seq, &sibcall_epilogue);
+
i = PREV_INSN (insn);
newinsn = emit_insn_before (seq, insn);
-
- /* Retain a map of the epilogue insns. Used in life analysis to
- avoid getting rid of sibcall epilogue insns. */
- record_insns (GET_CODE (seq) == SEQUENCE
- ? seq : newinsn, &sibcall_epilogue);
}
#endif
else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
abort ();
- pat = gen_sequence ();
+ pat = get_insns ();
end_sequence ();
return pat;
rtx new_insn;
rtx reg = expr->reaching_reg;
int regno = REGNO (reg);
- rtx pat;
- int i;
+ rtx pat, pat_end;
pat = process_insert_insn (expr);
+ if (pat == NULL_RTX || ! INSN_P (pat))
+ abort ();
+
+ pat_end = pat;
+ while (NEXT_INSN (pat_end) != NULL_RTX)
+ pat_end = NEXT_INSN (pat_end);
/* If the last insn is a jump, insert EXPR in front [taking care to
handle cc0, etc. properly]. Similary we need to care trapping
else
new_insn = emit_insn_after (pat, insn);
- /* Keep block number table up to date.
- Note, PAT could be a multiple insn sequence, we have to make
- sure that each insn in the sequence is handled. */
- if (GET_CODE (pat) == SEQUENCE)
+ while (1)
{
- for (i = 0; i < XVECLEN (pat, 0); i++)
+ if (INSN_P (pat))
{
- rtx insn = XVECEXP (pat, 0, i);
- if (INSN_P (insn))
- add_label_notes (PATTERN (insn), new_insn);
-
- note_stores (PATTERN (insn), record_set_info, insn);
+ add_label_notes (PATTERN (pat), new_insn);
+ note_stores (PATTERN (pat), record_set_info, pat);
}
- }
- else
- {
- add_label_notes (pat, new_insn);
-
- /* Keep register set table up to date. */
- record_one_set (regno, new_insn);
+ if (pat == pat_end)
+ break;
+ pat = NEXT_INSN (pat);
}
gcse_create_count++;
printf ("#include \"insn-attr.h\"\n");
printf ("#include \"toplev.h\"\n");
printf ("#include \"flags.h\"\n");
+ printf ("#include \"function.h\"\n");
printf ("\n");
printf ("#define operands recog_data.operand\n\n");
printf (" emit_barrier ();");
}
- /* Call `gen_sequence' to make a SEQUENCE out of all the
+ /* Call `get_insns' to extract the list of all the
insns emitted within this gen_... function. */
- printf (" _val = gen_sequence ();\n");
+ printf (" _val = get_insns ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
}
-/* Like gen_expand, but generates a SEQUENCE. */
+/* Like gen_expand, but generates insns resulting from splitting SPLIT. */
static void
gen_split (split)
printf (" emit_barrier ();");
}
- /* Call `gen_sequence' to make a SEQUENCE out of all the
+ /* Call `get_insns' to make a list of all the
insns emitted within this gen_... function. */
- printf (" _val = gen_sequence ();\n");
+ printf (" _val = get_insns ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
printf ("#include \"toplev.h\"\n");
printf ("#include \"ggc.h\"\n\n");
printf ("#define FAIL return (end_sequence (), _val)\n");
- printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n\n");
+ printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
/* Read the machine description. */
This program also generates the function `split_insns', which
returns 0 if the rtl could not be split, or it returns the split
- rtl in a SEQUENCE.
+ rtl as an INSN list.
This program also generates the function `peephole2_insns', which
returns 0 if the rtl could not be matched. If there was a match,
- the new rtl is returned in a SEQUENCE, and LAST_INSN will point
+ the new rtl is returned in an INSN list, and LAST_INSN will point
to the last recognized insn in the old sequence. */
#include "hconfig.h"
puts ("\n\
The function split_insns returns 0 if the rtl could not\n\
- be split or the split rtl in a SEQUENCE if it can be.\n\
+ be split or the split rtl as an INSN list if it can be.\n\
\n\
The function peephole2_insns returns 0 if the rtl could not\n\
- be matched. If there was a match, the new rtl is returned in a SEQUENCE,\n\
+ be matched. If there was a match, the new rtl is returned in an INSN list,\n\
and LAST_INSN will point to the last recognized insn in the old sequence.\n\
*/\n\n");
}
{
tmp = get_insns ();
end_sequence ();
- emit_insns (tmp);
+ emit_insn (tmp);
if_info->cond_earliest = if_info->jump;
seq = get_insns ();
end_sequence ();
- emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
}
if (seq_contains_jump (seq))
return FALSE;
- emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
}
if (seq_contains_jump (seq))
return FALSE;
- emit_insns_before_scope (seq, if_info->jump,
- INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump,
+ INSN_SCOPE (if_info->insn_a));
return TRUE;
}
if (seq_contains_jump (seq))
return FALSE;
- emit_insns_before_scope (seq, if_info->jump,
- INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump,
+ INSN_SCOPE (if_info->insn_a));
return TRUE;
}
{
tmp = get_insns ();
end_sequence ();
- emit_insns (tmp);
+ emit_insn (tmp);
return x;
}
seq = get_insns ();
end_sequence ();
- emit_insns_before_scope (seq, if_info->jump,
- INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump,
+ INSN_SCOPE (if_info->insn_a));
return TRUE;
}
else
tmp = get_insns ();
end_sequence ();
- emit_insns_before_scope (tmp, if_info->jump, INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (tmp, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
end_seq_and_fail:
if (seq_contains_jump (seq))
return FALSE;
- emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
if (seq_contains_jump (seq))
return FALSE;
- emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
+ emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
{
start_sequence ();
noce_emit_move_insn (copy_rtx (orig_x), x);
- insn_b = gen_sequence ();
+ insn_b = get_insns ();
end_sequence ();
emit_insn_after_scope (insn_b, test_bb->end, INSN_SCOPE (insn_a));
SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_after (seq, map->insns_at_start);
return temp;
SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_after (seq, map->insns_at_start);
return temp;
seq = get_insns ();
end_sequence ();
- emit_insns_after (seq, get_insns ());
+ emit_insn_after (seq, get_insns ());
}
/* If the backend knows where to allocate pseudos for hard
break;
/* If we reach a SEQUENCE, it is too complex to try to
- do anything with it, so give up. */
+ do anything with it, so give up. We can be run during
+ and after reorg, so SEQUENCE rtl can legitimately show
+ up here. */
if (GET_CODE (pat) == SEQUENCE)
break;
start_sequence ();
EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
- mode_set = gen_sequence ();
+ mode_set = get_insns ();
end_sequence ();
/* Do not bother to insert empty sequence. */
- if (GET_CODE (mode_set) == SEQUENCE
- && !XVECLEN (mode_set, 0))
+ if (mode_set == NULL_RTX)
continue;
/* If this is an abnormal edge, we'll insert at the end
start_sequence ();
EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
- mode_set = gen_sequence ();
+ mode_set = get_insns ();
end_sequence ();
/* Do not bother to insert empty sequence. */
- if (GET_CODE (mode_set) == SEQUENCE
- && !XVECLEN (mode_set, 0))
+ if (mode_set == NULL_RTX)
continue;
emited = true;
start_sequence ();
emit_move_insn (m->set_dest, m->set_src);
- temp = get_insns ();
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
- add_label_notes (m->set_src, temp);
+ add_label_notes (m->set_src, seq);
i1 = loop_insn_hoist (loop, seq);
if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
abort ();
if (tem != reg)
emit_move_insn (reg, tem);
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
i1 = loop_insn_hoist (loop, sequence);
}
use the REG_EQUAL note. */
start_sequence ();
emit_move_insn (m->set_dest, m->set_src);
- temp = get_insns ();
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
- add_label_notes (m->set_src, temp);
+ add_label_notes (m->set_src, seq);
i1 = loop_insn_hoist (loop, seq);
if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
loc = force_reg (Pmode, loc);
emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
GEN_INT (3)));
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
emit_insn_before (seq, before_insn);
result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
if (reg != result)
emit_move_insn (reg, result);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
return seq;
const struct loop *loop ATTRIBUTE_UNUSED;
rtx seq;
{
+ rtx insn;
+
/* Update register info for alias analysis. */
- if (GET_CODE (seq) == SEQUENCE)
+ if (seq == NULL_RTX)
+ return;
+
+ if (INSN_P (seq))
{
- int i;
- for (i = 0; i < XVECLEN (seq, 0); ++i)
+ insn = seq;
+ while (insn != NULL_RTX)
{
- rtx set = single_set (XVECEXP (seq, 0, i));
+ rtx set = single_set (insn);
+
if (set && GET_CODE (SET_DEST (set)) == REG)
record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
+
+ insn = NEXT_INSN (insn);
}
}
- else
- {
- if (GET_CODE (seq) == SET
- && GET_CODE (SET_DEST (seq)) == REG)
- record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
- }
+ else if (GET_CODE (seq) == SET
+ && GET_CODE (SET_DEST (seq)) == REG)
+ record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
}
}
\f
/* Test whether A * B can be computed without
- an actual multiply insn. Value is 1 if so. */
+ an actual multiply insn. Value is 1 if so.
+
+ ??? This function stinks because it generates a ton of wasted RTL
+ ??? and as a result fragments GC memory to no end. There are other
+ ??? places in the compiler which are invoked a lot and do the same
+ ??? thing, generate wasted RTL just to see if something is possible. */
static int
product_cheap_p (a, b)
rtx a;
rtx b;
{
- int i;
rtx tmp;
- int win = 1;
+ int win, n_insns;
/* If only one is constant, make it B. */
if (GET_CODE (a) == CONST_INT)
start_sequence ();
expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
- tmp = gen_sequence ();
+ tmp = get_insns ();
end_sequence ();
- if (GET_CODE (tmp) == SEQUENCE)
+ win = 1;
+ if (INSN_P (tmp))
{
- if (XVEC (tmp, 0) == 0)
- win = 1;
- else if (XVECLEN (tmp, 0) > 3)
- win = 0;
- else
- for (i = 0; i < XVECLEN (tmp, 0); i++)
- {
- rtx insn = XVECEXP (tmp, 0, i);
-
- if (GET_CODE (insn) != INSN
- || (GET_CODE (PATTERN (insn)) == SET
- && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
- || (GET_CODE (PATTERN (insn)) == PARALLEL
- && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
- && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
- {
- win = 0;
- break;
- }
- }
+ n_insns = 0;
+ while (tmp != NULL_RTX)
+ {
+ rtx next = NEXT_INSN (tmp);
+
+ if (++n_insns > 3
+ || GET_CODE (tmp) != INSN
+ || (GET_CODE (PATTERN (tmp)) == SET
+ && GET_CODE (SET_SRC (PATTERN (tmp))) == MULT)
+ || (GET_CODE (PATTERN (tmp)) == PARALLEL
+ && GET_CODE (XVECEXP (PATTERN (tmp), 0, 0)) == SET
+ && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp), 0, 0))) == MULT))
+ {
+ win = 0;
+ break;
+ }
+
+ tmp = next;
+ }
}
else if (GET_CODE (tmp) == SET
&& GET_CODE (SET_SRC (tmp)) == MULT)
create a sequence to hold all the insns from expand_inc. */
start_sequence ();
expand_inc (reg, new_add_val);
- tem = gen_sequence ();
+ tem = get_insns ();
end_sequence ();
p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
GET_MODE (reg), 0,
XEXP (jump_label, 0));
- tem = gen_sequence ();
+ tem = get_insns ();
end_sequence ();
emit_jump_insn_before (tem, loop_end);
final_value = force_operand (final_value, reg);
if (final_value != reg)
emit_move_insn (reg, final_value);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
return seq;
}
static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
enum machine_mode *, int *));
\f
-/* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
+/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
the result of operation CODE applied to OP0 (and OP1 if it is a binary
operation).
again, ensuring that TARGET is not one of the operands. */
static int
-add_equal_note (seq, target, code, op0, op1)
- rtx seq;
+add_equal_note (insns, target, code, op0, op1)
+ rtx insns;
rtx target;
enum rtx_code code;
rtx op0, op1;
{
- rtx set;
- int i;
+ rtx last_insn, insn, set;
rtx note;
- if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
- && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
- || GET_CODE (seq) != SEQUENCE
- || (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
- || GET_CODE (target) == ZERO_EXTRACT
- || (! rtx_equal_p (SET_DEST (set), target)
- /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
- SUBREG. */
- && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
- || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
- target))))
+ if (! insns
+ || ! INSN_P (insns)
+ || NEXT_INSN (insns) == NULL_RTX)
+ abort ();
+
+ if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
+ && GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
+ return 1;
+
+ if (GET_CODE (target) == ZERO_EXTRACT)
+ return 1;
+
+ for (last_insn = insns;
+ NEXT_INSN (last_insn) != NULL_RTX;
+ last_insn = NEXT_INSN (last_insn))
+ ;
+
+ set = single_set (last_insn);
+ if (set == NULL_RTX)
+ return 1;
+
+ if (! rtx_equal_p (SET_DEST (set), target)
+ /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
+ SUBREG. */
+ && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
+ || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
+ target)))
return 1;
/* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
besides the last insn. */
if (reg_overlap_mentioned_p (target, op0)
|| (op1 && reg_overlap_mentioned_p (target, op1)))
- for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
- if (reg_set_p (target, XVECEXP (seq, 0, i)))
- return 0;
+ {
+ insn = PREV_INSN (last_insn);
+ while (insn != NULL_RTX)
+ {
+ if (reg_set_p (target, insn))
+ return 0;
+
+ insn = PREV_INSN (insn);
+ }
+ }
if (GET_RTX_CLASS (code) == '1')
note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
else
note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
- set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note);
+ set_unique_reg_note (last_insn, REG_EQUAL, note);
return 1;
}
pat = GEN_FCN (icode) (temp, xop0, xop1);
if (pat)
{
- /* If PAT is a multi-insn sequence, try to add an appropriate
+ /* If PAT is composed of more than one insn, try to add an appropriate
REG_EQUAL note to it. If we can't because TEMP conflicts with an
operand, call ourselves again, this time without a target. */
- if (GET_CODE (pat) == SEQUENCE
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
{
delete_insns_since (last);
if (shift_count != BITS_PER_WORD)
emit_no_conflict_block (insns, target, op0, op1, equiv_value);
else
- emit_insns (insns);
+ emit_insn (insns);
return target;
pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
- if (GET_CODE (pat) == SEQUENCE
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
{
delete_insns_since (last);
pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
- if (GET_CODE (pat) == SEQUENCE
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
NULL_RTX))
{
pat = GEN_FCN (icode) (temp, op0);
- if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
+ if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
add_equal_note (pat, temp, code, op0, NULL_RTX);
emit_insn (pat);
rtx prev, next, first, last, insn;
if (GET_CODE (target) != REG || reload_in_progress)
- return emit_insns (insns);
+ return emit_insn (insns);
else
for (insn = insns; insn; insn = NEXT_INSN (insn))
if (GET_CODE (insn) != INSN
|| find_reg_note (insn, REG_LIBCALL, NULL_RTX))
- return emit_insns (insns);
+ return emit_insn (insns);
/* First emit all insns that do not store into words of the output and remove
these from the list. */
}
/* Generate the body of an instruction to copy Y into X.
- It may be a SEQUENCE, if one insn isn't enough. */
+ It may be a list of insns, if one insn isn't enough. */
rtx
gen_move_insn (x, y)
start_sequence ();
emit_move_insn_1 (x, y);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
return seq;
}
if (insn)
{
emit_insn (insn);
- insn = gen_sequence ();
+ insn = get_insns ();
}
end_sequence();
return insn;
if (tmp != mem_ref)
emit_move_insn (copy_rtx (mem_ref), tmp);
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
return sequence;
}
cfg-related call notes. */
for (i = 0; i <= match_len; ++i)
{
- int j, k;
+ int j;
rtx old_insn, new_insn, note;
j = i + peep2_current;
continue;
was_call = true;
- new_insn = NULL_RTX;
- if (GET_CODE (try) == SEQUENCE)
- for (k = XVECLEN (try, 0) - 1; k >= 0; k--)
- {
- rtx x = XVECEXP (try, 0, k);
- if (GET_CODE (x) == CALL_INSN)
- {
- new_insn = x;
- break;
- }
- }
- else if (GET_CODE (try) == CALL_INSN)
- new_insn = try;
- if (! new_insn)
+ new_insn = try;
+ while (new_insn != NULL_RTX)
+ {
+ if (GET_CODE (new_insn) == CALL_INSN)
+ break;
+ new_insn = NEXT_INSN (new_insn);
+ }
+
+ if (new_insn == NULL_RTX)
abort ();
CALL_INSN_FUNCTION_USAGE (new_insn)
current_block = NULL;
start_sequence ();
- /* ??? change_stack needs some point to emit insns after.
- Also needed to keep gen_sequence from returning a
- pattern as opposed to a sequence, which would lose
- REG_DEAD notes. */
+ /* ??? change_stack needs some point to emit insns after. */
after = emit_note (NULL, NOTE_INSN_DELETED);
tmpstack = regstack;
change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
insert_insn_on_edge (seq, e);
/* Generate the src->dest move. */
start_sequence ();
emit_move_insn (dest, src);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
/* If this sequence uses new registers, we may not use it. */
if (old_num_regs != reg_rtx_no
if (rl->when_needed == RELOAD_OTHER)
{
- emit_insns (other_output_reload_insns[rl->opnum]);
+ emit_insn (other_output_reload_insns[rl->opnum]);
other_output_reload_insns[rl->opnum] = get_insns ();
}
else
reloads for the operand. The RELOAD_OTHER output reloads are
output in descending order by reload number. */
- emit_insns_before (other_input_address_reload_insns, insn);
- emit_insns_before (other_input_reload_insns, insn);
+ emit_insn_before (other_input_address_reload_insns, insn);
+ emit_insn_before (other_input_reload_insns, insn);
for (j = 0; j < reload_n_operands; j++)
{
- emit_insns_before (inpaddr_address_reload_insns[j], insn);
- emit_insns_before (input_address_reload_insns[j], insn);
- emit_insns_before (input_reload_insns[j], insn);
+ emit_insn_before (inpaddr_address_reload_insns[j], insn);
+ emit_insn_before (input_address_reload_insns[j], insn);
+ emit_insn_before (input_reload_insns[j], insn);
}
- emit_insns_before (other_operand_reload_insns, insn);
- emit_insns_before (operand_reload_insns, insn);
+ emit_insn_before (other_operand_reload_insns, insn);
+ emit_insn_before (operand_reload_insns, insn);
for (j = 0; j < reload_n_operands; j++)
{
- rtx x = emit_insns_after (outaddr_address_reload_insns[j], insn);
- x = emit_insns_after (output_address_reload_insns[j], x);
- x = emit_insns_after (output_reload_insns[j], x);
- emit_insns_after (other_output_reload_insns[j], x);
+ rtx x = emit_insn_after (outaddr_address_reload_insns[j], insn);
+ x = emit_insn_after (output_address_reload_insns[j], x);
+ x = emit_insn_after (output_reload_insns[j], x);
+ emit_insn_after (other_output_reload_insns[j], x);
}
/* For all the spill regs newly reloaded in this instruction,
next = NEXT_INSN (insn);
if (INSN_P (insn))
{
- rtx seq;
-
delete_insn (insn);
/* We're not deleting it, we're moving it. */
INSN_DELETED_P (insn) = 0;
+ PREV_INSN (insn) = NULL_RTX;
+ NEXT_INSN (insn) = NULL_RTX;
- /* Emit a sequence, rather than scarfing the pattern, so
- that we don't lose REG_NOTES etc. */
- /* ??? Could copy the test from gen_sequence, but don't
- think it's worth the bother. */
- seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (1, insn));
- insert_insn_on_edge (seq, e);
+ insert_insn_on_edge (insn, e);
}
insn = next;
}
&& GET_CODE (next) == JUMP_INSN
&& GET_CODE (PATTERN (next)) == RETURN)
{
+ rtx after;
int i;
/* Delete the RETURN and just execute the delay list insns.
trial = PREV_INSN (insn);
delete_related_insns (insn);
- emit_insn_after (pat, trial);
+ if (GET_CODE (pat) != SEQUENCE)
+ abort ();
+ after = trial;
+ for (i = 0; i < XVECLEN (pat, 0); i++)
+ {
+ rtx this_insn = XVECEXP (pat, 0, i);
+ add_insn_after (this_insn, after);
+ after = this_insn;
+ }
delete_scheduled_jump (delay_insn);
continue;
}
#endif
)
{
+ rtx after;
int i;
/* All this insn does is execute its delay list and jump to the
trial = PREV_INSN (insn);
delete_related_insns (insn);
- emit_insn_after (pat, trial);
+ if (GET_CODE (pat) != SEQUENCE)
+ abort ();
+ after = trial;
+ for (i = 0; i < XVECLEN (pat, 0); i++)
+ {
+ rtx this_insn = XVECEXP (pat, 0, i);
+ add_insn_after (this_insn, after);
+ after = this_insn;
+ }
delete_scheduled_jump (delay_insn);
continue;
}
extern void end_sequence PARAMS ((void));
extern void push_to_full_sequence PARAMS ((rtx, rtx));
extern void end_full_sequence PARAMS ((rtx*, rtx*));
-extern rtx gen_sequence PARAMS ((void));
/* In varasm.c */
extern rtx immed_double_const PARAMS ((HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode));
extern rtx emit_note_after PARAMS ((int, rtx));
extern rtx emit_line_note_after PARAMS ((const char *, int, rtx));
extern rtx emit_insn PARAMS ((rtx));
-extern rtx emit_insns PARAMS ((rtx));
-extern rtx emit_insns_before PARAMS ((rtx, rtx));
-extern rtx emit_insns_before_scope PARAMS ((rtx, rtx, tree));
-extern rtx emit_insns_after PARAMS ((rtx, rtx));
-extern rtx emit_insns_after_scope PARAMS ((rtx, rtx, tree));
extern rtx emit_jump_insn PARAMS ((rtx));
extern rtx emit_call_insn PARAMS ((rtx));
extern rtx emit_label PARAMS ((rtx));
}
break;
case SEQUENCE:
- {
- int i;
-
- sprintf (t1, "%%{");
- for (i = 0; i < XVECLEN (x, 0); i++)
- {
- print_insn (t2, XVECEXP (x, 0, i), verbose);
- sprintf (t3, "%s%s;", t1, t2);
- strcpy (t1, t3);
- }
- sprintf (buf, "%s%%}", t1);
- }
+ /* Should never see SEQUENCE codes until after reorg. */
+ abort ();
break;
case ASM_INPUT:
sprintf (buf, "asm {%s}", XSTR (x, 0));
sibcall_use_t use;
{
if (use == sibcall_use_tail_recursion)
- emit_insns_before (XEXP (PATTERN (insn), 2), insn);
+ emit_insn_before (XEXP (PATTERN (insn), 2), insn);
else if (use == sibcall_use_sibcall)
- emit_insns_before (XEXP (PATTERN (insn), 1), insn);
+ emit_insn_before (XEXP (PATTERN (insn), 1), insn);
else if (use == sibcall_use_normal)
- emit_insns_before (XEXP (PATTERN (insn), 0), insn);
+ emit_insn_before (XEXP (PATTERN (insn), 0), insn);
else
abort ();
partition reg_partition;
};
+static rtx gen_sequence
+ PARAMS ((void));
static void ssa_rename_from_initialize
PARAMS ((void));
static rtx ssa_rename_from_lookup
}
}
+static rtx
+gen_sequence ()
+{
+ rtx first_insn = get_insns ();
+ rtx result;
+ rtx tem;
+ int i;
+ int len;
+
+ /* Count the insns in the chain. */
+ len = 0;
+ for (tem = first_insn; tem; tem = NEXT_INSN (tem))
+ len++;
+
+ result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
+
+ for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
+ XVECEXP (result, 0, i) = tem;
+
+ return result;
+}
+
static void
rename_block (bb, idom)
int bb;
ephi_create (i, visited, pred, succ, nodes);
}
- insn = gen_sequence ();
+ insn = get_insns ();
end_sequence ();
insert_insn_on_edge (insn, e);
if (rtl_dump_file)
NOTE_BLOCK (end) = block;
fixup->context = block;
end_sequence ();
- emit_insns_after (start, original_before_jump);
+ emit_insn_after (start, original_before_jump);
}
fixup->block_start_count = current_block_start_count;
(*lang_hooks.decls.poplevel) (1, 0, 0);
end_sequence ();
- emit_insns_after (cleanup_insns, f->before_jump);
+ emit_insn_after (cleanup_insns, f->before_jump);
f->before_jump = 0;
}
end_sequence ();
if (cleanup_insns != 0)
f->before_jump
- = emit_insns_after (cleanup_insns, f->before_jump);
+ = emit_insn_after (cleanup_insns, f->before_jump);
f->cleanup_list_list = TREE_CHAIN (lists);
}
emit_move_insn (slot, gen_rtx_LABEL_REF (Pmode, handler_label));
insns = get_insns ();
end_sequence ();
- emit_insns_before (insns, before_insn);
+ emit_insn_before (insns, before_insn);
emit_label (handler_label);
emit_move_insn (save_receiver, XEXP (slot, 0));
insns = get_insns ();
end_sequence ();
- emit_insns_before (insns, thisblock->data.block.first_insn);
+ emit_insn_before (insns, thisblock->data.block.first_insn);
}
/* Jump around the handlers; they run only when specially invoked. */
end_sequence ();
thisblock->data.block.last_unconditional_cleanup
- = emit_insns_after (set_flag_0,
+ = emit_insn_after (set_flag_0,
thisblock->data.block.last_unconditional_cleanup);
emit_move_insn (flag, const1_rtx);
end_sequence ();
if (seq)
thisblock->data.block.last_unconditional_cleanup
- = emit_insns_after (seq,
- thisblock->data.block.last_unconditional_cleanup);
+ = emit_insn_after (seq,
+ thisblock->data.block.last_unconditional_cleanup);
}
else
{
LABEL_NUSES (labels[0])++;
}
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
loop_insn_hoist (loop, sequence);
start_sequence ();
- /* Emit a NOTE_INSN_DELETED to force at least two insns onto the sequence.
- Else gen_sequence could return a raw pattern for a jump which we pass
- off to emit_insn_before (instead of emit_jump_insn_before) which causes
- a variety of losing behaviors later. */
- emit_note (0, NOTE_INSN_DELETED);
-
insn = copy_start;
do
{
if (final_label && LABEL_NUSES (final_label) > 0)
emit_label (final_label);
- tem = gen_sequence ();
+ tem = get_insns ();
end_sequence ();
loop_insn_emit_before (loop, 0, insert_before, tem);
}
ret = force_operand (v->new_reg, tem);
if (ret != tem)
emit_move_insn (tem, ret);
- sequence = gen_sequence ();
+ sequence = get_insns ();
end_sequence ();
loop_insn_hoist (loop, sequence);
tem = expand_simple_binop (GET_MODE (tem), MINUS, tem,
biv->add_val, NULL_RTX, 0,
OPTAB_LIB_WIDEN);
- seq = gen_sequence ();
+ seq = get_insns ();
end_sequence ();
loop_insn_sink (loop, seq);
}
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