* alpha.md (addsi3, subsi3): Expand to a DImode temporary so as

        to expose this midpoint to CSE.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@23536 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2939994..f851757 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Thu Nov  5 03:29:19 1998  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (addsi3, subsi3): Expand to a DImode temporary so as
+       to expose this midpoint to CSE.
+
 Thu Nov  5 03:42:54 1998  David S. Miller  <davem@pierdol.cobaltmicro.com>
 
        * config/sparc/sparc.md (movdf_const_intreg_sp64): Enable again.

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index bcd0b1e..c88497e 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -426,10 +426,11 @@
                 (match_operand:SI 2 "add_operand" "")))]
   ""
   "
-{ emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]),
-                         gen_rtx_PLUS (DImode,
-                                       gen_lowpart (DImode, operands[1]),
-                                       gen_lowpart (DImode, operands[2]))));
+{
+  rtx tmp = gen_reg_rtx (DImode);
+  emit_insn (gen_adddi3 (tmp, gen_lowpart (DImode, operands[1]),
+                        gen_lowpart (DImode, operands[2])));
+  emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
   DONE;
 } ")
 
@@ -712,10 +713,11 @@
                  (match_operand:SI 2 "reg_or_8bit_operand" "")))]
   ""
   "
-{ emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (DImode, operands[0]),
-                         gen_rtx_MINUS (DImode,
-                                        gen_lowpart (DImode, operands[1]),
-                                        gen_lowpart (DImode, operands[2]))));
+{
+  rtx tmp = gen_reg_rtx (DImode);
+  emit_insn (gen_subdi3 (tmp, gen_lowpart (DImode, operands[1]),
+                        gen_lowpart (DImode, operands[2])));
+  emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
   DONE;
 } ")