+2011-05-29 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*movoi_internal_avx): Use
+ standard_sse_constant_opcode for alternative 0.
+ (*movti_internal_sse): Ditto.
+ (*movti_internal_rex64): Use standard_sse_constant_opcode for
+ alternative 2.
+ (*movdi_internal_rex64): Use standard_sse_constant_opcode for
+ sselog1 type moves.
+ (*movsi_internal): Ditto.
+ (*movdi_internal): Ditto. Add ssecvt type moves.
+
2011-05-29 Eric Botcazou <ebotcazou@adacore.com>
PR target/48830
(lto_output_location_bitpack): Update.
(lto_output_builtin_tree): Update.
* lto-streamer.h (struct output_block): Add obstack.
- (lto_output_string, lto_output_string_with_length): Remove declarations;
- functions are static now.
+ (lto_output_string, lto_output_string_with_length): Remove
+ declarations; functions are static now.
2011-05-28 Jan Hubicka <jh@suse.cz>
(build_and_insert_call): New.
(gimple_expand_builtin_pow): Add handling for pow(x,y) when y is
0.5, 0.25, 0.75, 1./3., or 1./6.
-
+
2011-05-27 Alexander Monakov <amonakov@ispras.ru>
* doc/contrib.texi: Update copyright years.
len values.
* lto-streamer-in.c (string_for_index): Break out from ...; offset
values by 1.
- (input_string_internal): ... here;
+ (input_string_internal): ... here;
(input_string_cst, input_identifier, lto_input_string): Update handling
of NULL strings.
(lto_input_location_bitpack): New function
2011-05-26 Hariharan Sandanagobalane <hariharan@picochip.com>
* config/picochip/picochip.md (cbranchhi4): No :CC for match_operator.
- The instruction is then expanded explicitly.
+ The instruction is then expanded explicitly.
(supported_compare): Callable instruction.
(compare): Likewise.
switch (which_alternative)
{
case 0:
- return "vxorps\t%0, %0, %0";
+ return standard_sse_constant_opcode (insn, operands[1]);
case 1:
case 2:
if (misaligned_operand (operands[0], OImode)
case 1:
return "#";
case 2:
- if (get_attr_mode (insn) == MODE_V4SF)
- return "%vxorps\t%0, %d0";
- else
- return "%vpxor\t%0, %d0";
+ return standard_sse_constant_opcode (insn, operands[1]);
case 3:
case 4:
/* TDmode values are passed as TImode on the stack. Moving them
switch (which_alternative)
{
case 0:
- if (get_attr_mode (insn) == MODE_V4SF)
- return "%vxorps\t%0, %d0";
- else
- return "%vpxor\t%0, %d0";
+ return standard_sse_constant_opcode (insn, operands[1]);
case 1:
case 2:
/* TDmode values are passed as TImode on the stack. Moving them
return "movq\t{%1, %0|%0, %1}";
case TYPE_SSELOG1:
- return "%vpxor\t%0, %d0";
+ return standard_sse_constant_opcode (insn, operands[1]);
case TYPE_MMX:
return "pxor\t%0, %0";
(and (eq_attr "alternative" "2") (eq_attr "type" "imov"))
(const_string "8")
(const_string "*")))
- (set_attr "prefix_rex" "*,*,*,*,*,*,*,1,*,1,*,*,*,*,*,*,*,*,*")
- (set_attr "prefix_data16" "*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,1,*,*,*")
+ (set (attr "prefix_rex")
+ (if_then_else (eq_attr "alternative" "7,9")
+ (const_string "1")
+ (const_string "*")))
+ (set (attr "prefix_data16")
+ (if_then_else (eq_attr "alternative" "15")
+ (const_string "1")
+ (const_string "*")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "11,12,13,14,15,16")
(const_string "maybe_vex")
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand"
- "=r ,o ,*y,m*y,*y,*Y2,m ,*Y2,*Y2,*x,m ,*x,*x")
+ "=r ,o ,*y,m*y,*y,*Y2,m ,*Y2,*Y2,*x,m ,*x,*x,?*Y2,?*Ym")
(match_operand:DI 1 "general_operand"
- "riFo,riF,C ,*y ,m ,C ,*Y2,*Y2,m ,C ,*x,*x,m "))]
+ "riFo,riF,C ,*y ,m ,C ,*Y2,*Y2,m ,C ,*x,*x,m ,*Ym ,*Y2"))]
"!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
- "@
- #
- #
- pxor\t%0, %0
- movq\t{%1, %0|%0, %1}
- movq\t{%1, %0|%0, %1}
- %vpxor\t%0, %d0
- %vmovq\t{%1, %0|%0, %1}
- %vmovdqa\t{%1, %0|%0, %1}
- %vmovq\t{%1, %0|%0, %1}
- xorps\t%0, %0
- movlps\t{%1, %0|%0, %1}
- movaps\t{%1, %0|%0, %1}
- movlps\t{%1, %0|%0, %1}"
+{
+ switch (get_attr_type (insn))
+ {
+ case TYPE_SSECVT:
+ if (SSE_REG_P (operands[0]))
+ return "movq2dq\t{%1, %0|%0, %1}";
+ else
+ return "movdq2q\t{%1, %0|%0, %1}";
+
+ case TYPE_SSEMOV:
+ switch (get_attr_mode (insn))
+ {
+ case MODE_TI:
+ return "%vmovdqa\t{%1, %0|%0, %1}";
+ case MODE_DI:
+ return "%vmovq\t{%1, %0|%0, %1}";
+ case MODE_V4SF:
+ return "movaps\t{%1, %0|%0, %1}";
+ case MODE_V2SF:
+ return "movlps\t{%1, %0|%0, %1}";
+ default:
+ gcc_unreachable ();
+ }
+
+ case TYPE_MMXMOV:
+ return "movq\t{%1, %0|%0, %1}";
+
+ case TYPE_SSELOG1:
+ return standard_sse_constant_opcode (insn, operands[1]);
+
+ case TYPE_MMX:
+ return "pxor\t%0, %0";
+
+ case TYPE_MULTI:
+ return "#";
+
+ default:
+ gcc_unreachable ();
+ }
+}
[(set (attr "isa")
(if_then_else (eq_attr "alternative" "9,10,11,12")
(const_string "noavx")
(const_string "base")))
- (set_attr "type" "*,*,mmx,mmxmov,mmxmov,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
+ (set (attr "type")
+ (cond [(eq_attr "alternative" "0,1")
+ (const_string "multi")
+ (eq_attr "alternative" "2")
+ (const_string "mmx")
+ (eq_attr "alternative" "3,4")
+ (const_string "mmxmov")
+ (eq_attr "alternative" "5,9")
+ (const_string "sselog1")
+ (eq_attr "alternative" "13,14")
+ (const_string "ssecvt")
+ ]
+ (const_string "ssemov")))
(set (attr "prefix")
(if_then_else (eq_attr "alternative" "5,6,7,8")
(const_string "maybe_vex")
(const_string "orig")))
- (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,TI,DI,V4SF,V2SF,V4SF,V2SF")])
+ (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,TI,DI,V4SF,V2SF,V4SF,V2SF,DI,DI")])
(define_split
[(set (match_operand:DI 0 "nonimmediate_operand" "")
switch (get_attr_type (insn))
{
case TYPE_SSELOG1:
- if (get_attr_mode (insn) == MODE_TI)
- return "%vpxor\t%0, %d0";
- return "%vxorps\t%0, %d0";
+ return standard_sse_constant_opcode (insn, operands[1]);
case TYPE_SSEMOV:
switch (get_attr_mode (insn))
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