2010-08-19 Uros Bizjak <ubizjak@gmail.com>

	* config/i386/i386.md (*lea_1): Use P mode iterator.
	(lea add splitter): Also handle DImode operands.
	(DImode lea add splitter): Use x86_64_immediate_operand for operand 2
	predicate.  Do not use ix86_lea_for_add_ok.
	(zext DImode lea add splitter): Use ix86_lea_for_add_ok.
	(lea ashift splitter): Also handle DImode operands.
	(DImode lea ashift splitter): Remove splitter.

2010-08-19  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*add<SWI:mode>3_cconly_overflow): Do not use
	ix86_binary_operator_ok.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163375 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1b92353..a677a12 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,23 @@
+2010-08-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*lea_1): Use P mode iterator.
+       (lea add splitter): Also handle DImode operands.
+       (DImode lea add splitter): Use x86_64_immediate_operand for operand 2
+       predicate.  Do not use ix86_lea_for_add_ok.
+       (zext DImode lea add splitter): Use ix86_lea_for_add_ok.
+       (lea ashift splitter): Also handle DImode operands.
+       (DImode lea ashift splitter): Remove splitter.
+
+2010-08-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*add<SWI:mode>3_cconly_overflow): Do not use
+       ix86_binary_operator_ok.
+
 2010-08-19  Andrey Belevantsev  <abel@ispras.ru>
 
        PR rtl-optimization/44691
        * sel-sched.c (count_occurrences_1): Also punt when SUBREG_REG
-       is not a register. 
+       is not a register.
 
 2010-08-19  Ian Bolton  <ian.bolton@arm.com>
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6215f19..e5de3b9 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5764,8 +5764,8 @@
    (set_attr "mode" "QI")])
 
 (define_insn "*lea_1"
-  [(set (match_operand:DWIH 0 "register_operand" "=r")
-       (match_operand:DWIH 1 "no_seg_address_operand" "p"))]
+  [(set (match_operand:P 0 "register_operand" "=r")
+       (match_operand:P 1 "no_seg_address_operand" "p"))]
   ""
   "lea{<imodesuffix>}\t{%a1, %0|%0, %a1}"
   [(set_attr "type" "lea")
@@ -6137,6 +6137,68 @@
         (const_string "none")))
    (set_attr "mode" "QI")])
 
+;; Convert lea to the lea pattern to avoid flags dependency.
+(define_split
+  [(set (match_operand 0 "register_operand" "")
+       (plus (match_operand 1 "register_operand" "")
+              (match_operand 2 "nonmemory_operand" "")))
+   (clobber (reg:CC FLAGS_REG))]
+  "reload_completed && ix86_lea_for_add_ok (insn, operands)" 
+  [(const_int 0)]
+{
+  rtx pat;
+  enum machine_mode mode = GET_MODE (operands[0]);
+
+  /* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
+     may confuse gen_lowpart.  */
+  if (mode != Pmode)
+    {
+      operands[1] = gen_lowpart (Pmode, operands[1]);
+      operands[2] = gen_lowpart (Pmode, operands[2]);
+    }
+
+  pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
+
+  if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+    operands[0] = gen_lowpart (SImode, operands[0]);
+
+  if (TARGET_64BIT && mode != Pmode)
+    pat = gen_rtx_SUBREG (SImode, pat, 0);
+
+  emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
+  DONE;
+})
+
+;; Convert lea to the lea pattern to avoid flags dependency.
+;; ??? This pattern handles immediate operands that do not satisfy immediate
+;; operand predicate (LEGITIMATE_CONSTANT_P) in the previous pattern.
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+       (plus:DI (match_operand:DI 1 "register_operand" "")
+                (match_operand:DI 2 "x86_64_immediate_operand" "")))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_64BIT && reload_completed 
+   && true_regnum (operands[0]) != true_regnum (operands[1])"
+  [(set (match_dup 0)
+       (plus:DI (match_dup 1) (match_dup 2)))]
+  "")
+
+;; Convert lea to the lea pattern to avoid flags dependency.
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+       (zero_extend:DI
+         (plus:SI (match_operand:SI 1 "register_operand" "")
+                  (match_operand:SI 2 "nonmemory_operand" ""))))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_64BIT && reload_completed
+   && ix86_lea_for_add_ok (insn, operands)"
+  [(set (match_dup 0)
+       (zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
+{
+  operands[1] = gen_lowpart (DImode, operands[1]);
+  operands[2] = gen_lowpart (DImode, operands[2]);
+})
+
 (define_insn "*add<mode>_2"
   [(set (reg FLAGS_REG)
        (compare
@@ -6678,60 +6740,6 @@
 }
   [(set_attr "type" "lea")
    (set_attr "mode" "SI")])
-
-;; Convert lea to the lea pattern to avoid flags dependency.
-(define_split
-  [(set (match_operand:DI 0 "register_operand" "")
-       (plus:DI (match_operand:DI 1 "register_operand" "")
-                (match_operand:DI 2 "x86_64_nonmemory_operand" "")))
-   (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && reload_completed 
-   && ix86_lea_for_add_ok (insn, operands)"
-  [(set (match_dup 0)
-       (plus:DI (match_dup 1)
-                (match_dup 2)))]
-  "")
-
-;; Convert lea to the lea pattern to avoid flags dependency.
-(define_split
-  [(set (match_operand 0 "register_operand" "")
-       (plus (match_operand 1 "register_operand" "")
-              (match_operand 2 "nonmemory_operand" "")))
-   (clobber (reg:CC FLAGS_REG))]
-  "reload_completed && ix86_lea_for_add_ok (insn, operands)" 
-  [(const_int 0)]
-{
-  rtx pat;
-  /* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
-     may confuse gen_lowpart.  */
-  if (GET_MODE (operands[0]) != Pmode)
-    {
-      operands[1] = gen_lowpart (Pmode, operands[1]);
-      operands[2] = gen_lowpart (Pmode, operands[2]);
-    }
-  operands[0] = gen_lowpart (SImode, operands[0]);
-  pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
-  if (Pmode != SImode)
-    pat = gen_rtx_SUBREG (SImode, pat, 0);
-  emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
-  DONE;
-})
-
-;; Convert lea to the lea pattern to avoid flags dependency.
-(define_split
-  [(set (match_operand:DI 0 "register_operand" "")
-       (zero_extend:DI
-         (plus:SI (match_operand:SI 1 "register_operand" "")
-                  (match_operand:SI 2 "nonmemory_operand" ""))))
-   (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])"
-  [(set (match_dup 0)
-       (zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
-{
-  operands[1] = gen_lowpart (Pmode, operands[1]);
-  operands[2] = gen_lowpart (Pmode, operands[2]);
-})
 \f
 ;; Subtract instructions
 
@@ -6924,7 +6932,7 @@
            (match_operand:SWI 2 "<general_operand>" "<g>"))
          (match_dup 1)))
    (clobber (match_scratch:SWI 0 "=<r>"))]
-  "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+  "!(MEM_P (operands[1]) && MEM_P (operands[2]))"
   "add{<imodesuffix>}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "<MODE>")])
@@ -9586,44 +9594,49 @@
 
 ;; Convert lea to the lea pattern to avoid flags dependency.
 (define_split
-  [(set (match_operand:DI 0 "register_operand" "")
-       (ashift:DI (match_operand:DI 1 "index_register_operand" "")
-                  (match_operand:QI 2 "const_int_operand" "")))
-   (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])"
-  [(set (match_dup 0)
-       (mult:DI (match_dup 1)
-                (match_dup 2)))]
-  "operands[2] = gen_int_mode (1 << INTVAL (operands[2]), DImode);")
-
-;; Convert lea to the lea pattern to avoid flags dependency.
-(define_split
   [(set (match_operand 0 "register_operand" "")
        (ashift (match_operand 1 "index_register_operand" "")
                 (match_operand:QI 2 "const_int_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])
-   && GET_MODE_SIZE (GET_MODE (operands[0])) <= 4"
+   && true_regnum (operands[0]) != true_regnum (operands[1])"
   [(const_int 0)]
 {
   rtx pat;
   enum machine_mode mode = GET_MODE (operands[0]);
 
-  if (GET_MODE_SIZE (mode) < 4)
-    operands[0] = gen_lowpart (SImode, operands[0]);
   if (mode != Pmode)
     operands[1] = gen_lowpart (Pmode, operands[1]);
   operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
 
   pat = gen_rtx_MULT (Pmode, operands[1], operands[2]);
-  if (Pmode != SImode)
+
+  if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
+    operands[0] = gen_lowpart (SImode, operands[0]);
+
+  if (TARGET_64BIT && mode != Pmode)
     pat = gen_rtx_SUBREG (SImode, pat, 0);
+
   emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
   DONE;
 })
 
+;; Convert lea to the lea pattern to avoid flags dependency.
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+       (zero_extend:DI
+         (ashift:SI (match_operand:SI 1 "index_register_operand" "")
+                    (match_operand:QI 2 "const_int_operand" ""))))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_64BIT && reload_completed
+   && true_regnum (operands[0]) != true_regnum (operands[1])"
+  [(set (match_dup 0)
+       (zero_extend:DI (subreg:SI (mult:DI (match_dup 1) (match_dup 2)) 0)))]
+{
+  operands[1] = gen_lowpart (DImode, operands[1]);
+  operands[2] = gen_int_mode (1 << INTVAL (operands[2]), DImode);
+})
+
 ;; Rare case of shifting RSP is handled by generating move and shift
 (define_split
   [(set (match_operand 0 "register_operand" "")
@@ -9644,22 +9657,6 @@
   DONE;
 })
 
-;; Convert lea to the lea pattern to avoid flags dependency.
-(define_split
-  [(set (match_operand:DI 0 "register_operand" "")
-       (zero_extend:DI
-         (ashift:SI (match_operand:SI 1 "register_operand" "")
-                    (match_operand:QI 2 "const_int_operand" ""))))
-   (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])"
-  [(set (match_dup 0)
-       (zero_extend:DI (subreg:SI (mult:DI (match_dup 1) (match_dup 2)) 0)))]
-{
-  operands[1] = gen_lowpart (Pmode, operands[1]);
-  operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
-})
-
 ;; This pattern can't accept a variable shift count, since shifts by
 ;; zero don't affect the flags.  We assume that shifts by constant
 ;; zero are optimized away.