This will allow combining am33 and mn103 alternatives
without having to resort to the enabled attribute.
The existing 'A' constraint renamed to 'c'. Thankfully
this existing accumulator constraint doesn't appear in
either newlib or eglibc sources.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@168675
138bc75d-0d04-0410-961f-
82ee72b054a4
2011-01-11 Richard Henderson <rth@redhat.com>
+ * config/mn10300/constraints.md ("c"): Rename from "A".
+ ("A", "D"): New constraint letters.
+ * config/mn10300/mn10300.md (fmasf4): Use the "c" constraint.
+ (fmssf4, fnmasf4, fnmssf4): Likewise.
+
* config/mn10300/mn10300.md (isa): New attribute.
(enabled): New attribute.
(define_register_constraint "a" "ADDRESS_REGS"
"An address register.")
+;; This can be used for QI/HImode memory operations, and most arithmetic.
+;; AM33 supports these on all registers, where MN103 needs DATA_REGS.
+(define_register_constraint "D" "TARGET_AM33 ? GENERAL_REGS : DATA_REGS"
+ "A general register for AM33, and a data register otherwise.")
+
+;; Similarly for ADDRESS_REGS vs GENERAL_REGS.
+(define_register_constraint "A" "TARGET_AM33 ? GENERAL_REGS : ADDRESS_REGS"
+ "A general register for AM33, and an address register otherwise.")
+
(define_register_constraint "y" "SP_REGS"
"An SP register (if available).")
(define_register_constraint "f" "TARGET_AM33_2 ? FP_REGS : NO_REGS"
"A floating point register.")
-(define_register_constraint "A" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
+(define_register_constraint "c" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
"A floating point accumulator register.")
(define_memory_constraint "Q"
)
(define_insn "fmasf4"
- [(set (match_operand:SF 0 "register_operand" "=A")
+ [(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f")))
)
(define_insn "fmssf4"
- [(set (match_operand:SF 0 "register_operand" "=A")
+ [(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")
(neg:SF (match_operand:SF 3 "register_operand" "f"))))
)
(define_insn "fnmasf4"
- [(set (match_operand:SF 0 "register_operand" "=A")
+ [(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f")))
)
(define_insn "fnmssf4"
- [(set (match_operand:SF 0 "register_operand" "=A")
+ [(set (match_operand:SF 0 "register_operand" "=c")
(fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(match_operand:SF 2 "register_operand" "f")
(neg:SF (match_operand:SF 3 "register_operand" "f"))))