2005-04-04 Andreas Krebbel <krebbel1@de.ibm.com>

            Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/2064.md ("z_mul", "z_inf"): New insn reservations.
	* config/s390/2084.md ("x_mul_hi", "x_mul_sidi", "x_div"): Likewise.
	* config/s390/s390.md ("imulhi", "imulsi", "imuldi"): Added to "type"
	attribute.
	("imul"): Removed from "type" attribute.
	("*muldi3_sign", "muldi3"): Changed type to imuldi.
	("mulsi3/1", "mulsi3/3", "mulsi/4", "mulsidi3", "umulsidi3"):
	Changed type to imulsi.
	("*mulsi3_sign", "mulsi3/2"): Changed type to imulhi.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97545 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7cb33b7..fe1530a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2005-04-04  Andreas Krebbel  <krebbel1@de.ibm.com>
+           Adrian Straetling  <straetling@de.ibm.com>
+
+       * config/s390/2064.md ("z_mul", "z_inf"): New insn reservations.
+       * config/s390/2084.md ("x_mul_hi", "x_mul_sidi", "x_div"): Likewise.
+       * config/s390/s390.md ("imulhi", "imulsi", "imuldi"): Added to "type"
+       attribute.
+       ("imul"): Removed from "type" attribute.
+       ("*muldi3_sign", "muldi3"): Changed type to imuldi.
+       ("mulsi3/1", "mulsi3/3", "mulsi/4", "mulsidi3", "umulsidi3"): 
+       Changed type to imulsi.
+       ("*mulsi3_sign", "mulsi3/2"): Changed type to imulhi.
+
 2005-04-04  Richard Sandiford  <rsandifo@redhat.com>
 
        * config/mcore/mcore.h (target_flags, HARDLIT_BIT, ALIGN8_BIT, DIV_BIT)

diff --git a/gcc/config/s390/2064.md b/gcc/config/s390/2064.md
index 211cd02..7ce6e4f 100644 (file)
--- a/gcc/config/s390/2064.md
+++ b/gcc/config/s390/2064.md
@@ -72,6 +72,16 @@
        (eq_attr "type" "jsr"))
   "z_e1*5,z_wr")
 
+(define_insn_reservation "z_mul" 5
+  (and (eq_attr "cpu" "g5,g6,z900")
+       (eq_attr "type" "imulsi,imulhi"))
+  "z_e1*5,z_wr")
+
+(define_insn_reservation "z_inf" 10
+  (and (eq_attr "cpu" "g5,g6,z900")
+       (eq_attr "type" "idiv,imuldi"))
+  "z_e1*10,z_wr")
+
 ;; For everything else we check the atype flag.
 
 (define_insn_reservation "z_int" 1

diff --git a/gcc/config/s390/2084.md b/gcc/config/s390/2084.md
index c07f4cf..ddbd3fc 100644 (file)
--- a/gcc/config/s390/2084.md
+++ b/gcc/config/s390/2084.md
@@ -106,7 +106,22 @@
 (define_insn_reservation "x_call" 5 
   (and (eq_attr "cpu" "z990")
        (eq_attr "type" "jsr"))
-  "x-e1-np*5,x-wr-np") 
+  "x-e1-np*5,x-wr-np")
+ 
+(define_insn_reservation "x_mul_hi" 2
+  (and (eq_attr "cpu" "z990")
+       (eq_attr "type" "imulhi"))
+  "x-e1-np*2,x-wr-np")
+
+(define_insn_reservation "x_mul_sidi" 4
+  (and (eq_attr "cpu" "z990")
+       (eq_attr "type" "imulsi,imuldi"))
+  "x-e1-np*4,x-wr-np")
+
+(define_insn_reservation "x_div" 10
+  (and (eq_attr "cpu" "z990")
+       (eq_attr "type" "idiv"))
+  "x-e1-np*10,x-wr-np")
 
 ;;
 ;; Multicycle insns

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 5bb9d4c..4c779c3 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -156,7 +156,8 @@
 ;; Instruction type attribute used for scheduling.
 
 (define_attr "type" "none,integer,load,lr,la,larl,lm,stm,
-                    cs,vs,store,imul,idiv,
+                    cs,vs,store,idiv,
+                     imulhi,imulsi,imuldi,
                     branch,jsr,fsimpd,fsimps,
                     floadd,floads,fstored, fstores,
                     fmuld,fmuls,fdivd,fdivs,
@@ -4512,7 +4513,7 @@
    msgfr\t%0,%2
    msgf\t%0,%2"
   [(set_attr "op_type"  "RRE,RXY")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imuldi")])
 
 (define_insn "muldi3"
   [(set (match_operand:DI 0 "register_operand" "=d,d,d")
@@ -4524,7 +4525,7 @@
    mghi\t%0,%h2
    msg\t%0,%2"
   [(set_attr "op_type"  "RRE,RI,RXY")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imuldi")])
 
 ;
 ; mulsi3 instruction pattern(s).
@@ -4537,7 +4538,7 @@
   ""
   "mh\t%0,%2"
   [(set_attr "op_type"  "RX")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imulhi")])
 
 (define_insn "mulsi3"
   [(set (match_operand:SI 0 "register_operand" "=d,d,d,d")
@@ -4550,7 +4551,7 @@
    ms\t%0,%2
    msy\t%0,%2"
   [(set_attr "op_type"  "RRE,RI,RX,RXY")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imulsi,imulhi,imulsi,imulsi")])
 
 ;
 ; mulsidi3 instruction pattern(s).
@@ -4567,7 +4568,7 @@
    mr\t%0,%2
    m\t%0,%2"
   [(set_attr "op_type"  "RR,RX")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imulsi")])
 
 ;
 ; umulsidi3 instruction pattern(s).
@@ -4584,7 +4585,7 @@
    mlr\t%0,%2
    ml\t%0,%2"
   [(set_attr "op_type"  "RRE,RXY")
-   (set_attr "type"     "imul")])
+   (set_attr "type"     "imulsi")])
 
 ;
 ; muldf3 instruction pattern(s).