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2005-05-09 Adrian Straetling <straetling@de.ibm.com>
authoruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 9 May 2005 17:01:36 +0000 (17:01 +0000)
committeruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 9 May 2005 17:01:36 +0000 (17:01 +0000)
* config/s390/s390.md: ("HQI"): New mode macro.
("icm_lo", "icm_hi", "max_uint"): New mode attributes.
("*tmhi_full", "*tmqi_full"): Merge.
("*tsthiCCT", "*tstqiCCT"): Merge.
("*tsthi", "*tstqi"): Merge.
("*tsthi_cconly", "tstqi_cconly"): Merge.
("*sethighhisi", "*sethighqisi"): Merge.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@99449 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/s390/s390.md

index ceef4e4..89f2adb 100644 (file)
@@ -1,3 +1,13 @@
+2005-05-09  Adrian Straetling  <straetling@de.ibm.com>
+
+       * config/s390/s390.md: ("HQI"): New mode macro.
+       ("icm_lo", "icm_hi", "max_uint"): New mode attributes.
+       ("*tmhi_full", "*tmqi_full"): Merge.
+       ("*tsthiCCT", "*tstqiCCT"): Merge.
+       ("*tsthi", "*tstqi"): Merge.
+       ("*tsthi_cconly", "tstqi_cconly"): Merge.
+       ("*sethighhisi", "*sethighqisi"): Merge.
+        
 2005-05-09  Kazu Hirata  <kazu@cs.umass.edu>
 
        * crtstuff.c, integrate.h, tree-scalar-evolution.h,
index 300bffb..a74cf9e 100644 (file)
 ;; Predicates
 (include "predicates.md")
 
+
+;; Macros
+
+;; This mode macro allows the QI and HI patterns to be defined from
+;; the same template.
+(define_mode_macro HQI [HI QI])
+
+
+;; ICM mask required to load MODE value into the highest subreg
+;; of a SImode register.
+(define_mode_attr icm_hi [(HI "12") (QI "8")])
+
+;; ICM mask required to load MODE value into the lowest subreg
+;; of a SImode register.
+(define_mode_attr icm_lo [(HI "3") (QI "1")])
+
+;; Maximum unsigned integer that fits in MODE.
+(define_mode_attr max_uint [(HI "65535") (QI "255")])
+
+
 ;;
 ;;- Compare instructions.
 ;;
    tml\t%0,%i1"
   [(set_attr "op_type" "RI")])
 
-(define_insn "*tmhi_full"
-  [(set (reg 33)
-        (compare (match_operand:HI 0 "register_operand" "d")
-                 (match_operand:HI 1 "immediate_operand" "n")))]
-  "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
-  "tml\t%0,65535"
-  [(set_attr "op_type" "RI")])
-
-(define_insn "*tmqi_full"
+(define_insn "*tm<mode>_full"
   [(set (reg 33)
-        (compare (match_operand:QI 0 "register_operand" "d")
-                 (match_operand:QI 1 "immediate_operand" "n")))]
+        (compare (match_operand:HQI 0 "register_operand" "d")
+                 (match_operand:HQI 1 "immediate_operand" "n")))]
   "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
-  "tml\t%0,255"
+  "tml\t%0,<max_uint>"
   [(set_attr "op_type" "RI")])
 
 
   "ltr\t%0,%0"
   [(set_attr "op_type" "RR")])
 
-(define_insn "*tsthiCCT"
+(define_insn "*tst<mode>CCT"
   [(set (reg 33)
-        (compare (match_operand:HI 0 "nonimmediate_operand" "?Q,?S,d")
-                 (match_operand:HI 1 "const0_operand" "")))
-   (set (match_operand:HI 2 "register_operand" "=d,d,0")
+        (compare (match_operand:HQI 0 "nonimmediate_operand" "?Q,?S,d")
+                 (match_operand:HQI 1 "const0_operand" "")))
+   (set (match_operand:HQI 2 "register_operand" "=d,d,0")
         (match_dup 0))]
   "s390_match_ccmode(insn, CCTmode)"
   "@
-   icm\t%2,3,%S0
-   icmy\t%2,3,%S0
-   tml\t%0,65535"
+   icm\t%2,<icm_lo>,%S0
+   icmy\t%2,<icm_lo>,%S0
+   tml\t%0,<max_uint>"
   [(set_attr "op_type" "RS,RSY,RI")])
 
 (define_insn "*tsthiCCT_cconly"
    tml\t%0,65535"
   [(set_attr "op_type" "RS,RSY,RI")])
 
-(define_insn "*tsthi"
-  [(set (reg 33)
-        (compare (match_operand:HI 0 "s_operand" "Q,S")
-                 (match_operand:HI 1 "const0_operand" "")))
-   (set (match_operand:HI 2 "register_operand" "=d,d")
-        (match_dup 0))]
-  "s390_match_ccmode(insn, CCSmode)"
-  "@
-   icm\t%2,3,%S0
-   icmy\t%2,3,%S0"
-  [(set_attr "op_type" "RS,RSY")])
-
-(define_insn "*tsthi_cconly"
-  [(set (reg 33)
-        (compare (match_operand:HI 0 "s_operand" "Q,S")
-                 (match_operand:HI 1 "const0_operand" "")))
-   (clobber (match_scratch:HI 2 "=d,d"))]
-  "s390_match_ccmode(insn, CCSmode)"
-  "@
-   icm\t%2,3,%S0
-   icmy\t%2,3,%S0"
-  [(set_attr "op_type" "RS,RSY")])
-
-(define_insn "*tstqiCCT"
-  [(set (reg 33)
-        (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d")
-                 (match_operand:QI 1 "const0_operand" "")))
-   (set (match_operand:QI 2 "register_operand" "=d,d,0")
-        (match_dup 0))]
-  "s390_match_ccmode(insn, CCTmode)"
-  "@
-   icm\t%2,1,%S0
-   icmy\t%2,1,%S0
-   tml\t%0,255"
-  [(set_attr "op_type" "RS,RSY,RI")])
-
 (define_insn "*tstqiCCT_cconly"
   [(set (reg 33)
         (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d")
    tml\t%0,255"
   [(set_attr "op_type" "SI,SIY,RI")])
 
-(define_insn "*tstqi"
+(define_insn "*tst<mode>"
   [(set (reg 33)
-        (compare (match_operand:QI 0 "s_operand" "Q,S")
-                 (match_operand:QI 1 "const0_operand" "")))
-   (set (match_operand:QI 2 "register_operand" "=d,d")
+        (compare (match_operand:HQI 0 "s_operand" "Q,S")
+                 (match_operand:HQI 1 "const0_operand" "")))
+   (set (match_operand:HQI 2 "register_operand" "=d,d")
         (match_dup 0))]
   "s390_match_ccmode(insn, CCSmode)"
   "@
-   icm\t%2,1,%S0
-   icmy\t%2,1,%S0"
+   icm\t%2,<icm_lo>,%S0
+   icmy\t%2,<icm_lo>,%S0"
   [(set_attr "op_type" "RS,RSY")])
 
-(define_insn "*tstqi_cconly"
+(define_insn "*tst<mode>_cconly"
   [(set (reg 33)
-        (compare (match_operand:QI 0 "s_operand" "Q,S")
-                 (match_operand:QI 1 "const0_operand" "")))
-   (clobber (match_scratch:QI 2 "=d,d"))]
+        (compare (match_operand:HQI 0 "s_operand" "Q,S")
+                 (match_operand:HQI 1 "const0_operand" "")))
+   (clobber (match_scratch:HQI 2 "=d,d"))]
   "s390_match_ccmode(insn, CCSmode)"
   "@
-   icm\t%2,1,%S0
-   icmy\t%2,1,%S0"
+   icm\t%2,<icm_lo>,%S0
+   icmy\t%2,<icm_lo>,%S0"
   [(set_attr "op_type" "RS,RSY")])
 
 
 ;;- Conversion instructions.
 ;;
 
-(define_insn "*sethighqisi"
-  [(set (match_operand:SI 0 "register_operand" "=d,d")
-        (unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
-   (clobber (reg:CC 33))]
-  ""
-  "@
-   icm\t%0,8,%S1
-   icmy\t%0,8,%S1"
-  [(set_attr "op_type" "RS,RSY")])
 
-(define_insn "*sethighhisi"
+(define_insn "*sethigh<mode>si"
   [(set (match_operand:SI 0 "register_operand" "=d,d")
-        (unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
+        (unspec:SI [(match_operand:HQI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
    (clobber (reg:CC 33))]
   ""
   "@
-   icm\t%0,12,%S1
-   icmy\t%0,12,%S1"
+   icm\t%0,<icm_hi>,%S1
+   icmy\t%0,<icm_hi>,%S1"
   [(set_attr "op_type" "RS,RSY")])
 
 (define_insn "*sethighqidi_64"