X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=blobdiff_plain;f=gcc%2FChangeLog;h=cb4e098696532537cf29b16ad74726fa4e466add;hp=a9513ed274c51aa5192b83c05bc0fad13f5f18ee;hb=11cc227f55cc657aa83852e7c3592db2a2e2d91b;hpb=1da85181d665c0def398c968a31ea6c578d2f716 diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a9513ed274c..cb4e0986965 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,215 @@ +2007-02-23 Steve Ellcey + + PR debug/29614 + * varpool.c (varpool_assemble_pending_decls): Set + varpool_last_needed_node to null. + +2007-02-23 DJ Delorie + + * config/i386/i386.c (ix86_data_alignment): Don't specify an + alignment bigger than the object file can handle. + +2007-02-23 Uros Bizjak + + PR target/30825 + * config/i386/i386.md (*movdi_1_rex64, zero_extendsidi2_32, + zero_extendsidi2_rex64): Penalize MMX register<->memory moves. + (*movsf_1): Penalize MMX moves. + +2007-02-23 Bernd Schmidt + + * config/bfin/bfin.md (doloop_end): Fail for loops that can iterate + 2^32-1 or more times unless flag_unsafe_loop_optimizations. + + * loop-iv.c (determine_max_iter): Moved in front of its sole user. + +2007-02-23 Kaveh R. Ghazi + + * builtins.c (fold_builtin_logb, fold_builtin_significand): New. + (fold_builtin_1): Use them. + * fold-const.c (tree_expr_nonnegative_warnv_p): Handle + BUILT_IN_SIGNIFICAND. + +2007-02-23 H.J. Lu + + * config/i386/i386.c (bdesc_1arg): Initialize + IX86_BUILTIN_MOVSHDUP and IX86_BUILTIN_MOVSLDUP with + "__builtin_ia32_movshdup" and "__builtin_ia32_movsldup". + (ix86_init_mmx_sse_builtins): Remove IX86_BUILTIN_MOVSHDUP + and IX86_BUILTIN_MOVSLDUP. + +2007-02-22 Paolo Bonzini + + PR rtl-optimization/30841 + * fwprop.c (propagate_rtx_1): Accept a VOIDmode replacement address. + +2007-02-22 Kaveh R. Ghazi + + * builtins.c (fold_builtin_frexp): New. + (fold_builtin_2): Use it. + +2007-02-22 Mark Mitchell + + * doc/invoke.texi (Spec Files): Document getenv spec function. + + * gcc.c (getenv_spec_function): New function. + (static_spec_functions): Add it. + * config/vxworks.h (VXWORKS_TARGET_DIR): Remove. + (VXWORKS_ADDITIONAL_CPP_SPEC): Use getenv to find the VxWorks + header files. + +2007-02-22 Michael Matz + + PR debug/30898 + * dwarf2out.c (concatn_mem_loc_descriptor): New static function. + (mem_loc_descriptor): Call it. + +2007-02-22 Zdenek Dvorak + Ira Rosen + + * tree-data-ref.c (ptr_ptr_may_alias_p): Take alias sets into account. + +2007-02-22 Ira Rosen + + PR tree-optimization/30843 + * tree-vect-transform.c (vect_transform_loop): Remove strided scalar + stores only after all the group is vectorized. + +2007-02-22 Dorit Nuzman + + PR tree-optimization/30858 + * tree-vectorizer.c (vect_is_simple_reduction): Check that the stmts + in the reduction cycle have a single use in the loop. + * tree-vectorizer.h (relevant): Add documentation. + +2007-02-20 Mike Stump + + * configure.ac (powerpc*-*-darwin*): #include . + * configure: Regenerate. + +2007-02-21 Trevor Smigiel + + Change the defaults of some parameters and options. + * config/spu/spu-protos.h (spu_optimization_options): Declare. + * config/spu/spu.c (spu_optimization_options): Add. + (spu_override_options): Change params in spu_optimization_options. + * config/spu/spu.h (OPTIMIZATION_OPTIONS): Define. + + Register 127 is only 16 byte aligned when used as a frame pointer. + * config/spu/spu-protos.h (spu_init_expanders): Declare. + * config/spu/spu.c (spu_expand_prologue): Set REGNO_POINTER_ALIGN for + HARD_FRAME_POINTER_REGNUM. + (spu_legitimate_address): Use regno_aligned_for_reload. + (regno_aligned_for_load): HARD_FRAME_POINTER_REGNUM is only 16 byte + aligned when frame_pointer_needed is true. + (spu_init_expanders): New. Set alignment of HARD_FRAME_POINTER_REGNUM + to 8 bits. + * config/spu/spu.h (INIT_EXPANDERS): Define. + + Make sure shift and rotate instructions have valid immediate operands. + * config/spu/predicates.md (spu_shift_operand): Remove. + * config/spu/spu.c (print_operand): Add [efghEFGH] modifiers. + * config/spu/constraints.md (W, O): Extend range. + * config/spu/spu.md (umask, nmask): Define. + (ashl3, ashldi3, ashlti3_imm, shlqbybi_ti, shlqbi_ti, shlqby_ti, + lshr3, rotm_, lshr3_imm, rotqmbybi_, + rotqmbi_, rotqmby_, ashr3, rotma_, + rotl3, rotlti3, rotqbybi_ti, rotqby_ti, rotqbi_ti): Use + spu_nonmem_operand instead of spu_shift_operands. Use new modifiers. + (lshr3_reg): Fix rtl description. + + Make sure mulhisi immediate operands are valid. + * config/spu/predicates.md (imm_K_operand): Add. + * config/spu/spu.md (mulhisi3_imm, umulhisi3_imm): Use imm_K_operand. + + Generate constants using fsmbi and andi. + * config/spu/spu.c (enum immediate_class): Add IC_FSMBI2. + (print_operand, spu_split_immediate, classify_immediate, + fsmbi_const_p): Handle IC_FSMBI2. + + Correctly handle a CONST_VECTOR containing symbols. + * config/spu/spu.c (print_operand): Handle HIGH correctly. + (spu_split_immediate): Split CONST_VECTORs with -mlarge-mem. + (immediate_load_p): Allow symbols that use 2 instructions to create. + (classify_immediate, spu_builtin_splats): Don't accept a CONST_VECTOR + with symbols when flag_pic is set. + (const_vector_immediate_p): New. + (logical_immediate_p, iohl_immediate_p, arith_immediate_p): Don't + accept a CONST_VECTOR with symbols. + (spu_legitimate_constant_p): Use const_vector_immediate_p. Don't + accept a CONST_VECTOR with symbols when flag_pic is set. Handle HIGH + correctly. + * config/spu/spu.md (high, low): Delete. + (low_): Define. + + Remove INTRmode and INTR_REGNUM, which didn't work. + * config/spu/spu.c (spu_conditional_register_usage): Remove reference + of INTR_REGNUM. + * config/spu/spu-builtins.md (spu_idisable, spu_ienable, set_intr, + set_intr_pic, set_intr_cc, set_intr_cc_pic, set_intr_return, unnamed + peephole2 pattern): Don't use INTR or 131. + (movintrcc): Delete. + * config/spu/spu.h (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, + CALL_USED_REGISTERS, REGISTER_NAMES, INTR_REGNUM): Remove INTR_REGNUM. + * config/spu/spu.md (UNSPEC_IDISABLE, UNSPEC_IENABLE): Remove. + (UNSPEC_SET_INTR): Add. + * config/spu/spu-modes.def (INTR): Remove. + + More accurate warnings about run-time relocations. + * config/spu/spu.c (reloc_diagnostic): Test in_section. + + Correctly warn about immediate arguments to specific intrinsics. + * config/spu/spu.c (spu_check_builtin_parm): Handle CONST_VECTORs. + (spu_expand_builtin_1): Call spu_check_builtin_parm before checking + the instruction predicate. + + Fix tree check errors with latest update. + * config/spu/spu.c (expand_builtin_args, spu_expand_builtin_1): Use + CALL_EXPR_ARG. + (spu_expand_builtin): Use CALL_EXPR_FN. + + Add missing specific intrinsics. + * config/spu/spu-builtins.def: Add si_bisled, si_bisledd and + si_bislede. + * config/spu/spu_internals.h: Ditto. + + Fix incorrect operand modifiers. + * config/spu/spu-builtins.md (spu_mpy, spu_mpyu): Remove use of %H. + * config/spu/spu.md (xor3): Change %S to %J. + + Optimize one case of zero_extend of a vec_select. + * config/spu/spu.md (_vec_extractv8hi_ze): Add. + + Accept any immediate for hbr. + * config/spu/spu.md (hbr): Change s constraints to i. + +2007-02-21 Paul Brook + + * config/arm/arm.c (thumb2_final_prescan_insn): Don't incrememnt + condexec_count when skipping USE and CLOBBER. + +2007-02-21 Nick Clifton + + * common.opt (Warray-bounds): Add Warning attribute. + (Wstrict-overflow, Wstrict-overflow=, Wcoverage-mismatch): + Likewise. + (fsized-zeroes): Add Optimization attribute. + (fsplit-wide-types, ftree-scev-cprop): Likewise. + * c.opt (Wc++0x-compat): Add Warning attribute. + +2007-02-21 Ulrich Weigand + + PR middle-end/30761 + * reload1.c (eliminate_regs_in_insn): In the single_set special + case, attempt to re-recognize the insn before falling back to + having reload fix it up. + 2007-02-20 Eric Christopher * config/frv/frv.c (frv_read_argument): Take a tree and int argument. @@ -88,7 +300,7 @@ intrinsics. 2007-02-20 Manuel Lopez-Ibanez - DJ Delorie + DJ Delorie PR other/30824 * diagnostic.c (diagnostic_count_diagnostic): Move -Werror logic to...