X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=blobdiff_plain;f=gcc%2FChangeLog;h=6c28aeb3be21ab8e33d1ab1ff3df4e1c7f715b31;hp=509477372bf69a2f7e009104b3f4422714d0c0cb;hb=d068eb52038d98bba46c142571e1274a90ae226a;hpb=b79917fdf0f9b8704985dff9b74bc34c0153df82 diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 509477372bf..6c28aeb3be2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,575 @@ +2009-05-30 Kai Tietz + + * config/i386/mingw-tls.c: New file. + * config/i386/t-gthr-win32 (LIB2FUNCS_EXTRA): Add + mingw-tls.c file. + * gthr-win32.h (MINGW32_SUPPORTS_MT_EH): Define + it for targets defining _WIN32 but not __CYGWIN__. + +2009-05-29 Kaveh R. Ghazi + + * configure.ac: Add MPC support. + + * config.in, configure: Regenerate. + +2009-05-29 Richard Henderson + + * cfgcleanup.c (try_crossjump_to_edge): Only skip past + NOTE_INSN_BASIC_BLOCK. + * cfglayout.c (duplicate_insn_chain): Copy epilogue insn marks. + Duplicate NOTE_INSN_EPILOGUE_BEG notes. + * cfgrtl.c (can_delete_note_p): Allow NOTE_INSN_EPILOGUE_BEG + to be deleted. + * dwarf2out.c (struct cfa_loc): Change indirect field to bitfield, + add in_use field. + (add_cfi): Disable check redefining cfa away from drap. + (lookup_cfa_1): Add remember argument; handle remember/restore. + (lookup_cfa): Pass remember argument. + (cfa_remember): New. + (compute_barrier_args_size_1): Remove sibcall check. + (dwarf2out_frame_debug_def_cfa): New. + (dwarf2out_frame_debug_adjust_cfa): New. + (dwarf2out_frame_debug_cfa_offset): New. + (dwarf2out_frame_debug_cfa_register): New. + (dwarf2out_frame_debug_cfa_restore): New. + (dwarf2out_frame_debug): Handle REG_CFA_* notes. + (dwarf2out_begin_epilogue): New. + (dwarf2out_frame_debug_restore_state): New. + (dw_cfi_oprnd1_desc): Handle DW_CFA_remember_state, + DW_CFA_restore_state. + (output_cfi_directive): Likewise. + (convert_cfa_to_fb_loc_list): Likewise. + (dw_cfi_oprnd1_desc): Handle DW_CFA_restore. + * dwarf2out.h: Update. + * emit-rtl.c (try_split): Don't split RTX_FRAME_RELATED_P. + (copy_insn_1): Early out for null. + * final.c (final_scan_insn): Call dwarf2out_begin_epilogue + and dwarf2out_frame_debug_restore_state. + * function.c (prologue, epilogue, sibcall_epilogue): Remove. + (prologue_insn_hash, epilogue_insn_hash): New. + (free_after_compilation): Adjust freeing accordingly. + (record_insns): Create hash table if needed; push insns into + hash instead of array. + (maybe_copy_epilogue_insn): New. + (contains): Search hash table instead of array. + (sibcall_epilogue_contains): Remove. + (thread_prologue_and_epilogue_insns): Split eh_return insns + and mark them as epilogues. + (reposition_prologue_and_epilogue_notes): Rewrite epilogue + scanning in terms of basic blocks. + * insn-notes.def (CFA_RESTORE_STATE): New. + * jump.c (returnjump_p_1): Accept EH_RETURN. + (eh_returnjump_p_1, eh_returnjump_p): New. + * reg-notes.def (CFA_DEF_CFA, CFA_ADJUST_CFA, CFA_OFFSET, + CFA_REGISTER, CFA_RESTORE): New. + * rtl.def (EH_RETURN): New. + * rtl.h (eh_returnjump_p, maybe_copy_epilogue_insn): Declare. + + * config/bfin/bfin.md (UNSPEC_VOLATILE_EH_RETURN): Remove. + (eh_return_internal): Use eh_return rtx; split w/ epilogue. + + * config/i386/i386.c (gen_push): Update cfa state. + (pro_epilogue_adjust_stack): Add set_cfa argument. When true, + add a CFA_ADJUST_CFA note. + (ix86_dwarf_handle_frame_unspec): Remove. + (ix86_expand_prologue): Update cfa state. + (ix86_emit_restore_reg_using_pop): New. + (ix86_emit_restore_regs_using_pop): New. + (ix86_emit_leave): New. + (ix86_emit_restore_regs_using_mov): Add CFA_RESTORE notes. + (ix86_expand_epilogue): Add notes for unwinding the epilogue. + * config/i386/i386.h (struct machine_cfa_state): New. + (ix86_cfa_state): New. + * config/i386/i386.md (UNSPEC_EH_RETURN): Remove. + (eh_return_internal): Merge from eh_return_, + use eh_return rtx, split w/ epilogue. + +2009-05-29 Ian Lance Taylor + + * builtins.c (validate_gimple_arglist): Don't use va_arg with + enum type. + * calls.c (emit_library_call_value_1): Likewise. + + * c-typeck.c (c_build_va_arg): New function. + * c-tree.h (c_build_va_arg): Declare. + * c-parser.c (c_parser_postfix_expression): Call c_build_va_arg + instead of build_va_arg. + +2009-05-29 Eric Botcazou + + * tree-ssa-loop-ivopts.c (strip_offset_1) : New case. + (force_expr_to_var_cost) : Likewise. + (ptr_difference_cost): Use affine combinations to compute it. + (difference_cost): Likewise. + (get_computation_cost_at): Compute more accurate cost for addresses + if the ratio is a multiplier allowed in addresses. + For non-addresses, consider that an additional offset or symbol is + added only once. + +2009-05-29 Jakub Jelinek + + * config/i386/i386.c (ix86_decompose_address): Avoid useless + 0 displacement. Add 0 displacement if base is %[er]bp or %r13. + + * config/i386/i386.md (prefix_data16, prefix_rep): Set to 0 for + TYPE_SSE{MULADD,4ARG,IADD1,CVT1} by default. + (prefix_rex): For UNIT_MMX don't imply the prefix by default + if MODE_DI. + (prefix_extra): Default to 2 for TYPE_SSE{MULADD,4ARG} and + to 1 for TYPE_SSE{IADD1,CVT1}. + (prefix_vex_imm8): Removed. + (length_vex): Only pass 1 as second argument to + ix86_attr_length_vex_default if prefix_extra is 0. + (modrm): For TYPE_INCDEC only set to 0 if not TARGET_64BIT. + (length): For prefix vex computation use length_immediate + attribute instead of prefix_vex_imm8. + (cmpqi_ext_3_insn, cmpqi_ext_3_insn_rex64, + addqi_ext_1, addqi_ext_1_rex64, *testqi_ext_0, andqi_ext_0, + *andqi_ext_0_cc, *iorqi_ext_0, *xorqi_ext_0, *xorqi_cc_ext_1, + *xorqi_cc_ext_1_rex64): Override modrm attribute to 1. + (extendsidi2_rex64, extendhidi2, extendqidi2, extendhisi2, + *extendhisi2_zext, extendqihi2, extendqisi2, *extendqisi2_zext): Emit + a space in between the operands. + (*anddi_1_rex64, *andsi_1): Likewise. Override prefix_rex to 1 + if one operand is 0xff and the other one si, di, bp or sp. + (*andhi_1): Override prefix_rex to 1 if one operand is 0xff and the + other one si, di, bp or sp. + (*btsq, *btrq, *btcq, *btdi_rex64, *btsi): Add mode attribute. + (*ffssi_1, *ffsdi_1, ctzsi2, ctzdi2): Add + type and mode attributes. + (*bsr, *bsr_rex64, *bsrhi): Add type attribute. + (*cmpfp_i_mixed, *cmpfp_iu_mixed): For TYPE_SSECOMI, clear + prefix_rep attribute and set prefix_data16 attribute iff MODE_DF. + (*cmpfp_i_sse, *cmpfp_iu_sse): Clear prefix_rep attribute and set + prefix_data16 attribute iff MODE_DF. + (*movsi_1): For TYPE_SSEMOV MODE_SI set prefix_data16 attribute. + (fix_truncdi_sse): Set prefix_rex attribute. + (*adddi_4_rex64, *addsi_4): Use const128_operand instead of + constm128_operand in length_immediate computation. + (*addhi_4): Likewise. Fix mode attribute to MODE_HI. + (anddi_1_rex64): Use movzbl/movzwl instead of movzbq/movzwq. + (*avx_ashlti3, sse2_ashlti3, *avx_lshrti3, sse2_lshrti3): Set + length_immediate attribute to 1. + (x86_fnstsw_1, x86_fnstcw_1, x86_fldcw_1): Fix length attribute. + (*movdi_1_rex64): Override prefix_rex or prefix_data16 attributes + for certain alternatives. + (*movdf_nointeger, *movdf_integer_rex64, *movdf_integer): Override + prefix_data16 attribute if MODE_V1DF. + (*avx_setcc, *sse_setcc, *sse5_setcc): Set + length_immediate to 1. + (set_got_rex64, set_rip_rex64): Remove length attribute, set + length_address to 4, set mode attribute to MODE_DI. + (set_got_offset_rex64): Likewise. Set length_immediate to 0. + (fxam2_i387): Set length attribute to 4. + (*prefetch_sse, *prefetch_sse_rex, *prefetch_3dnow, + *prefetch_3dnow_rex): Override length_address attribute. + (sse4_2_crc32): Override prefix_data16 and prefix_rex + attributes. + * config/i386/predicates.md (ext_QIreg_nomode_operand): New predicate. + (constm128_operand): Removed. + * config/i386/i386.c (memory_address_length): For + disp && !index && !base in 64-bit mode account for SIB byte if + print_operand_address can't optimize disp32 into disp32(%rip) + and UNSPEC doesn't imply (%rip) addressing. Add 1 to length + for fs: or gs: segment. + (ix86_attr_length_immediate_default): When checking if shortform + is possible, truncate immediate to the length of the non-shortened + immediate. + (ix86_attr_length_address_default): Ignore MEM_P operands + with X constraint. + (ix86_attr_length_vex_default): Only check for DImode on + GENERAL_REG_P operands. + * config/i386/sse.md (_comi, _ucomi): Clear + prefix_rep attribute, set prefix_data16 attribute iff MODE_DF. + (sse_cvttps2pi): Clear prefix_rep attribute. + (sse2_cvttps2dq, *sse2_cvtpd2dq, sse2_cvtps2pd): Clear prefix_data16 + attribute. + (*sse2_cvttpd2dq): Don't clear prefix_rep attribute. + (*avx_ashr3, ashr3, *avx_lshr3, lshr3, + *avx_ashl3, ashl3): Set length_immediate attribute to 1 + iff operand 2 is const_int_operand. + (*vec_dupv4si, avx_shufpd256_1, *avx_shufpd_, + sse2_shufpd_): Set length_immediate attribute to 1. + (sse2_pshufd_1): Likewise. Set prefix attribute to maybe_vex + instead of vex. + (sse2_pshuflw_1, sse2_pshufhw_1): Set length_immediate to 1 and clear + prefix_data16. + (sse2_unpckhpd, sse2_unpcklpd, sse2_storehpd, *vec_concatv2df): Set + prefix_data16 attribute for movlpd and movhpd instructions. + (sse2_loadhpd, sse2_loadlpd, sse2_movsd): Likewise. Override + length_immediate for shufpd instruction. + (sse2_movntsi, sse3_lddqu): Clear prefix_data16 attribute. + (avx_cmpp3, + avx_cmps3, *avx_maskcmp3, + _maskcmp3, _vmmaskcmp3, + avx_shufps256_1, *avx_shufps_, sse_shufps_, + *vec_dupv4sf_avx, *vec_dupv4sf): Set + length_immediate attribute to 1. + (*avx_cvtsi2ssq, *avx_cvtsi2sdq): Set length_vex attribute to 4. + (sse_cvtsi2ssq, sse2_cvtsi2sdq): Set prefix_rex attribute to 1. + (sse2_cvtpi2pd, sse_loadlps, sse2_storelpd): Override + prefix_data16 attribute for the first alternative to 1. + (*avx_loadlps): Override length_immediate for the first alternative. + (*vec_concatv2sf_avx): Override length_immediate and prefix_extra + attributes for second alternative. + (*vec_concatv2sf_sse4_1): Override length_immediate and + prefix_data16 attributes for second alternative. + (*vec_setv4sf_avx, *avx_insertps, vec_extract_lo_, + vec_extract_hi_, vec_extract_lo_v16hi, + vec_extract_hi_v16hi, vec_extract_lo_v32qi, + vec_extract_hi_v32qi): Set prefix_extra and length_immediate to 1. + (*vec_setv4sf_sse4_1, sse4_1_insertps, *sse4_1_extractps): Set + prefix_data16 and length_immediate to 1. + (*avx_mulv2siv2di3, *avx_mulv4si3, sse4_2_gtv2di3): Set prefix_extra + to 1. + (*avx_3, *avx_eq3, *avx_gt3): Set + prefix_extra attribute for variants that don't have 0f prefix + alone. + (*avx_pinsr): Likewise. Set length_immediate to 1. + (*sse4_1_pinsrb, *sse2_pinsrw, *sse4_1_pinsrd, *sse4_1_pextrb, + *sse4_1_pextrb_memory, *sse2_pextrw, *sse4_1_pextrw_memory, + *sse4_1_pextrd): Set length_immediate to 1. + (*sse4_1_pinsrd): Likewise. Set prefix_extra to 1. + (*sse4_1_pinsrq, *sse4_1_pextrq): Set prefix_rex and length_immediate + to 1. + (*vec_extractv2di_1_rex64_avx, *vec_extractv2di_1_rex64, + *vec_extractv2di_1_avx, *vec_extractv2di_1_sse2): Override + length_immediate to 1 for second alternative. + (*vec_concatv2si_avx, *vec_concatv2di_rex64_avx): Override + prefix_extra and length_immediate attributes for the first + alternative. + (vec_concatv2si_sse4_1): Override length_immediate to 1 for the + first alternative. + (*vec_concatv2di_rex64_sse4_1): Likewise. Override prefix_rex + to 1 for the first and third alternative. + (*vec_concatv2di_rex64_sse): Override prefix_rex to 1 for the second + alternative. + (*sse2_maskmovdqu, *sse2_maskmovdqu_rex64): Override length_vex + attribute. + (*sse_sfence, sse2_mfence, sse2_lfence): Override length_address + attribute to 0. + (*avx_phaddwv8hi3, *avx_phadddv4si3, *avx_phaddswv8hi3, + *avx_phsubwv8hi3, *avx_phsubdv4si3, *avx_phsubswv8hi, + *avx_pmaddubsw128, *avx_pmulhrswv8hi3, *avx_pshufbv16qi3, + *avx_psign3): Set prefix_extra attribute to 1. + (ssse3_phaddwv4hi3, ssse3_phadddv2si3, ssse3_phaddswv4hi3, + ssse3_phsubwv4hi3, ssse3_phsubdv2si3, ssse3_phsubswv4hi3, + ssse3_pmaddubsw, *ssse3_pmulhrswv4hi, ssse3_pshufbv8qi3, + ssse3_psign3): Override prefix_rex attribute. + (*avx_palignrti): Override prefix_extra and length_immediate + to 1. + (ssse3_palignrti): Override length_immediate to 1. + (ssse3_palignrdi): Override length_immediate to 1, override + prefix_rex attribute. + (abs2): Override prefix_rep to 0, override prefix_rex + attribute. + (sse4a_extrqi): Override length_immediate to 2. + (sse4a_insertqi): Likewise. Override prefix_data16 to 0. + (sse4a_insertq): Override prefix_data16 to 0. + (avx_blendp, + avx_blendvp, + avx_dpp, *avx_mpsadbw, + *avx_pblendvb, *avx_pblendw, avx_roundp256, + avx_rounds256): Override prefix_extra + and length_immediate to 1. + (sse4_1_blendp, sse4_1_dpp, + sse4_2_pcmpestr, sse4_2_pcmpestri, sse4_2_pcmpestrm, + sse4_2_pcmpestr_cconly, sse4_2_pcmpistr, sse4_2_pcmpistri, + sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Override prefix_data16 + and length_immediate to 1. + (sse4_1_blendvp): Override prefix_data16 to 1. + (sse4_1_mpsadbw, sse4_1_pblendw): Override length_immediate to 1. + (*avx_packusdw, avx_vtestp, + avx_ptest256): Override prefix_extra to 1. + (sse4_1_roundp, sse4_1_rounds): + Override prefix_data16 and length_immediate to 1. + (sse5_pperm_zero_v16qi_v8hi, sse5_pperm_sign_v16qi_v8hi, + sse5_pperm_zero_v8hi_v4si, sse5_pperm_sign_v8hi_v4si, + sse5_pperm_zero_v4si_v2di, sse5_pperm_sign_v4si_v2di, + sse5_vrotl3, sse5_ashl3, sse5_lshl3): Override + prefix_data16 to 0 and prefix_extra to 2. + (sse5_rotl3, sse5_rotr3): Override length_immediate to 1. + (sse5_frcz2, sse5_vmfrcz2): Don't override prefix_extra + attribute. + (*sse5_vmmaskcmp3, sse5_com_tf3, + sse5_maskcmp3, sse5_maskcmp3, sse5_maskcmp_uns3): + Override prefix_data16 and prefix_rep to 0, length_immediate to 1 + and prefix_extra to 2. + (sse5_maskcmp_uns23, sse5_pcom_tf3): Override + prefix_data16 to 0, length_immediate to 1 and prefix_extra to 2. + (*avx_aesenc, *avx_aesenclast, *avx_aesdec, *avx_aesdeclast, + avx_vpermilvar3, + avx_vbroadcasts, + avx_vbroadcastss256, avx_vbroadcastf128_p256, + avx_maskloadp, + avx_maskstorep): + Override prefix_extra to 1. + (aeskeygenassist, pclmulqdq): Override length_immediate to 1. + (*vpclmulqdq, avx_vpermil, avx_vperm2f1283, + vec_set_lo_, vec_set_hi_, vec_set_lo_v16hi, + vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Override + prefix_extra and length_immediate to 1. + (*avx_vzeroall, avx_vzeroupper, avx_vzeroupper_rex64): Override + modrm to 0. + (*vec_concat_avx): Override prefix_extra and length_immediate + to 1 for the first alternative. + * config/i386/mmx.md (*mov_internal_rex64): Override + prefix_rep, prefix_data16 and/or prefix_rex attributes in certain + cases. + (*mov_internal_avx, *movv2sf_internal_rex64, + *movv2sf_internal_avx, *movv2sf_internal): Override + prefix_rep attribute for certain alternatives. + (*mov_internal): Override prefix_rep or prefix_data16 + attributes for certain alternatives. + (*movv2sf_internal_rex64_avx): Override prefix_rep and length_vex + attributes for certain alternatives. + (*mmx_addv2sf3, *mmx_subv2sf3, *mmx_mulv2sf3, + *mmx_v2sf3_finite, *mmx_v2sf3, mmx_rcpv2sf2, + mmx_rcpit1v2sf3, mmx_rcpit2v2sf3, mmx_rsqrtv2sf2, mmx_rsqit1v2sf3, + mmx_haddv2sf3, mmx_hsubv2sf3, mmx_addsubv2sf3, + *mmx_eqv2sf3, mmx_gtv2sf3, mmx_gev2sf3, mmx_pf2id, mmx_pf2iw, + mmx_pi2fw, mmx_floatv2si2, mmx_pswapdv2sf2, *mmx_pmulhrwv4hi3, + mmx_pswapdv2si2): Set prefix_extra attribute to 1. + (mmx_ashr3, mmx_lshr3, mmx_ashl3): Set + length_immediate to 1 if operand 2 is const_int_operand. + (*mmx_pinsrw, mmx_pextrw, mmx_pshufw_1, *vec_dupv4hi, + *vec_extractv2si_1): Set length_immediate + attribute to 1. + (*mmx_uavgv8qi3): Override prefix_extra attribute to 1 if + using old 3DNOW insn rather than SSE/3DNOW_A. + (mmx_emms, mmx_femms): Clear modrm attribute. + +2009-05-29 Martin Jambor + + * tree-sra.c: New implementation of SRA. + + * params.def (PARAM_SRA_MAX_STRUCTURE_SIZE): Removed. + (PARAM_SRA_MAX_STRUCTURE_COUNT): Removed. + (PARAM_SRA_FIELD_STRUCTURE_RATIO): Removed. + * params.h (SRA_MAX_STRUCTURE_SIZE): Removed. + (SRA_MAX_STRUCTURE_COUNT): Removed. + (SRA_FIELD_STRUCTURE_RATIO): Removed. + * doc/invoke.texi (sra-max-structure-size): Removed. + (sra-field-structure-ratio): Removed. + +2009-05-29 Jakub Jelinek + + PR middle-end/40291 + * builtins.c (expand_builtin_memcmp): Convert len to sizetype + before expansion. + +2009-05-29 Andrey Belevantsev + + PR rtl-optimization/40101 + * sel-sched-ir.c (get_seqno_by_preds): Allow returning negative + seqno. Adjust comment. + * sel-sched.c (find_seqno_for_bookkeeping): Assert that when + inserting bookkeeping before a jump, the jump is not scheduled. + When no positive seqno found, provide a value. Add comment. + +2009-05-29 Richard Guenther + + * tree-ssa-alias.c (nonaliasing_component_refs_p): Remove + short-cutting on the first component. + +2009-05-29 Jakub Jelinek + + PR middle-end/39958 + * omp-low.c (scan_omp_1_op): Call remap_type on TREE_TYPE + for trees other than decls/types. + +2009-05-29 Richard Guenther + + * tree-ssa-operands.c (get_expr_operands): Do not handle + INDIRECT_REFs in the handled-component case. Remove + unused get_ref_base_and_extent case. + * tree-dfa.c (get_ref_base_and_extent): Avoid calling + tree_low_cst and host_integerp where possible. + * tree-ssa-structalias.c (equiv_class_label_eq): Check hash + codes for equivalence. + * dce.c (find_call_stack_args): Avoid redundant bitmap queries. + +2009-05-29 David Billinghurst + + * config.gcc: Add i386/t-fprules-softfp and soft-fp/t-softfp + to tmake_file for i[34567]86-*-cygwin*. + +2009-05-29 Jakub Jelinek + + PR target/40017 + * config/rs6000/rs6000-c.c (_Bool_keyword): New variable. + (altivec_categorize_keyword, init_vector_keywords, + rs6000_cpu_cpp_builtins): Define _Bool as conditional macro + similar to bool. + +2009-05-29 Kai Tietz + + * tree.c (handle_dll_attribute): Check if node is + of kind FUNCTION_DECL for DECL_DECLARED_INLINE_P check. + +2009-05-29 Richard Earnshaw + + * config/arm/thumb2.md (thumb2_zero_extendsidi2): Add a split + component. + (thumb2_zero_extendqidi2): Likewise. + +2009-05-28 Kaz Kojima + + * config/sh/sh.c (sh_expand_t_scc): Use gen_xorsi3_movrt + instead of gen_movrt. + * config/sh/sh.md (movrt): Remove. + +2009-05-28 Steve Ellcey + + * doc/invoke.texi (IA-64 Options) + Add -msdata, -mfused-madd, -mno-inline-float-divide, + -mno-inline-int-divide, -mno-inline-sqrt, -msched-spec-ldc, + -msched-spec-control-ldc, -msched-prefer-non-data-spec-insns, + -msched-prefer-non-control-spec-insns, + -msched-stop-bits-after-every-cycle, + -msched-count-spec-in-critical-path, + -msel-sched-dont-check-control-spec, -msched-fp-mem-deps-zero-cost + -msched-max-memory-insns-hard-limit, -msched-max-memory-insns + Remove -mt, -pthread, -msched-ldc, -mno-sched-control-ldc, + and -msched-spec-verbose. + +2009-05-28 Joseph Myers + + * config/arm/lib1funcs.asm (__clear_cache): Define if + L_clear_cache. + * config/arm/linux-eabi.h (CLEAR_INSN_CACHE): Define to give an + error if used. + * config/arm/t-linux-eabi (LIB1ASMFUNCS): Add _clear_cache. + +2009-05-28 Richard Guenther + + * tree-ssa-alias.c (ao_ref_init): New function. + (ao_ref_base): Likewise. + (ao_ref_base_alias_set): Likewise. + (ao_ref_alias_set): Likewise. + (refs_may_alias_p_1): Change signature. + (refs_may_alias_p): Adjust. + (refs_anti_dependent_p): Likewise. + (refs_output_dependent_p): Likewise. + (call_may_clobber_ref_p_1): Change signature. + (call_may_clobber_ref_p): Adjust. + (stmt_may_clobber_ref_p_1): New function split out from ... + (stmt_may_clobber_ref_p): ... here. + (maybe_skip_until): Adjust signature. + (get_continuation_for_phi): Likewise. + (walk_non_aliased_vuses): Likewise. + * tree-ssa-alias.h (struct ao_ref_s): New structure type. + (ao_ref_init): Declare. + (ao_ref_base): Likewise. + (ao_ref_alias_set): Likewise. + (stmt_may_clobber_ref_p_1): Likewise. + (walk_non_aliased_vuses): Adjust. + * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): New function. + (get_ref_from_reference_ops): remove. + (vn_reference_lookup_2): Adjust signature. + (vn_reference_lookup_3): Do not re-build trees. Handle unions. + (vn_reference_lookup_pieces): Adjust signature, do not re-build + trees. + (vn_reference_lookup): Adjust. + (vn_reference_insert): Likewise. + (vn_reference_insert_pieces): Adjust signature. + (visit_reference_op_call): Adjust. + * tree-ssa-pre.c (get_expr_type): Simplify. + (phi_translate_1): Adjust. + (compute_avail): Likewise. + (translate_vuse_through_block): Do not re-build trees. + (value_dies_in_block_x): Likewise. + * tree-ssa-sccvn.h (struct vn_reference_s): Add type and alias-set + fields. + (vn_reference_lookup_pieces): Adjust declaration. + (vn_reference_insert_pieces): Likewise. + +2009-05-28 Benjamin Kosnik + + * tree-ssa-copy.c (replace_exp_1): Move op for warning-free use + with checking disabled. + +2009-05-28 Dave Korn + + PR target/37216 + + * configure.ac (HAVE_GAS_ALIGNED_COMM): Add autoconf test and + macro definition for support of three-operand format aligned + .comm directive in assembler on cygwin/pe/mingw target OS. + * configure: Regenerate. + * config.h: Regenerate. + + * config/i386/winnt.c (i386_pe_asm_output_aligned_decl_common): Use + aligned form of .comm directive if -mpe-aligned-commons is in effect. + * config/i386/cygming.opt (-mpe-aligned-commons): Add new option. + + * doc/invoke.texi (-mpe-aligned-commons): Document new target option. + * doc/tm.texi (ASM_OUTPUT_COMMON): Document zero size commons. + +2009-05-28 Ira Rosen + + PR tree-optimization/40254 + * tree-data-ref.c (dr_analyze_innermost): Take POFFSET into account + in analysis of basic blocks. + +2009-05-28 Adam Nemet + + PR middle-end/33699 + * target.h (struct gcc_target): Fix indentation. Add + const_anchor. + * target-def.h (TARGET_CONST_ANCHOR): New macro. + (TARGET_INITIALIZER): Use it. + * cse.c (CHEAPER): Move it up to the other macros. + (insert): Rename this ... + (insert_with_costs): ... to this. Add cost parameters. Update + function comment. + (insert): New function. Call insert_with_costs. + (compute_const_anchors, insert_const_anchor, insert_const_anchors, + find_reg_offset_for_const, try_const_anchors): New functions. + (cse_insn): Call try_const_anchors. Adjust cost of src_related + when using a const-anchor. Call insert_const_anchors. + * config/mips/mips.c (mips_set_mips16_mode): Set + targetm.const_anchor. + * doc/tm.texi (Misc): Document TARGET_CONST_ANCHOR. + +2009-05-28 Alexandre Oliva + + * tree-inline.c (remap_decls): Enable nonlocalized variables + when not optimizing. + +2009-05-28 Alexandre Oliva + + * tree-ssa-live.c (remove_unused_locals): Skip when not optimizing. + Simplify other tests involving optimize. + +2009-05-27 Tom Tromey + + * unwind-dw2.c (_Unwind_DebugHook): New function. + (uw_install_context): Call _Unwind_DebugHook. + +2009-05-27 Tom Tromey + + * system.h (CONST_CAST2): Use C++ const_cast when compiled as C++ + +2009-05-27 Ian Lance Taylor + + * Makefile.in (LINKER, LINKER_FLAGS): Define. + (LINKER_FOR_BUILD, BUILD_LINKERFLAGS): Define. + (ALL_LINKERFLAGS): Define. + (xgcc$(exeext)): Change $(COMPILER) to $(LINKER). + (cpp$(exeext), cc1-dummy$(exeext), cc1$(exeext)): Likewise. + (collect2$(exeext), mips-tfile, mips-tdump): Likewise. + (gcov$(exeext), gcov-dump$(exeext)): Likewise. + (build/gen%$(build_exeext)): Change $(COMPILER_FOR_BUILD) to + $(LINKER_FOR_BUILD). + (build/gcov-iov$(build_exeext)): Likewise. + +2009-05-27 Julian Brown + + * gcse.c (target.h): Include. + (can_assign_to_reg_without_clobbers_p): Check that the target allows + copy of argument to a pseudo register. + 2009-05-27 Diego Novillo * tree-ssa-live.c (dump_scope_block): Document arguments. @@ -9,7 +581,7 @@ * doc/contrib.texi (Contributors): add myself to the list. -2009-05-28 Olivier Hainque +2009-05-27 Olivier Hainque * expr.c (target_align): New function. Alignment the TARGET of an assignment may be assume to have.