X-Git-Url: http://git.sourceforge.jp/view?p=pf3gnuchains%2Fgcc-fork.git;a=blobdiff_plain;f=gcc%2FChangeLog;h=2f6520faa3b4a975bdfb2420f00b338006ffa8e5;hp=c02cd4b02b04b6a15355a52e6b6cb5a6e3f25542;hb=eb46b0b619e7f7d4fa2616d325aa930ff1843c9a;hpb=6373f472be42dc3d8e424a951b40ef90f61e54d2 diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c02cd4b02b0..2f6520faa3b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,1082 @@ +2007-09-15 John David Anglin + + PR target/33062 + * pa.c (function_value): Use GET_MODE_BITSIZE instead of TYPE_PRECISION. + +2007-09-15 Dorit Nuzman + + * tree-vect-transform.c (vect_get_vec_defs_for_stmt_copy): check if + the VEC is not NULL. + (vectorizable_type_demotion, vectorizable_type_promotion): Check that + get_vectype_for_scalar_type succeeded. + (vectorizable_conversion): Likewise. + +2007-09-14 Jan Hubicka + + * config/i386/i386.md (*floatdi2_i387): Guard against + TARGET_64BIT. + +2007-09-14 Uros Bizjak + + PR target/33438 + * config/i386/i386.md (fmodxf3): Copy operands[2] to temporary register + when operands[2] equals operands[1]. + (remainderxf3): Ditto. + +2007-09-14 Sandra Loosemore + Nigel Stephens + + * doc/tm.texi (LIBGCC2_UNWIND_ATTRIBUTE): Document. + * unwind-generic.h (LIBGCC2_UNWIND_ATTRIBUTE): Define. + (_Unwind_RaiseException): Add LIBGCC2_UNWIND_ATTRIBUTE to + declaration. + (_Unwind_ForcedUnwind): Likewise. + (_Unwind_Resume): Likewise. + (_Unwind_Resume_or_Rethrow): Likewise. + (_Unwind_Backtrace): Likewise. + (_Unwind_SjLj_RaiseException): Likewise. + (_Unwind_SjLj_ForcedUnwind): Likewise. + (_Unwind_SjLj_Resume): Likewise. + (_Unwind_SjLj_Resume_or_Rethrow): Likewise. + * unwind.inc (_Unwind_RaiseException): Add LIBGCC2_UNWIND_ATTRIBUTE + to definition. + (_Unwind_ForcedUnwind): Likewise. + (_Unwind_Resume): Likewise. + (_Unwind_Resume_or_Rethrow): Likewise. + (_Unwind_Backtrace): Likewise. + * unwind-compat.c (_Unwind_Backtrace): Likewise. + (_Unwind_ForcedUnwind): Likewise. + (_Unwind_RaiseException): Likewise. + (_Unwind_Resume): Likewise. + (_Unwind_Resume_or_Rethrow): Likewise. + + * config/mips/mips.h (LIBGCC2_UNWIND_ATTRIBUTE): Define to force + nomips16 mode when IN_LIBGCC2 with hard float. + +2007-09-14 Richard Sandiford + + * config/mips/sdemtk.opt: Update to GPLv3. + * config/mips/sdemtk.h: Likewise. + +2007-09-14 Nigel Stephens + + * config.gcc (mips*-*-linux*): Recognise mipsisa32r2 and set + MIPS_ISA_DEFAULT appropriately. Don't make soft-float the default + for mipsisa32-*-linux*. + +2007-09-14 Nigel Stephens + David Ung + Thiemo Seufer + Richard Sandiford + + * config.gcc (mips*-sde-elf*): Add support for the SDE C libraries. + * configure.ac: Add a mipssde threading type. + * configure: Regenerate. + * config/mips/sdemtk.h: New file. + * config/mips/t-sdemtk: Likewise. + * config/mips/sdemtk.opt: Likewise. + * gthr-mipssde.h: Likewise. + * config/mips/sde.h (FUNCTION_PROFILER): Move to config/mips/sdemtk.h. + * config/mips/mips.h (MIPS_SAVE_REG_FOR_PROFILING_P): New macro. + (MIPS_ICACHE_SYNC): New macro, split from ... + * config/mips/mips.md (clear_cache): ...here. + * config/mips/mips.c (mips_save_reg_p): Check + MIPS_SAVE_REG_FOR_PROFILING_P on profiled functions. + (build_mips16_function_stub): Use targetm.strip_name_encoding. + (build_mips16_call_stub): Likewise. + +2007-09-14 Richard Sandiford + + * Makefile.in (stmp-int-hdrs): Depend on fixinc_list. + +2007-09-14 Jakub Jelinek + + PR target/32337 + * config/ia64/ia64.c (find_gr_spill): Don't decrement + current_frame_info.n_local_regs. Don't return emitted local + regs. + (ia64_compute_frame_size): Improve unwind hack to put + RP, PFS, FP in that order by allowing some of the registers + been already emitted, as long as they are emitted to the + desired register. + +2007-09-14 Ulrich Weigand + + * config/spu/vmx2spu.h (vec_extract, vec_insert, vec_lvlx, + vec_lvlxl, vec_lvrx, vec_lvrxl, vec_promote, vec_splats, + vec_stvlx, vec_stvlxl, vec_stvrx, vec_stvrxl): New intrinsics. + +2007-09-13 Eric Christopher + Kenneth Zadeck + + * dse.c (find_shift_sequence): New function. + (replace_read): Add case to remove read if it requires shift. + * config/i386/i386.c (ix86_expand_prologue): Fixed typo in comment. + +2007-09-13 Tom Tromey + + * c-common.c (fname_as_string): Update. + * c-parser.c (c_parser) : New field. + (c_lex_one_token): Update. Add 'parser' argument. + (c_parser_simple_asm_expr): Update. + (c_parser_attributes): Update. + (c_parser_asm_statement): Update. + (c_parser_asm_operands): Update. + (c_parser_peek_token): Update. + (c_parser_peek_2nd_token): Update. + * c-lex.c (c_lex_string_translate): Remove. + (c_lex_return_raw_strings): Likewise. + (c_lex_with_flags): Added 'lex_flags' argument. + (lex_string): Added 'translate' argument. + * c-pragma.h (c_lex_with_flags): Update. + (c_lex_string_translate, c_lex_return_raw_strings): Remove. + (C_LEX_STRING_NO_TRANSLATE): New define. + (C_LEX_RAW_STRINGS): Likewise. + +2007-09-13 Bernd Schmidt + + From Jie Zhang: + * config/bfin/bfin.c (enum bfin_builtins): Add BFIN_BUILTIN_ONES, + BFIN_BUILTIN_CPLX_MUL_16_S40, BFIN_BUILTIN_CPLX_MAC_16_S40, + BFIN_BUILTIN_CPLX_MSU_16_S40, and BFIN_BUILTIN_CPLX_SQU. + (bfin_init_builtins): Initialize __builtin_bfin_ones, + __builtin_bfin_min_fr1x16, __builtin_bfin_max_fr1x16, + __builtin_bfin_min_fr1x32, __builtin_bfin_max_fr1x32, + __builtin_bfin_cmplx_add, __builtin_bfin_cmplx_sub, + __builtin_bfin_cmplx_mul_s40, __builtin_bfin_cmplx_mac_s40, + __builtin_bfin_cmplx_msu_s40 and __builtin_bfin_csqu_fr16. + (bdesc_1arg): Add __builtin_bfin_ones. + (bfin_expand_builtin): Expand __builtin_bfin_cmplx_mul_s40, + __builtin_bfin_cmplx_mac_s40, __builtin_bfin_cmplx_msu_s40, + and __builtin_bfin_csqu_fr16. + * config/bfin/bfin.md (UNSPEC_ONES): New constant. + (ones): New define_insn. + (ssaddhi3_parts): New define_insn. + (sssubhi3_parts): New define_insn. + (flag_mulhi_parts): New define_insn. + +2007-09-13 Seongbae Park + + * common.opt (femit-class-debug-always): Turn off by default. + +2007-09-13 Bernd Schmidt + + * config/bfin/bfin.md (reload_outpdi, reload_inpdi): New patterns. + * config/bfin/bfin.c (bfin_secondary_reload): Make sure we use them. + +2007-09-13 James E. Wilson + + PR tree-optimization/33389 + * tree-ssa-operands.c (append_vuse): If ann->in_vdef_list true, + then set build_loads before returning. + +2007-09-13 Sandra Loosemore + David Ung + + * config/mips/mips.h (ASM_OUTPUT_REG_PUSH): Replace {d}subu with + {d}addiu and a negative immediate such that it works with MIPS16 + instructions. + +2007-09-13 H.J. Lu + + PR bootstrap/33418 + * configure.ac (ld_vers): Support Linux linker. + * configure: Regenerated. + +2007-09-13 Richard Sandiford + Sandra Loosemore + + * config/mips/mips.h (SYMBOL_FLAG_MIPS16_FUNC): Delete. + (SYMBOL_REF_MIPS16_FUNC_P): Delete. + * config/mips/mips.c (mips_attribute_table): Turn mips16 and + nomips16 into decl attributes. + (TARGET_INSERT_ATTRIBUTES): Override. + (TARGET_MERGE_DECL_ATTRIBUTES): Likewise. + (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Always return true. + (mips_mips16_type_p, mips_nomips16_type_p): Delete in favor of... + (mips_mips16_decl_p, mips_nomips16_decl_p): ...these new functions. + (mips_comp_type_attributes): Remove mips16 and nomips16 handling. + (mips_use_mips16_mode_p): Reimplement as a function that takes + a decl and considers only decl attributes. If the decl is nested + function, use its parent attributes. + (mips_function_ok_for_sibcall): Use mips_use_mips16_mode_p + instead of SYMBOL_REF_MIPS16_FUNC_P. + (mips_set_mips16_mode): Move call to sorry here from old + mips_use_mips16_mode_p. + (mflip_mips16_entry): New structure. + (mflip_mips16_htab): New variable. + (mflip_mips16_htab_hash, mflip_mips16_htab_eq): New functions. + (mflip_mips16_use_mips16_p, mips_insert_attributes): Likewise. + (mips_merge_decl_attributes): New function. + (mips_set_current_function): Reinstate call to mips_set_mips16_mode. + Use mips_use_mips16_mode_p. + (mips_output_mi_thunk): Use mips_use_mips16_mode_p instead of + SYMBOL_REF_MIPS16_FUNC_P. + (mips_encode_section_info): Don't set SYMBOL_FLAG_MIPS16_FUNC. + +2007-09-13 Richard Sandiford + + * c-parser.c (c_parser_struct_declaration): Check for a null return. + +2007-09-13 Francois-Xavier Coudert + + PR driver/33309 + * gcc.c (xputenv): Make argument const, and use CONST_CAST. + +2007-09-12 Michael Meissner + Dwarakanath Rajagopal + Tony Linthicum + + * tree.h (function_args_iterator): New type to iterate over + function arguments. + (FOREACH_FUNCTION_ARGS_PTR): Iterator macros for iterating over + function arguments providing a pointer to the argument. + (FOREACH_FUNCTION_ARGS): Iterator macros for iterating over + function arguments providing the argument. + (function_args_iter_init): Inline function to initialize + function_args_iterator. + (function_args_iter_cond_ptr): Inline function to return the next + pointer to hold the argument. + (function_args_iter_cond): Inline function to return the next + argument. + (function_args_iter_cond_next): Advance the function args + iterator. + (stdarg_p): New function, return true if variable argument + function. + (prototype_p): New function, return true if function is + prototyped. + (function_args_count): New function, count the number of arguments + of a function. + + * tree.c (stdarg_p): New function, return true if variable + argument function. + (prototype_p): New function, return true if function is + prototyped. + + * config/i386/i386.h (TARGET_SSE5): New macro for SSE5. + (TARGET_ROUND): New macro for the round/ptest instructions which + are shared between SSE4.1 and SSE5. + (OPTION_MASK_ISA_ROUND): Ditto. + (OPTION_ISA_ROUND): Ditto. + (TARGET_FUSED_MADD): New macro for -mfused-madd swtich. + (TARGET_CPU_CPP_BUILTINS): Add SSE5 support. + + * config/i386/i386.opt (-msse5): New switch for SSE5 support. + (-mfused-madd): New switch to give users control over whether the + compiler optimizes to use the multiply/add SSE5 instructions. + + * config/i386/i386.c (m_AMD_MULTIPLE): Rename from + m_ATHLON_K8_AMDFAM10, and change all uses. + (enum pta_flags): Add PTA_SSE5. + (ix86_handle_option): Turn off 3dnow if -msse5. + (override_options): Add SSE5 support. + (print_operand): %Y prints comparison codes for SSE5 com/pcom + instructions. + (ix86_expand_sse_movcc): Add SSE5 support. + (ix86_expand_sse5_unpack): New function to use pperm to unpack a + vector type to the next largest size. + (ix86_expand_sse5_pack): New function to use pperm to pack a + vector type to the next smallest size. + (IX86_BUILTIN_FMADDSS): New for SSE5 intrinsic. + (IX86_BUILTIN_FMADDSD): Ditto. + (IX86_BUILTIN_FMADDPS): Ditto. + (IX86_BUILTIN_FMADDPD): Ditto. + (IX86_BUILTIN_FMSUBSS): Ditto. + (IX86_BUILTIN_FMSUBSD): Ditto. + (IX86_BUILTIN_FMSUBPS): Ditto. + (IX86_BUILTIN_FMSUBPD): Ditto. + (IX86_BUILTIN_FNMADDSS): Ditto. + (IX86_BUILTIN_FNMADDSD): Ditto. + (IX86_BUILTIN_FNMADDPS): Ditto. + (IX86_BUILTIN_FNMADDPD): Ditto. + (IX86_BUILTIN_FNMSUBSS): Ditto. + (IX86_BUILTIN_FNMSUBSD): Ditto. + (IX86_BUILTIN_FNMSUBPS): Ditto. + (IX86_BUILTIN_FNMSUBPD): Ditto. + (IX86_BUILTIN_PCMOV_V2DI): Ditto. + (IX86_BUILTIN_PCMOV_V4SI): Ditto. + (IX86_BUILTIN_PCMOV_V8HI): Ditto. + (IX86_BUILTIN_PCMOV_V16QI): Ditto. + (IX86_BUILTIN_PCMOV_V4SF): Ditto. + (IX86_BUILTIN_PCMOV_V2DF): Ditto. + (IX86_BUILTIN_PPERM): Ditto. + (IX86_BUILTIN_PERMPS): Ditto. + (IX86_BUILTIN_PERMPD): Ditto. + (IX86_BUILTIN_PMACSSWW): Ditto. + (IX86_BUILTIN_PMACSWW): Ditto. + (IX86_BUILTIN_PMACSSWD): Ditto. + (IX86_BUILTIN_PMACSWD): Ditto. + (IX86_BUILTIN_PMACSSDD): Ditto. + (IX86_BUILTIN_PMACSDD): Ditto. + (IX86_BUILTIN_PMACSSDQL): Ditto. + (IX86_BUILTIN_PMACSSDQH): Ditto. + (IX86_BUILTIN_PMACSDQL): Ditto. + (IX86_BUILTIN_PMACSDQH): Ditto. + (IX86_BUILTIN_PMADCSSWD): Ditto. + (IX86_BUILTIN_PMADCSWD): Ditto. + (IX86_BUILTIN_PHADDBW): Ditto. + (IX86_BUILTIN_PHADDBD): Ditto. + (IX86_BUILTIN_PHADDBQ): Ditto. + (IX86_BUILTIN_PHADDWD): Ditto. + (IX86_BUILTIN_PHADDWQ): Ditto. + (IX86_BUILTIN_PHADDDQ): Ditto. + (IX86_BUILTIN_PHADDUBW): Ditto. + (IX86_BUILTIN_PHADDUBD): Ditto. + (IX86_BUILTIN_PHADDUBQ): Ditto. + (IX86_BUILTIN_PHADDUWD): Ditto. + (IX86_BUILTIN_PHADDUWQ): Ditto. + (IX86_BUILTIN_PHADDUDQ): Ditto. + (IX86_BUILTIN_PHSUBBW): Ditto. + (IX86_BUILTIN_PHSUBWD): Ditto. + (IX86_BUILTIN_PHSUBDQ): Ditto. + (IX86_BUILTIN_PROTB): Ditto. + (IX86_BUILTIN_PROTW): Ditto. + (IX86_BUILTIN_PROTD): Ditto. + (IX86_BUILTIN_PROTQ): Ditto. + (IX86_BUILTIN_PROTB_IMM): Ditto. + (IX86_BUILTIN_PROTW_IMM): Ditto. + (IX86_BUILTIN_PROTD_IMM): Ditto. + (IX86_BUILTIN_PROTQ_IMM): Ditto. + (IX86_BUILTIN_PSHLB): Ditto. + (IX86_BUILTIN_PSHLW): Ditto. + (IX86_BUILTIN_PSHLD): Ditto. + (IX86_BUILTIN_PSHLQ): Ditto. + (IX86_BUILTIN_PSHAB): Ditto. + (IX86_BUILTIN_PSHAW): Ditto. + (IX86_BUILTIN_PSHAD): Ditto. + (IX86_BUILTIN_PSHAQ): Ditto. + (IX86_BUILTIN_FRCZSS): Ditto. + (IX86_BUILTIN_FRCZSD): Ditto. + (IX86_BUILTIN_FRCZPS): Ditto. + (IX86_BUILTIN_FRCZPD): Ditto. + (IX86_BUILTIN_CVTPH2PS): Ditto. + (IX86_BUILTIN_CVTPS2PH): Ditto. + (IX86_BUILTIN_COMEQSS): Ditto. + (IX86_BUILTIN_COMNESS): Ditto. + (IX86_BUILTIN_COMLTSS): Ditto. + (IX86_BUILTIN_COMLESS): Ditto. + (IX86_BUILTIN_COMGTSS): Ditto. + (IX86_BUILTIN_COMGESS): Ditto. + (IX86_BUILTIN_COMUEQSS): Ditto. + (IX86_BUILTIN_COMUNESS): Ditto. + (IX86_BUILTIN_COMULTSS): Ditto. + (IX86_BUILTIN_COMULESS): Ditto. + (IX86_BUILTIN_COMUGTSS): Ditto. + (IX86_BUILTIN_COMUGESS): Ditto. + (IX86_BUILTIN_COMORDSS): Ditto. + (IX86_BUILTIN_COMUNORDSS): Ditto. + (IX86_BUILTIN_COMFALSESS): Ditto. + (IX86_BUILTIN_COMTRUESS): Ditto. + (IX86_BUILTIN_COMEQSD): Ditto. + (IX86_BUILTIN_COMNESD): Ditto. + (IX86_BUILTIN_COMLTSD): Ditto. + (IX86_BUILTIN_COMLESD): Ditto. + (IX86_BUILTIN_COMGTSD): Ditto. + (IX86_BUILTIN_COMGESD): Ditto. + (IX86_BUILTIN_COMUEQSD): Ditto. + (IX86_BUILTIN_COMUNESD): Ditto. + (IX86_BUILTIN_COMULTSD): Ditto. + (IX86_BUILTIN_COMULESD): Ditto. + (IX86_BUILTIN_COMUGTSD): Ditto. + (IX86_BUILTIN_COMUGESD): Ditto. + (IX86_BUILTIN_COMORDSD): Ditto. + (IX86_BUILTIN_COMUNORDSD): Ditto. + (IX86_BUILTIN_COMFALSESD): Ditto. + (IX86_BUILTIN_COMTRUESD): Ditto. + (IX86_BUILTIN_COMEQPS): Ditto. + (IX86_BUILTIN_COMNEPS): Ditto. + (IX86_BUILTIN_COMLTPS): Ditto. + (IX86_BUILTIN_COMLEPS): Ditto. + (IX86_BUILTIN_COMGTPS): Ditto. + (IX86_BUILTIN_COMGEPS): Ditto. + (IX86_BUILTIN_COMUEQPS): Ditto. + (IX86_BUILTIN_COMUNEPS): Ditto. + (IX86_BUILTIN_COMULTPS): Ditto. + (IX86_BUILTIN_COMULEPS): Ditto. + (IX86_BUILTIN_COMUGTPS): Ditto. + (IX86_BUILTIN_COMUGEPS): Ditto. + (IX86_BUILTIN_COMORDPS): Ditto. + (IX86_BUILTIN_COMUNORDPS): Ditto. + (IX86_BUILTIN_COMFALSEPS): Ditto. + (IX86_BUILTIN_COMTRUEPS): Ditto. + (IX86_BUILTIN_COMEQPD): Ditto. + (IX86_BUILTIN_COMNEPD): Ditto. + (IX86_BUILTIN_COMLTPD): Ditto. + (IX86_BUILTIN_COMLEPD): Ditto. + (IX86_BUILTIN_COMGTPD): Ditto. + (IX86_BUILTIN_COMGEPD): Ditto. + (IX86_BUILTIN_COMUEQPD): Ditto. + (IX86_BUILTIN_COMUNEPD): Ditto. + (IX86_BUILTIN_COMULTPD): Ditto. + (IX86_BUILTIN_COMULEPD): Ditto. + (IX86_BUILTIN_COMUGTPD): Ditto. + (IX86_BUILTIN_COMUGEPD): Ditto. + (IX86_BUILTIN_COMORDPD): Ditto. + (IX86_BUILTIN_COMUNORDPD): Ditto. + (IX86_BUILTIN_COMFALSEPD): Ditto. + (IX86_BUILTIN_COMTRUEPD): Ditto. + (IX86_BUILTIN_PCOMEQUB): Ditto. + (IX86_BUILTIN_PCOMNEUB): Ditto. + (IX86_BUILTIN_PCOMLTUB): Ditto. + (IX86_BUILTIN_PCOMLEUB): Ditto. + (IX86_BUILTIN_PCOMGTUB): Ditto. + (IX86_BUILTIN_PCOMGEUB): Ditto. + (IX86_BUILTIN_PCOMFALSEUB): Ditto. + (IX86_BUILTIN_PCOMTRUEUB): Ditto. + (IX86_BUILTIN_PCOMEQUW): Ditto. + (IX86_BUILTIN_PCOMNEUW): Ditto. + (IX86_BUILTIN_PCOMLTUW): Ditto. + (IX86_BUILTIN_PCOMLEUW): Ditto. + (IX86_BUILTIN_PCOMGTUW): Ditto. + (IX86_BUILTIN_PCOMGEUW): Ditto. + (IX86_BUILTIN_PCOMFALSEUW): Ditto. + (IX86_BUILTIN_PCOMTRUEUW): Ditto. + (IX86_BUILTIN_PCOMEQUD): Ditto. + (IX86_BUILTIN_PCOMNEUD): Ditto. + (IX86_BUILTIN_PCOMLTUD): Ditto. + (IX86_BUILTIN_PCOMLEUD): Ditto. + (IX86_BUILTIN_PCOMGTUD): Ditto. + (IX86_BUILTIN_PCOMGEUD): Ditto. + (IX86_BUILTIN_PCOMFALSEUD): Ditto. + (IX86_BUILTIN_PCOMTRUEUD): Ditto. + (IX86_BUILTIN_PCOMEQUQ): Ditto. + (IX86_BUILTIN_PCOMNEUQ): Ditto. + (IX86_BUILTIN_PCOMLTUQ): Ditto. + (IX86_BUILTIN_PCOMLEUQ): Ditto. + (IX86_BUILTIN_PCOMGTUQ): Ditto. + (IX86_BUILTIN_PCOMGEUQ): Ditto. + (IX86_BUILTIN_PCOMFALSEUQ): Ditto. + (IX86_BUILTIN_PCOMTRUEUQ): Ditto. + (IX86_BUILTIN_PCOMEQB): Ditto. + (IX86_BUILTIN_PCOMNEB): Ditto. + (IX86_BUILTIN_PCOMLTB): Ditto. + (IX86_BUILTIN_PCOMLEB): Ditto. + (IX86_BUILTIN_PCOMGTB): Ditto. + (IX86_BUILTIN_PCOMGEB): Ditto. + (IX86_BUILTIN_PCOMFALSEB): Ditto. + (IX86_BUILTIN_PCOMTRUEB): Ditto. + (IX86_BUILTIN_PCOMEQW): Ditto. + (IX86_BUILTIN_PCOMNEW): Ditto. + (IX86_BUILTIN_PCOMLTW): Ditto. + (IX86_BUILTIN_PCOMLEW): Ditto. + (IX86_BUILTIN_PCOMGTW): Ditto. + (IX86_BUILTIN_PCOMGEW): Ditto. + (IX86_BUILTIN_PCOMFALSEW): Ditto. + (IX86_BUILTIN_PCOMTRUEW): Ditto. + (IX86_BUILTIN_PCOMEQD): Ditto. + (IX86_BUILTIN_PCOMNED): Ditto. + (IX86_BUILTIN_PCOMLTD): Ditto. + (IX86_BUILTIN_PCOMLED): Ditto. + (IX86_BUILTIN_PCOMGTD): Ditto. + (IX86_BUILTIN_PCOMGED): Ditto. + (IX86_BUILTIN_PCOMFALSED): Ditto. + (IX86_BUILTIN_PCOMTRUED): Ditto. + (IX86_BUILTIN_PCOMEQQ): Ditto. + (IX86_BUILTIN_PCOMNEQ): Ditto. + (IX86_BUILTIN_PCOMLTQ): Ditto. + (IX86_BUILTIN_PCOMLEQ): Ditto. + (IX86_BUILTIN_PCOMGTQ): Ditto. + (IX86_BUILTIN_PCOMGEQ): Ditto. + (IX86_BUILTIN_PCOMFALSEQ): Ditto. + (IX86_BUILTIN_PCOMTRUEQ): Ditto. + (bdesc_ptest): Change OPTION_MASK_ISA_SSE4_1 to + OPTION_MASK_ISA_ROUND for instructions that are shared between + SSE4.1 and SSE5. + (bdesc_2arg): Ditto. + (bdesc_sse_3arg): Ditto. + (enum multi_arg_type): New enum for describing the various SSE5 + intrinsic argument types. + (bdesc_multi_arg): New table for SSE5 intrinsics. + (ix86_init_mmx_sse_builtins): Add SSE5 intrinsic support. + (ix86_expand_multi_arg_builtin): New function for creating SSE5 + intrinsics. + (ix86_expand_builtin): Add SSE5 intrinsic support. + (ix86_sse5_valid_op_p): New function to validate SSE5 3 and 4 + operand instructions. + (ix86_expand_sse5_multiple_memory): New function to split the + second memory reference from SSE5 instructions. + (type_has_variadic_args_p): Delete in favor of stdarg_p. + (ix86_return_pops_args): Use stdarg_p to determine if the function + has variable arguments. + (ix86_setup_incoming_varargs): Ditto. + (x86_this_parameter): Ditto. + + * config/i386/i386-protos.h (ix86_expand_sse5_unpack): Add + declaration. + (ix86_expand_sse5_pack): Ditto. + (ix86_sse5_valid_op_p): Ditto. + (ix86_expand_sse5_multiple_memory): Ditto. + + * config/i386/i386.md (UNSPEC_SSE5_INTRINSIC): Add new UNSPEC + constant for SSE5 support. + (UNSPEC_SSE5_UNSIGNED_CMP): Ditto. + (UNSPEC_SSE5_TRUEFALSE): Ditto. + (UNSPEC_SSE5_PERMUTE): Ditto. + (UNSPEC_SSE5_ASHIFT): Ditto. + (UNSPEC_SSE5_LSHIFT): Ditto. + (UNSPEC_FRCZ): Ditto. + (UNSPEC_CVTPH2PS): Ditto. + (UNSPEC_CVTPS2PH): Ditto. + (PCOM_FALSE): Add new constant for true/false SSE5 comparisons. + (PCOM_TRUE): Ditto. + (COM_FALSE_S): Ditto. + (COM_FALSE_P): Ditto. + (COM_TRUE_S): Ditto. + (COM_TRUE_P): Ditto. + (type attribute): Add ssemuladd, sseiadd1, ssecvt1, sse4arg types. + (unit attribute): Add support for ssemuladd, ssecvt1, sseiadd1 sse4arg + types. + (memory attribute): Ditto. + (sse4_1_round2): Use TARGET_ROUND instead of TARGET_SSE4_1. + Use SSE4_1_ROUND_* constants instead of hard coded numbers. + (rint2): Use TARGET_ROUND instead of TARGET_SSE4_1. + (floor2): Ditto. + (ceil2): Ditto. + (btrunc2): Ditto. + (nearbyintdf2): Ditto. + (nearbyintsf2): Ditto. + (sse_setccsf): Disable if SSE5. + (sse_setccdf): Ditto. + (sse5_setcc): New support for SSE5 conditional move. + (sse5_pcmov_): Ditto. + + * config/i386/sse.md (SSEMODE1248): New mode iterator for SSE5. + (SSEMODEF4): Ditto. + (SSEMODEF2P): Ditto. + (ssemodesuffixf4): New mode attribute for SSE5. + (ssemodesuffixf2s): Ditto. + (ssemodesuffixf2c): Ditto. + (sserotatemax): Ditto. + (ssescalarmode): Ditto. + (sse_maskcmpv4sf3): Disable if SSE5. + (sse_maskcmpv2df3): Ditto. + (sse_vmmaskcmpv4sf3): Ditto. + (sse5_fmadd4): Add SSE5 floating point multiply/add + instructions. + (sse5_vmfmadd4): Ditto. + (sse5_fmsub4): Ditto. + (sse5_vmfmsub4): Ditto. + (sse5_fnmadd4): Ditto. + (sse5_vmfnmadd4): Ditto. + (sse5_fnmsub4): Ditto. + (sse5_vmfnmsub4): Ditto. + (sse5i_fmadd4): Ditto. + (sse5i_fmsub4): Ditto. + (sse5i_fnmadd4): Ditto. + (sse5i_fnmsub4): Ditto. + (sse5i_vmfmadd4): Ditto. + (sse5i_vmfmsub4): Ditto. + (sse5i_vmfnmadd4): Ditto. + (sse5i_vmfnmsub4): Ditto. + (mulv16qi3): Add SSE5 support. + (mulv4si3): Ditto. + (sse5_mulv4si3): New insn for 32-bit multiply support on SSE5. + (sse2_mulv4si3): Disable if SSE5. + (sse4_1_roundpd): Use TARGET_ROUND instead of TARGET_SSE4_1. + (sse4_1_roundps): Ditto. + (sse4_1_roundsd): Ditto. + (sse4_1_roundss): Ditto. + (sse_maskcmpv4sf3): Disable if SSE5 so the SSE5 instruction will + be generated. + (sse_maskcmpsf3): Ditto. + (sse_vmmaskcmpv4sf3): Ditto. + (sse2_maskcmpv2df3): Ditto. + (sse2_maskcmpdf3): Ditto. + (sse2_vmmaskcmpv2df3): Ditto. + (sse2_eq3): Ditto. + (sse2_gt3): Ditto. + (sse5_pcmov_): Add SSE5 support. + (vec_unpacku_hi_v16qi): Ditto. + (vec_unpacks_hi_v16qi): Ditto. + (vec_unpacku_lo_v16qi): Ditto. + (vec_unpacks_lo_v16qi): Ditto. + (vec_unpacku_hi_v8hi): Ditto. + (vec_unpacks_hi_v8hi): Ditto. + (vec_unpacku_lo_v8hi): Ditto. + (vec_unpacks_lo_v8hi): Ditto. + (vec_unpacku_hi_v4si): Ditto. + (vec_unpacks_hi_v4si): Ditto. + (vec_unpacku_lo_v4si): Ditto. + (vec_unpacks_lo_v4si): Ditto. + (sse5_pmacsww): New SSE5 intrinsic insn. + (sse5_pmacssww): Ditto. + (sse5_pmacsdd): Ditto. + (sse5_pmacssdd): Ditto. + (sse5_pmacssdql): Ditto. + (sse5_pmacssdqh): Ditto. + (sse5_pmacsdqh): Ditto. + (sse5_pmacsswd): Ditto. + (sse5_pmacswd): Ditto. + (sse5_pmadcsswd): Ditto. + (sse5_pmadcswd): Ditto. + (sse5_pcmov_): Conditional move support on SSE5. + (sse5_phaddbw): New SSE5 intrinsic insn. + (sse5_phaddbd): Ditto. + (sse5_phaddbq): Ditto. + (sse5_phaddwd): Ditto. + (sse5_phaddwq): Ditto. + (sse5_phadddq): Ditto. + (sse5_phaddubw): Ditto. + (sse5_phaddubd): Ditto. + (sse5_phaddubq): Ditto. + (sse5_phadduwd): Ditto. + (sse5_phadduwq): Ditto. + (sse5_phaddudq): Ditto. + (sse5_phsubbw): Ditto. + (sse5_phsubwd): Ditto. + (sse5_phsubdq): Ditto. + (sse5_pperm): Ditto. + (sse5_pperm_sign_v16qi_v8hi): New insns for pack/unpack with SSE5. + (sse5_pperm_zero_v16qi_v8hi): Ditto. + (sse5_pperm_sign_v8hi_v4si): Ditto. + (sse5_pperm_zero_v8hi_v4si): Ditto. + (sse5_pperm_sign_v4si_v2di): Ditto. + (sse5_pperm_sign_v4si_v2di): Ditto. + (sse5_pperm_pack_v2di_v4si): Ditto. + (sse5_pperm_pack_v4si_v8hi): Ditto. + (sse5_pperm_pack_v8hi_v16qi): Ditto. + (sse5_perm): New SSE5 intrinsic insn. + (rotl3): Ditto. + (sse5_rotl3): Ditto. + (sse5_ashl3): Ditto. + (sse5_lshl3): Ditto. + (sse5_frcz2): Ditto. + (sse5s_frcz2): Ditto. + (sse5_cvtph2ps): Ditto. + (sse5_cvtps2ph): Ditto. + (sse5_vmmaskcmp3): Ditto. + (sse5_com_tf3): Ditto. + (sse5_maskcmp3): Ditto. + (sse5_maskcmp_uns3): Ditto. + (sse5_maskcmp_uns23): Ditto. + (sse5_pcom_tf3): Ditto. + + * config/i386/predicates.md (const_0_to_31_operand): New predicate + to match 0..31. + (sse5_comparison_float_operator): New predicate to match the + comparison operators supported by the SSE5 com instruction. + (ix86_comparison_int_operator): New predicate to match just the + signed int comparisons. + (ix86_comparison_uns_operator): New predicate to match just the + unsigned int comparisons. + + * doc/invoke.texi (-msse5): Add documentation. + (-mfused-madd): Ditto. + + * doc/extend.texi (x86 intrinsics): Document new SSE5 intrinsics. + + * config.gcc (i[34567]86-*-*): Include bmmintrin.h and + mmintrin-common.h. + (x86_64-*-*): Ditto. + + * config/i386/cpuid.h (bit_SSE5): Define SSE5 bit. + + * config/i386/bmmintrin.h: New file, provide common x86 compiler + intrinisics for SSE5. + + * config/i386/smmintrin.h: Move instructions shared with SSE5 to + mmintrin-common.h. + + * config/i386/mmintrin-common.h: New file, to contain common + instructions between SSE4.1 and SSE5. + + * config/i386/netware.c (gen_stdcall_or_fastcall_decoration): Use + FOREACH_FUNCTION_ARGS to iterate over the argument list. + (gen_regparm_prefix): Ditto. + + * config/i386/winnt.c (gen_stdcall_or_fastcall_suffix): Use + FOREACH_FUNCTION_ARGS to iterate over the argument list. Use + prototype_p to determine if a function is prototyped. + +2007-09-12 Janis Johnson + + * config/dfp-bit.c (dfp_conversion_exception): New function. + (DFP_TO_DFP) Add new variants to use direct conversions in decNumber. + (DFP_TO_INT): Ditto. + (INT_TO_DFP): Ditto. + * config/dfp-bit.h (DEC_FLOAT_FROM_INT, DEC_FLOAT_TO_INT): New. + +2007-09-12 Jakub Jelinek + + PR target/32338 + * config/ia64/ia64.c (ia64_expand_epilogue): Emit blockage + before sp restoration even when total_size is 0, but + frame_pointer_needed. + +2007-09-12 Bob Wilson + + * config/xtensa/xtensa.c (machine_function): Add vararg_a7_copy. + (xtensa_copy_incoming_a7): Use start_sequence instead of + push_to_sequence. Stash insns in vararg_a7_copy for builtin_saveregs. + (xtensa_builtin_saveregs): Place code from vararg_a7_copy at the start + of the saveregs sequence. + +2007-09-12 Richard Sandiford + + * c-tree.h (grokfield): Add a "tree *" argument. + * c-decl.c (grokdeclarator): Take a pointer to the decl's attributes. + Chain nested decl attributes to it. Don't call decl_attributes here. + (groktypename): Pass grokdeclarator a pointer to the attribute list. + (start_decl, grokparm, push_parm_decl, start_function): Likewise. + (grokfield): Take a pointer to the decl's attributes and pass + it to grokdeclarator. + * c-parser.c (c_parser_struct_declaration): Update the calls to + grokfield. Call decl_attributes for anonymous struct and union + fields. + +2007-09-12 Jan Hubicka + + * c-objc-common.h (LANG_HOOKS_CALLGRAPH_EXPAND_FUNCTION): Kill. + +2007-09-12 Ira Rosen + + PR tree-optimization/32377 + * tree-vect-analyze.c (vect_analyze_data_ref_dependence): Distinguish + between positive and negative dependence distance using DDR_REVERSED_P. + +2007-09-12 Dorit Nuzman + + PR tree-optimization/33373 + * tree-vect-analyze (vect_determine_vectorization_factor): Call + TREE_INT_CST_LOW when comparing TYPE_SIZE_UNIT. + +2007-09-12 Jan Hubicka + + PR target/33393 + * i386.md (floatsisf2_mixed_memory, floatsisf2_sse_memory): Disable for + !SSE_MATH + +2007-09-12 Christian Bruel + + * sh.h (SH_DBX_REGISTER_NUMBER): Added fpscr, fixed sr/gbr regs. + * linux-unwind.h (SH_DWARF_FRAME_GBR): fixed. + +2007-09-12 Ira Rosen + + * tree-vect-transform.c (vect_get_slp_defs): Don't build a vector + for oprnd1 if not required. + (vectorizable_operation): Use scalar operand in SLP in case of + shift with scalar argument. + +2007-09-12 Ira Rosen + + * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change default and minimum + to 1. + +2007-09-11 James E. Wilson + + * defaults.h (DWARF2_UNWIND_INFO): Don't define if + TARGET_UNWIND_INFO is defined. + * config/ia64/ia64.h (INCOMING_RETURN_ADDR_RTX): Delete undef + after definition. + +2007-09-12 Kaz Kojima + + * config/sh/sh.c (calc_live_regs): Use + current_function_saves_all_registers instead of + current_function_has_nonlocal_label. + (sh_allocate_initial_value): Likewise. + (sh_get_pr_initial_val): Likewise. + * config/sh/sh.h (SHMEDIA_REGS_STACK_ADJUST): Likewise. + * config/sh/sh.md (load_ra): Likewise. + +2007-09-12 Hans-Peter Nilsson + + * config/cris/t-linux (LIMITS_H_TEST): Only define if not inhibit_libc. + + PR target/33360 + * config/cris/cris.c (cris_expand_pic_call_address): Fix typo in + GET_CODE (x) == CONST_INT to CONST_INT_P (x) transformation. + +2007-09-12 Sa Liu + + * config/spu/spu.c (spu_emit_branch_or_set): Handle NaN values as + operands to DFmode GE or LE compares. + +2007-09-12 Bernd Schmidt + + * config/bfin/bfin.h (enum reg_class, REG_CLASS_CONTENTS, + REG_CLASS_NAMES): Add P0REGS. + (REGNO_REG_CLASS): Return it where appropriate. + (REG_CLASS_FROM_CONSTRAINT): Add 'qA'. + (CLASS_LIKELY_SPILLED_P): P0REGS is likely_spilled. + * doc/md.texi (Blackfin family): Document 'q' constraints. + +2007-09-11 Steve Kenton + + * pa/linux-unwind.h: Guard with inhibit_libc. + * pa/hpux-unwind.h: Likewise. + +2007-09-11 David Daney + + * doc/invoke.texi: Document new MIPS -mllsc and -mno-llsc options. + * doc/install.texi: Document new --with-llsc and --without-llsc + options. + * config.gcc: Handle --with-llsc and --without-llsc configure options. + * config/mips/mips.md (sync, memory_barrier): Wrap sync instrunction + in %| and %- operand codes. Depend on GENERATE_SYNC instead of + ISA_HAS_SYNC. + (sync_compare_and_swap, sync_add, sync_sub, + sync_old_add, sync_old_sub, sync_new_add, + sync_new_sub, sync_, sync_old_, + sync_new_, sync_nand, sync_old_nand, + sync_new_nand, sync_lock_test_and_set): Depend on + GENERATE_LL_SC instead of ISA_HAS_LL_SC. + * config/mips/mips.opt (mllsc): New option. + * config/mips/mips.c (mips_llsc): Define variable. + (mips_handle_option): Handle mllsc option. + (override_options): Set mips_print_operand_punct for '|' and '-'. + (print_operand): Add new %| and %- operand codes. + * config/mips/mips.h (mips_llsc_setting): New enum type. + (mips_llsc): Declare. + (OPTION_DEFAULT_SPECS): Add llsc handling. + (GENERATE_SYNC): New macro. + (GENERATE_LL_SC): New macro. + (MIPS_COMPARE_AND_SWAP, MIPS_SYNC_OP, MIPS_SYNC_OLD_OP, + MIPS_SYNC_NEW_OP, MIPS_SYNC_NAND, MIPS_SYNC_OLD_NAND, + MIPS_SYNC_NEW_NAND, MIPS_SYNC_EXCHANGE): Wrap instructions + in %| and %- operand codes. + +2007-09-11 Eric Botcazou + + * tree-ssa-structalias.c (push_fields_onto_fieldstack): Deal with + TYPE_NONALIASED_COMPONENT like with DECL_NONADDRESSABLE_P. + +2007-09-11 Jason Merrill + + PR middle-end/27945 + * stor-layout.c (layout_decl): Do pack variable size fields. + +2007-09-11 Maxim Kuvyrkov + + * config/m68k/predicates.md (movsi_const0_operand, + non_symbolic_call_operand): New predicates. + + * config/m68k/constraints.md: (Cs, Ci, C0, Cj, CQ, CW, CZ, CS, Ap, Ac): + New constraints. + * doc/md.texi (Constraints for Particular Machines: Motorola 680x0): + Document constraints N, O, P, R, S, T, Q, U, W, Cs, Ci, C0, Cj, CQ, + CW, CZ, CS, Ap and Ac. + + * config/m68k/m68k.md (UNSPEC_IB): New constant. + (constraints.md): New include. + (cpu, type, type1, opx, opy, opx_type, opy_type, size, opx_access, + opx_mem, opy_mem, op_mem, guess, split): New attributes. + (movdf_internal): Name pattern. Fix to use alternatives. Add split. + Specify attributes. + (pushdi): Add split. + (tstsi_internal): Name pattern. Fix to use alternatives. Specify + attributes. Split tstsi_internal_68020_cf from it. + (tstsi_internal_68020_cf): New pattern. + (tsthi_internal, tstqi_internal): Name pattern. Specify attributes. + (tst_cf): Specify attributea. + (cmpsi_cf): Name pattern. Specify attributes. + (cmp_68881, cmp_cf): Specify type attribute. + (pushexthisi_const): Fix to use alternatives. Specify + attributes. + (movsi_const0): Split movsi_const0_68000_10 and movsi_const0_68040_60 + from it. Fix to use alternatives. Specify attributes. + (movsi_const0_68040_10, movsi_const0_68040_60): New patterns. + (movsi_cf, movstrictqi_cf): Fix to use alternatives. Specify + attributes. + (movsf_cf_soft): Specify attributes. + (movdf_cf_soft): Add split. + (pushasi, zero_extendhisi2_cf, zero_extendqisi2_cfv4, + cfv4_extendhisi2, 68k_extendhisi2, extendqihi2, cfv4_extendqisi2, + 68k_extendqisi2, truncdfsf2_cf): Specify attributes. + (truncdfsf2_68881): Name pattern. Specify attributes. + (floatsi2_cf, floathi2_68881, floathi2_cf, + floatqi2_68881, floatqi2_cf, ftrunc2_cf, + fixqi2_cf, fixhi2_cf, fixsi2_cf, adddi_dishl32): + Specify attributes. + (addsi3_5200): Fix to use alternatives. Specify attributes. + Add splits. + (add3_cf, subdi_dishl32): Specify attributes. + (subsi3): Add alternative for subq.l. Specify attributes. + (sub3_cf, mulhi3, mulhisi3): Specify attributes. + (mulhisisi3_s, mulsi3_68020, mulsi3_cf): Name pattern. Specify + attributes. + (umulhisi3): Specify attributes. + (mulhisisi3_z): Name pattern. Specify attributes. + (fmul3_cf, div3_cf, negsi2_internal, negsi2_5200, + sqrt2_68881, clzsi2, one_cmplsi2_5200, subreghi1ashrdi_const32, + subregsi1ashrdi_const32, ashrsi3, subreg1lshrdi_const32, lshrsi3, + bsetmemqi): Specify attributes. + (bsetmemqi_ext): Name pattern. Specify attributes. + (bclrmemqi): Specify attributes. + (bclrmemqi_ext, scc, sls): Name pattern. Specify attributes. + (beq, bne, bgt, bgtu, blt, bltu, bge, bgeu, ble, bleu): Specify + attributes. + (beq2, bne2, bgt2, bgtu2, blt2, bltu2, bge2, bgeu2, ble2, bleu2): Name + pattern. Specify attributes. + (jump): Specify attributes. + (tablejump_internal): Name pattern. Specify attributes. + (call_value): Split into non_symbolic_call_value, + symbolic_call_value_jsr, symbolic_call_value_bsr. Fix to use + alternatives. Specify attributes. + (non_symbolic_call_value, symbolic_call_value_jsr, + symbolic_call_value_bsr): New patterns. + (nop, return, unlink, indirect_jump): Specify attributes. + (trap): Fix condition. Specify attributes. + (ib): New pattern. + + * config/m68k/m68k.c (m68k_symbolic_call_var): New variable. + (override_options): Initialize it. Initialize m68k_sched_cpu. + (CONST_METHOD): Rename to M68K_CONST_METHOD, move to m68k.h. + (const_method): Make global, rename to m68k_const_method. + (const_int_cost, output_move_const_into_data_reg): Update. + (output_move_double): Parametrize to emit rtl code, rename to + handle_move_double. + (output_reg_adjust, emit_reg_adjust, output_compadr, output_movsi, + emit_movsi): New static functions. + (output_move_double): New function with semantics of old + output_move_double. + (m68k_emit_move_double): New function. + (m68k_sched_cpu): New variable. + (attr_op_type): New enum. + (sched_guess_p): New variable. + (sched_address_type, sched_operand_type, sched_attr_op_type): + New static functions. + (m68k_sched_attr_opx_type, m68k_sched_attr_opy_type, + m68k_sched_attr_size, m68k_sched_attr_op_mem): New functions. + (sched_branch_type): New static variable. + (m68k_sched_branch_type): New function. + * config/m68k/m68k.h (M68K_SYMBOLIC_CALL): New enum. + (m68k_symbolic_call_var): Declare. + (M68K_CONST_METHOD): Rename from CONST_METHOD. Move here from m68k.c. + (m68k_const_method, m68k_emit_move_double, m68k_sched_cpu, + m68k_sched_attr_opx_type, m68k_sched_attr_opy_type, + m68k_sched_attr_size, m68k_sched_attr_op_mem, m68k_sched_branch_type): + Declare. + +2007-09-11 Jakub Jelinek + + * builtins.def (BUILT_IN_VA_ARG_PACK_LEN): New builtin. + * builtins.c (expand_builtin) : Issue + error if __builtin_va_arg_pack_len () wasn't optimized out during + inlining. + * tree-inline.c (copy_bb): Replace __builtin_va_arg_pack_len () + with the number of inline's anonymous arguments. + * doc/extend.texi: Document __builtin_va_arg_pack_len (). + +2007-09-11 Zdenek Dvorak + + * fold-const.c (extract_muldiv_1): Do not simplify + var * c * c to var. + +2007-09-11 Jan Hubicka + + * i386.h (ix86_tune_indices): Add X86_TUNE_INTER_UNIT_CONVERSIONS. + (TARGET_INTER_UNIT_CONVERSIONS): New. + * i386.md (floatsi expanders): Remove redundant check for SImode + source; offload to memory when asked for. + (floatsisf2_mixed, floatsisf2_sse, floatsidf2_mixed, floatsidf2_sse + floatdisf2_mixed, floatsisf2_sse, floatsidf2_mixed, floatsidf2_sse): + Update conditions; + (floatsisf2_mixed_memory, floatsisf2_sse_memory, + floatsidf2_mixed_memory, floatsidf2_sse_memory + floatdisf2_mixed_memory, floatsisf2_sse_memory, + floatsidf2_mixed_memory, floatsidf2_sse_memory): New. + +2007-09-11 Jan Hubicka + + * toplev.c (process_options): all frontends now do unit-at-a-time. + * cgraphunit.c: update comments. + (cgraph_expand_function): call passmanager dirrectly; emit thunks. + * c-decl.c (finish_function): use cgraph_add_new_function. + * function.c (expand_function_end): We are always unit-at-a-time. + +2007-09-11 Richard Sandiford + + * config/mips/mips.c (mips_set_mips16_mode): Use separate anchor + settings for MIPS16. + (mips_use_anchors_for_symbol_p): Use default_use_anchors_for_symbol_p. + +2007-09-11 Richard Sandiford + + * config/mips/mips.c (mips_symbol_insns_1): Allow LEAs of + SYMBOL_FORCE_TO_MEM constants. + (mips_rtx_costs): Give a cost of 1 to force_to_mem_operands. + (mips16_rewrite_pool_refs_info): New structure. + (mips16_rewrite_pool_constant): New function, split out from... + (mips16_rewrite_pool_refs): ...here. Take a pointer to a + mips16_rewrite_pool_refs_info structure rather than a pointer + to a constant pool. Force force_to_mem_operands into memory. + (mips16_lay_out_constants): Update call to mips16_rewrite_pool_refs. + * config/mips/predicates.md (force_to_mem_operand): New predicate. + * config/mips/constraints.md (kf): New constraint. + * config/mips/mips.md (*movdi_64bit_mips16): Add a d <- kf alternative. + (*movsi_mips16): Likewise. + +2007-09-11 Richard Sandiford + Nigel Stephens + David Ung + + * config/mips/mips.h (CONSTANT_POOL_COST): Move to... + * config/mips/mips.c: ...here and set to 4 for TARGET_MIPS16. + (mips16_constant_cost, mips_immediate_operand_p, mips_binary_cost) + (mips_fp_mult_cost, mips_fp_div_cost, mips_sign_extend_cost) + (mips_zero_extend_cost): New functions. + (mips_rtx_costs): Treat COMPARE constants as having zero cost. + Use the new functions. Tweak many cost estimates, both here + and in the new subroutines. Return false when the cost of the + operands has not been calculated. Check for *clear_upper32. + Check for floating-point multiply-add, reciprocal and rsqrt + patterns. Handle comparison and rotation codes. + +2007-09-11 Danny Smith + + * config/i386/cygming.h (TARGET_STRIP_NAME_ENCODING): Don't + override default. + * config/i386/i386.c (get_dllimport_decl): Don't strip + FASTCALL_PREFIX. + +2007-09-10 Janis Johnson + + PR c/30013 + * config/dfp-bit.c: Don't skip TFmode conversions; move strto* + declarations to top. + (DFP_TO_BFP): Use for either XFmode or TFmode. + (BFP_TO_DFP): Use for either XFmode or TFmode; always use cast + of BFP_VIA_TYPE. + * config/dfp-bit.h: Include float.h. + (LONG_DOUBLE_HAS_XF_MODE, LONG_DOUBLE_HAS_TF_MODE): Define if long + double is one of these modes, rather than using LIBGCC_HAS_*F_MODE + which doesn't mean the same thing. + (BFP_KIND): Use 4 to mean TFmode. + (BFP_FMT): Specify the number of decimal digits based on the + number of mantissa digits. + (BFP_VIA_TYPE): Binary float type to use as cast for sprintf. + (BFP_TO_DFP, DFP_TO_BFP): Define names for TFmode variants. + (STR_TO_BFP): Use strtold for XFmode or TFmode. + (TFtype): Define if TFmode is supported. + * doc/libgcc.texi (Decimal float library routines): Document + TF conversion functions. + +2007-09-10 Chao-ying Fu + + * config/mips/mips.c (mips_scalar_mode_supported_p): Declare. + (TARGET_SCALAR_MODE_SUPPORTED_P): Define. + (mips_emit_compare): Process fixed-point modes. + (mips_pad_arg_upward): Support fixed-point types. + (override_options): Allow fixed-point modes in accumulators. + (mips_pass_by_reference): Pass DQ, UDQ, DA, and UDA modes in registers. + (mips_vector_mode_supported_p): Support V2HQmode, V2UHQmode, V2HAmode, + V2UHAmode, V4QQmode, and V4UQQmode when TARGET_DSP. + (mips_scalar_mode_supported_p): New function to accept fixed-point + modes if the width is not greater than two BITS_PER_WORD. + * config/mips/mips.h (SHORT_FRACT_TYPE_SIZE, FRACT_TYPE_SIZE, + LONG_FRACT_TYPE_SIZE, LONG_LONG_FRACT_TYPE_SIZE, + SHORT_ACCUM_TYPE_SIZE, ACCUM_TYPE_SIZE, LONG_ACCUM_TYPE_SIZE, + LONG_LONG_ACCUM_TYPE_SIZE): Define. + * config/mips/mips.md ("d"): Update mode attribute for fixed-point + modes. + ("IMODE"): New mode attribute. + (mips-fixed.md): Include. + * config/mips/mips-modes.def: Create VECTOR_MODES for FRACT, UFRACT, + ACCUM, UACCUM. + * config/mips/mips-fixed.md: New file. + 2007-09-11 Ben Elliston * config/spu/spu.md: Formatting fixes. @@ -137,8 +1216,7 @@ (lshr3): Ditto. (ashl3): Ditto. (vec_shl_): Use const_0_to_255_mul_8_operand predicate for op2. - (vec_shr_): Use const_0_to_255_mul_8_operand predicate for op2. - + (vec_shr_): Ditto. * gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128, IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.