-# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007
+# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008
# Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
}
###############################
+# proc check_weak_override_available { }
+###############################
+
+# Like check_weak_available, but return 0 if weak symbol definitions
+# cannot be overridden.
+
+proc check_weak_override_available { } {
+ if { [istarget "*-*-mingw*"] } {
+ return 0
+ }
+ return [check_weak_available]
+}
+
+###############################
# proc check_visibility_available { what_kind }
###############################
return 1
}
+# Return 1 if according to target_info struct and explicit target list
+# target is supposed to keep null pointer checks. This could be due to
+# use of option fno-delete-null-pointer-checks or hardwired in target.
+
+proc check_effective_target_keeps_null_pointer_checks { } {
+ if [target_info exists keeps_null_pointer_checks] {
+ return 1
+ }
+ if { [istarget avr-*-*] } {
+ return 1;
+ }
+ return 0
+}
+
# Return true if profiling is supported on the target.
proc check_profiling_available { test_what } {
return 0
}
- # MinGW does not support -p.
- if { [istarget *-*-mingw*] && [lindex $test_what 1] == "-p" } {
+ # We don't yet support profiling for MIPS16.
+ if { [istarget mips*-*-*]
+ && ![check_effective_target_nomips16]
+ && ([lindex $test_what 1] == "-p"
+ || [lindex $test_what 1] == "-pg") } {
return 0
}
- # At present, there is no profiling support on NetWare.
- if { [istarget *-*-netware*] } {
+ # MinGW does not support -p.
+ if { [istarget *-*-mingw*] && [lindex $test_what 1] == "-p" } {
return 0
}
# missing other needed machinery.
if { [istarget mmix-*-*]
|| [istarget arm*-*-eabi*]
+ || [istarget picochip-*-*]
+ || [istarget *-*-netware*]
|| [istarget arm*-*-elf]
|| [istarget arm*-*-symbianelf*]
|| [istarget avr-*-*]
|| [istarget bfin-*-*]
|| [istarget powerpc-*-eabi*]
- || [istarget strongarm*-*-elf]
- || [istarget xscale*-*-elf]
|| [istarget cris-*-*]
|| [istarget crisv32-*-*]
|| [istarget fido-*-elf]
|| [istarget m68k-*-uclinux*]
|| [istarget mips*-*-elf*]
|| [istarget xstormy16-*]
- || [istarget xtensa-*-elf]
- || [istarget *-*-vxworks*]
- || [istarget *-*-windiss] } {
+ || [istarget xtensa*-*-elf]
+ || [istarget *-*-rtems*]
+ || [istarget *-*-vxworks*] } {
set profiling_available_saved 0
} else {
set profiling_available_saved 1
return $profiling_available_saved
}
+# Check to see if a target is "freestanding". This is as per the definition
+# in Section 4 of C99 standard. Effectively, it is a target which supports no
+# extra headers or libraries other than what is considered essential.
+proc check_effective_target_freestanding { } {
+ if { [istarget picochip-*-*] } then {
+ return 1
+ } else {
+ return 0
+ }
+}
+
# Return 1 if target has packed layout of structure members by
# default, 0 otherwise. Note that this is slightly different than
# whether the target has "natural alignment": both attributes may be
}]
}
+# Return 1 if compilation with -fgraphite is error-free for trivial
+# code, 0 otherwise.
+
+proc check_effective_target_fgraphite {} {
+ return [check_no_compiler_messages fgraphite object {
+ void foo (void) { }
+ } "-O1 -fgraphite"]
+}
+
# Return 1 if compilation with -fopenmp is error-free for trivial
# code, 0 otherwise.
# we don't support MIPS16 PIC.
proc add_options_for_mips16_attribute { flags } {
- return "$flags -mno-abicalls -fno-pic"
+ return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
}
# Return true if we can force a mode that allows MIPS16 code generation.
}]
}
+# Return 1 if the target supports Fortran integer(16), 0 otherwise.
+#
+# When the target name changes, replace the cached result.
+
+proc check_effective_target_fortran_integer_16 { } {
+ return [check_no_compiler_messages fortran_integer_16 executable {
+ ! Fortran
+ integer(16) :: i
+ end
+ }]
+}
+
# Return 1 if we can statically link libgfortran, 0 otherwise.
#
# When the target name changes, replace the cached result.
}]
}
+# Return 1 if we're generating 64-bit code using default llp64 options,
+# 0 otherwise.
+
+proc check_effective_target_llp64 { } {
+ return [check_no_compiler_messages llp64 object {
+ int dummy[sizeof (int) == 4
+ && sizeof (void *) == 8
+ && sizeof (long long) == 8
+ && sizeof (long) == 4 ? 1 : -1];
+ }]
+}
+
# Return 1 if the target supports long double larger than double,
# 0 otherwise.
&& [check_effective_target_lp64])
|| ([istarget powerpc*-*-*]
&& ([check_effective_target_powerpc_spe]
- || [check_effective_target_powerpc_altivec]))} {
+ || [check_effective_target_powerpc_altivec]))
+ || [istarget spu-*-*]
+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
set et_vect_cmdline_needed_saved 0
}
}
|| [istarget x86_64-*-*]
|| [istarget sparc*-*-*]
|| [istarget alpha*-*-*]
- || [istarget ia64-*-*] } {
+ || [istarget ia64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_int_saved 1
}
}
} else {
set et_vect_floatint_cvt_saved 0
if { [istarget i?86-*-*]
+ || ([istarget powerpc*-*-*]
+ && ![istarget powerpc-*-linux*paired*])
|| [istarget x86_64-*-*] } {
set et_vect_floatint_cvt_saved 1
}
}
}
+# Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
+# used.
+
+proc check_effective_target_arm_thumb1_ok { } {
+ return [check_no_compiler_messages arm_thumb1_ok assembly {
+ #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
+ #error FOO
+ #endif
+ } "-mthumb"]
+}
+
# Return 1 if the target supports executing NEON instructions, 0
# otherwise. Cache the result.
} "-mfpu=neon -mfloat-abi=softfp"]
}
+# Return 1 if this is a ARM target with NEON enabled.
+
+proc check_effective_target_arm_neon { } {
+ if { [check_effective_target_arm32] } {
+ return [check_no_compiler_messages arm_neon object {
+ #ifndef __ARM_NEON__
+ #error not NEON
+ #else
+ int dummy;
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
+# the Loongson vector modes.
+
+proc check_effective_target_mips_loongson { } {
+ return [check_no_compiler_messages loongson assembly {
+ #if !defined(__mips_loongson_vector_rev)
+ #error FOO
+ #endif
+ }]
+}
+
# Return 1 if this is a PowerPC target with floating-point registers.
proc check_effective_target_powerpc_fprs { } {
}
}
+# Return 1 if this is a PowerPC target with hardware double-precision
+# floating point.
+
+proc check_effective_target_powerpc_hard_double { } {
+ if { [istarget powerpc*-*-*]
+ || [istarget rs6000-*-*] } {
+ return [check_no_compiler_messages powerpc_hard_double object {
+ #ifdef _SOFT_DOUBLE
+ #error soft double
+ #else
+ int dummy;
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target supporting -maltivec.
proc check_effective_target_powerpc_altivec_ok { } {
}
}
+# Return 1 if this is a PowerPC target supporting -mcpu=cell.
+
+proc check_effective_target_powerpc_ppu_ok { } {
+ if [check_effective_target_powerpc_altivec_ok] {
+ return [check_no_compiler_messages cell_asm_available object {
+ int main (void) {
+#ifdef __MACH__
+ asm volatile ("lvlx v0,v0,v0");
+#else
+ asm volatile ("lvlx 0,0,0");
+#endif
+ return 0;
+ }
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target that supports SPU.
proc check_effective_target_powerpc_spu { } {
- return [istarget powerpc*-*-linux*]
+ if [istarget powerpc*-*-linux*] {
+ return [check_effective_target_powerpc_altivec_ok]
+ } else {
+ return 0
+ }
}
# Return 1 if this is a PowerPC target with SPE enabled.
}
}
+# Return 1 if this is a PowerPC 405 target. The check includes options
+# specified by dg-options for this test, so don't cache the result.
+
+proc check_effective_target_powerpc_405_nocache { } {
+ if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
+ return [check_no_compiler_messages_nocache powerpc_405 object {
+ #ifdef __PPC405__
+ int dummy;
+ #else
+ #error not a PPC405
+ #endif
+ } [current_compiler_flags]]
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if this is a SPU target with a toolchain that
+# supports automatic overlay generation.
+
+proc check_effective_target_spu_auto_overlay { } {
+ if { [istarget spu*-*-elf*] } {
+ return [check_no_compiler_messages spu_auto_overlay executable {
+ int main (void) { }
+ } "-Wl,--auto-overlay" ]
+ } else {
+ return 0
+ }
+}
+
# The VxWorks SPARC simulator accepts only EM_SPARC executables and
# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
# test environment appears to run executables on such a simulator.
&& ![istarget powerpc-*-linux*paired*])
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_shift_saved 1
}
}
&& ![istarget powerpc-*-linux*paired*])
&& [check_effective_target_ilp32])
|| [istarget x86_64-*-*]
+ || [check_effective_target_arm32]
|| ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
set answer 1
} else {
|| [istarget spu-*-*]
|| [istarget mipsisa64*-*-*]
|| [istarget x86_64-*-*]
- || [istarget ia64-*-*] } {
+ || [istarget ia64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_float_saved 1
}
}
return $et_vect_double_saved
}
+# Return 1 if the target supports hardware vectors of long long, 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_long_long { } {
+ global et_vect_long_long_saved
+
+ if [info exists et_vect_long_long_saved] {
+ verbose "check_effective_target_vect_long_long: using cached result" 2
+ } else {
+ set et_vect_long_long_saved 0
+ if { [istarget i?86-*-*]
+ || [istarget x86_64-*-*] } {
+ set et_vect_long_long_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
+ return $et_vect_long_long_saved
+}
+
+
# Return 1 if the target plus current options does not support a vector
# max instruction on "int", 0 otherwise.
#
return $et_vect_no_bitwise_saved
}
+# Return 1 if the target plus current options supports vector permutation,
+# 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_perm { } {
+ global et_vect_perm
+
+ if [info exists et_vect_perm_saved] {
+ verbose "check_effective_target_vect_perm: using cached result" 2
+ } else {
+ set et_vect_perm_saved 0
+ if { [istarget powerpc*-*-*]
+ || [istarget spu-*-*] } {
+ set et_vect_perm_saved 1
+ }
+ }
+ verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
+ return $et_vect_perm_saved
+}
+
+
# Return 1 if the target plus current options supports a vector
# widening summation of *short* args into *int* result, 0 otherwise.
# A target can also support this widening summation if it can support
set et_vect_pack_trunc_saved 0
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget spu-*-*] } {
set et_vect_pack_trunc_saved 1
}
}
verbose "check_effective_target_unaligned_stack: using cached result" 2
} else {
set et_unaligned_stack_saved 0
- if { ( [istarget i?86-*-*] || [istarget x86_64-*-*] )
- && (! [istarget *-*-darwin*] ) } {
- set et_unaligned_stack_saved 1
- }
}
verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
return $et_unaligned_stack_saved
set et_vect_no_align_saved 0
if { [istarget mipsisa64*-*-*]
|| [istarget sparc*-*-*]
- || [istarget ia64-*-*] } {
+ || [istarget ia64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_no_align_saved 1
}
}
if { [istarget ia64-*-*]
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*] } {
set et_vect_short_mult_saved 1
}
}
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_int_mult_saved 1
}
}
verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
} else {
set et_vect_extract_even_odd_saved 0
- if { [istarget powerpc*-*-*] } {
+ if { [istarget powerpc*-*-*]
+ || [istarget spu-*-*] } {
set et_vect_extract_even_odd_saved 1
}
}
return $et_vect_extract_even_odd_saved
}
+# Return 1 if the target supports vector even/odd elements extraction of
+# vectors with SImode elements or larger, 0 otherwise.
+
+proc check_effective_target_vect_extract_even_odd_wide { } {
+ global et_vect_extract_even_odd_wide_saved
+
+ if [info exists et_vect_extract_even_odd_wide_saved] {
+ verbose "check_effective_target_vect_extract_even_odd_wide: using cached result" 2
+ } else {
+ set et_vect_extract_even_odd_wide_saved 0
+ if { [istarget powerpc*-*-*]
+ || [istarget i?86-*-*]
+ || [istarget x86_64-*-*]
+ || [istarget spu-*-*] } {
+ set et_vect_extract_even_odd_wide_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_extract_even_wide_odd: returning $et_vect_extract_even_odd_wide_saved" 2
+ return $et_vect_extract_even_odd_wide_saved
+}
+
# Return 1 if the target supports vector interleaving, 0 otherwise.
proc check_effective_target_vect_interleave { } {
set et_vect_interleave_saved 0
if { [istarget powerpc*-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget spu-*-*] } {
set et_vect_interleave_saved 1
}
}
return $et_vect_strided_saved
}
+# Return 1 if the target supports vector interleaving and extract even/odd
+# for wide element types, 0 otherwise.
+proc check_effective_target_vect_strided_wide { } {
+ global et_vect_strided_wide_saved
+
+ if [info exists et_vect_strided_wide_saved] {
+ verbose "check_effective_target_vect_strided_wide: using cached result" 2
+ } else {
+ set et_vect_strided_wide_saved 0
+ if { [check_effective_target_vect_interleave]
+ && [check_effective_target_vect_extract_even_odd_wide] } {
+ set et_vect_strided_wide_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_strided_wide: returning $et_vect_strided_wide_saved" 2
+ return $et_vect_strided_wide_saved
+}
+
# Return 1 if the target supports section-anchors
proc check_effective_target_section_anchors { } {
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
- || [istarget sparcv9-*-*] } {
+ || [istarget sparcv9-*-*]
+ || [istarget mips*-*-*] } {
set et_sync_int_long_saved 1
}
}
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
- || [istarget sparcv9-*-*] } {
+ || [istarget sparcv9-*-*]
+ || [istarget mips*-*-*] } {
set et_sync_char_short_saved 1
}
}
$contents [add_options_for_c99_runtime ""]
}]
}
+
+# Return 1 if target wchar_t is at least 4 bytes.
+
+proc check_effective_target_4byte_wchar_t { } {
+ return [check_no_compiler_messages 4byte_wchar_t object {
+ int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
+ }]
+}
+
+# Return 1 if the target supports automatic stack alignment.
+
+proc check_effective_target_automatic_stack_alignment { } {
+ if { [istarget i?86*-*-*]
+ || [istarget x86_64-*-*] } then {
+ return 1
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if avx instructions can be compiled.
+
+proc check_effective_target_avx { } {
+ return [check_no_compiler_messages avx object {
+ void _mm256_zeroall (void)
+ {
+ __builtin_ia32_vzeroall ();
+ }
+ } "-O2 -mavx" ]
+}
+
+# Return 1 if C wchar_t type is compatible with char16_t.
+
+proc check_effective_target_wchar_t_char16_t_compatible { } {
+ return [check_no_compiler_messages wchar_t_char16_t object {
+ __WCHAR_TYPE__ wc;
+ __CHAR16_TYPE__ *p16 = &wc;
+ char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
+ }]
+}
+
+# Return 1 if C wchar_t type is compatible with char32_t.
+
+proc check_effective_target_wchar_t_char32_t_compatible { } {
+ return [check_no_compiler_messages wchar_t_char32_t object {
+ __WCHAR_TYPE__ wc;
+ __CHAR32_TYPE__ *p32 = &wc;
+ char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
+ }]
+}
+
+# Return 1 if pow10 function exists.
+
+proc check_effective_target_pow10 { } {
+ return [check_runtime pow10 {
+ #include <math.h>
+ int main () {
+ double x;
+ x = pow10 (1);
+ return 0;
+ }
+ } "-lm" ]
+}
+
+# Return 1 if current options generate DFP instructions, 0 otherwise.
+
+proc check_effective_target_hard_dfp {} {
+ return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
+ _Decimal64 x, y, z;
+ void foo (void) { z = x + y; }
+ }]
+}
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