-# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007
+# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009
# Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
}
###############################
+# proc check_weak_override_available { }
+###############################
+
+# Like check_weak_available, but return 0 if weak symbol definitions
+# cannot be overridden.
+
+proc check_weak_override_available { } {
+ if { [istarget "*-*-mingw*"] } {
+ return 0
+ }
+ return [check_weak_available]
+}
+
+###############################
# proc check_visibility_available { what_kind }
###############################
# Check if the ld used by gcc supports --gc-sections.
set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
- regsub ".*\n\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
+ regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
set ld_output [remote_exec host "$gcc_ld" "--help"]
if { [ string first "--gc-sections" $ld_output ] >= 0 } {
return 0
}
- # At present, there is no profiling support on NetWare.
- if { [istarget *-*-netware*] } {
+ # cygwin does not support -p.
+ if { [istarget *-*-cygwin*] && [lindex $test_what 1] == "-p" } {
return 0
}
# missing other needed machinery.
if { [istarget mmix-*-*]
|| [istarget arm*-*-eabi*]
+ || [istarget picochip-*-*]
+ || [istarget *-*-netware*]
|| [istarget arm*-*-elf]
|| [istarget arm*-*-symbianelf*]
|| [istarget avr-*-*]
|| [istarget m32c-*-elf]
|| [istarget m68k-*-elf]
|| [istarget m68k-*-uclinux*]
+ || [istarget mep-*-elf]
|| [istarget mips*-*-elf*]
+ || [istarget moxie-*-elf*]
+ || [istarget rx-*-*]
|| [istarget xstormy16-*]
|| [istarget xtensa*-*-elf]
+ || [istarget *-*-rtems*]
|| [istarget *-*-vxworks*] } {
set profiling_available_saved 0
} else {
return $profiling_available_saved
}
+# Check to see if a target is "freestanding". This is as per the definition
+# in Section 4 of C99 standard. Effectively, it is a target which supports no
+# extra headers or libraries other than what is considered essential.
+proc check_effective_target_freestanding { } {
+ if { [istarget picochip-*-*] } then {
+ return 1
+ } else {
+ return 0
+ }
+}
+
# Return 1 if target has packed layout of structure members by
# default, 0 otherwise. Note that this is slightly different than
# whether the target has "natural alignment": both attributes may be
}
# Return 1 if thread local storage (TLS) is supported, 0 otherwise.
-#
-# This won't change for different subtargets so cache the result.
proc check_effective_target_tls {} {
return [check_no_compiler_messages tls assembly {
}
# Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
-#
-# This won't change for different subtargets so cache the result.
proc check_effective_target_tls_native {} {
# VxWorks uses emulated TLS machinery, but with non-standard helper
}
# Return 1 if TLS executables can run correctly, 0 otherwise.
-#
-# This won't change for different subtargets so cache the result.
proc check_effective_target_tls_runtime {} {
return [check_runtime tls_runtime {
} "-pthread"]
}
+# Return 1 if compilation with -mpe-aligned-commons is error-free
+# for trivial code, 0 otherwise.
+
+proc check_effective_target_pe_aligned_commons {} {
+ if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
+ return [check_no_compiler_messages pe_aligned_commons object {
+ int foo;
+ } "-mpe-aligned-commons"]
+ }
+ return 0
+}
+
+# Return 1 if the target supports -static
+proc check_effective_target_static {} {
+ return [check_no_compiler_messages static executable {
+ int main (void) { return 0; }
+ } "-static"]
+}
+
# Return 1 if the target supports -fstack-protector
proc check_effective_target_fstack_protector {} {
return [check_runtime fstack_protector {
}]
}
+ # This proc is actually checking the availabilty of FPU
+ # support for doubles, so on the RX we must fail if the
+ # 64-bit double multilib has been selected.
+ if { [istarget rx-*-*] } {
+ return 0
+ # return [check_no_compiler_messages hard_float assembly {
+ #if defined __RX_64_BIT_DOUBLES__
+ #error FOO
+ #endif
+ # }]
+ }
+
# The generic test equates hard_float with "no call for adding doubles".
return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
double a (double b, double c) { return b + c; }
} [add_options_for_mips16_attribute ""]]
}
+# Return 1 if the target supports long double larger than double when
+# using the new ABI, 0 otherwise.
+
+proc check_effective_target_mips_newabi_large_long_double { } {
+ return [check_no_compiler_messages mips_newabi_large_long_double object {
+ int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
+ } "-mabi=64"]
+}
+
# Return 1 if the current multilib does not generate PIC by default.
proc check_effective_target_nonpic { } {
}]
}
+# Return 1 if the target supports executing VSX instructions, 0
+# otherwise. Cache the result.
+
+proc check_vsx_hw_available { } {
+ return [check_cached_effective_target vsx_hw_available {
+ # Some simulators are known to not support VSX instructions.
+ # For now, disable on Darwin
+ if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
+ expr 0
+ } else {
+ set options "-mvsx"
+ check_runtime_nocache vsx_hw_available {
+ int main()
+ {
+ #ifdef __MACH__
+ asm volatile ("xxlor vs0,vs0,vs0");
+ #else
+ asm volatile ("xxlor 0,0,0");
+ #endif
+ return 0;
+ }
+ } $options
+ }
+ }]
+}
+
# Return 1 if the target supports executing AltiVec instructions, 0
# otherwise. Cache the result.
expr 0
} else {
# Most targets don't require special flags for this test case, but
- # Darwin does.
+ # Darwin does. Just to be sure, make sure VSX is not enabled for
+ # the altivec tests.
if { [istarget *-*-darwin*]
|| [istarget *-*-aix*] } {
- set options "-maltivec"
+ set options "-maltivec -mno-vsx"
} else {
- set options ""
+ set options "-mno-vsx"
}
check_runtime_nocache vmx_hw_available {
int main()
}]
}
+# Return 1 if the target supports executing AltiVec and Cell PPU
+# instructions, 0 otherwise. Cache the result.
+
+proc check_effective_target_cell_hw { } {
+ return [check_cached_effective_target cell_hw_available {
+ # Some simulators are known to not support VMX and PPU instructions.
+ if { [istarget powerpc-*-eabi*] } {
+ expr 0
+ } else {
+ # Most targets don't require special flags for this test
+ # case, but Darwin and AIX do.
+ if { [istarget *-*-darwin*]
+ || [istarget *-*-aix*] } {
+ set options "-maltivec -mcpu=cell"
+ } else {
+ set options "-mcpu=cell"
+ }
+ check_runtime_nocache cell_hw_available {
+ int main()
+ {
+ #ifdef __MACH__
+ asm volatile ("vor v0,v0,v0");
+ asm volatile ("lvlx v0,r0,r0");
+ #else
+ asm volatile ("vor 0,0,0");
+ asm volatile ("lvlx 0,0,0");
+ #endif
+ return 0;
+ }
+ } $options
+ }
+ }]
+}
+
+# Return 1 if the target supports executing 64-bit instructions, 0
+# otherwise. Cache the result.
+
+proc check_effective_target_powerpc64 { } {
+ global powerpc64_available_saved
+ global tool
+
+ if [info exists powerpc64_available_saved] {
+ verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
+ } else {
+ set powerpc64_available_saved 0
+
+ # Some simulators are known to not support powerpc64 instructions.
+ if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
+ verbose "check_effective_target_powerpc64 returning 0" 2
+ return $powerpc64_available_saved
+ }
+
+ # Set up, compile, and execute a test program containing a 64-bit
+ # instruction. Include the current process ID in the file
+ # names to prevent conflicts with invocations for multiple
+ # testsuites.
+ set src ppc[pid].c
+ set exe ppc[pid].x
+
+ set f [open $src "w"]
+ puts $f "int main() {"
+ puts $f "#ifdef __MACH__"
+ puts $f " asm volatile (\"extsw r0,r0\");"
+ puts $f "#else"
+ puts $f " asm volatile (\"extsw 0,0\");"
+ puts $f "#endif"
+ puts $f " return 0; }"
+ close $f
+
+ set opts "additional_flags=-mcpu=G5"
+
+ verbose "check_effective_target_powerpc64 compiling testfile $src" 2
+ set lines [${tool}_target_compile $src $exe executable "$opts"]
+ file delete $src
+
+ if [string match "" $lines] then {
+ # No error message, compilation succeeded.
+ set result [${tool}_load "./$exe" "" ""]
+ set status [lindex $result 0]
+ remote_file build delete $exe
+ verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
+
+ if { $status == "pass" } then {
+ set powerpc64_available_saved 1
+ }
+ } else {
+ verbose "check_effective_target_powerpc64 testfile compilation failed" 2
+ }
+ }
+
+ return $powerpc64_available_saved
+}
+
# GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
# complex float arguments. This affects gfortran tests that call cabsf
# in libm built by an earlier compiler. Return 1 if libm uses the same
if { [istarget "hppa*-*-hpux10*"] } {
# HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
expr 0
+ } elseif { [istarget "*-*-vxworks"] } {
+ # vxworks doesn't have __cxa_atexit but subsequent test passes.
+ expr 0
} else {
check_runtime_nocache cxa_atexit_available {
// C++
}]
}
+# Return 1 if the target supports double larger than float,
+# 0 otherwise.
+
+proc check_effective_target_large_double { } {
+ return [check_no_compiler_messages large_double object {
+ int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
+ }]
+}
+
+# Return 1 if the target supports double of 64 bits,
+# 0 otherwise.
+
+proc check_effective_target_double64 { } {
+ return [check_no_compiler_messages double64 object {
+ int dummy[sizeof(double) == 8 ? 1 : -1];
+ }]
+}
+
+# Return 1 if the target supports double of at least 64 bits,
+# 0 otherwise.
+
+proc check_effective_target_double64plus { } {
+ return [check_no_compiler_messages double64plus object {
+ int dummy[sizeof(double) >= 8 ? 1 : -1];
+ }]
+}
+
# Return 1 if the target supports compiling fixed-point,
# 0 otherwise.
proc check_effective_target_dfp_nocache { } {
verbose "check_effective_target_dfp_nocache: compiling source" 2
set ret [check_no_compiler_messages_nocache dfp object {
- _Decimal32 x; _Decimal64 y; _Decimal128 z;
+ float x __attribute__((mode(DD)));
}]
verbose "check_effective_target_dfp_nocache: returning $ret" 2
return $ret
proc check_effective_target_dfprt_nocache { } {
return [check_runtime_nocache dfprt {
- _Decimal32 x = 1.2df; _Decimal64 y = 2.3dd; _Decimal128 z;
+ typedef float d64 __attribute__((mode(DD)));
+ d64 x = 1.2df, y = 2.3dd, z;
int main () { z = x + y; return 0; }
}]
}
verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
} else {
set et_vect_cmdline_needed_saved 1
- if { [istarget ia64-*-*]
+ if { [istarget alpha*-*-*]
+ || [istarget ia64-*-*]
|| (([istarget x86_64-*-*] || [istarget i?86-*-*])
&& [check_effective_target_lp64])
|| ([istarget powerpc*-*-*]
return $et_vect_int_saved
}
-# Return 1 if the target supports int->float conversion
+# Return 1 if the target supports signed int->float conversion
#
proc check_effective_target_vect_intfloat_cvt { } {
}
-# Return 1 if the target supports float->int conversion
+# Return 1 if the target supports unsigned int->float conversion
+#
+
+proc check_effective_target_vect_uintfloat_cvt { } {
+ global et_vect_uintfloat_cvt_saved
+
+ if [info exists et_vect_uintfloat_cvt_saved] {
+ verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
+ } else {
+ set et_vect_uintfloat_cvt_saved 0
+ if { [istarget i?86-*-*]
+ || ([istarget powerpc*-*-*]
+ && ![istarget powerpc-*-linux*paired*])
+ || [istarget x86_64-*-*] } {
+ set et_vect_uintfloat_cvt_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
+ return $et_vect_uintfloat_cvt_saved
+}
+
+
+# Return 1 if the target supports signed float->int conversion
#
proc check_effective_target_vect_floatint_cvt { } {
return $et_vect_floatint_cvt_saved
}
+# Return 1 if the target supports unsigned float->int conversion
+#
+
+proc check_effective_target_vect_floatuint_cvt { } {
+ global et_vect_floatuint_cvt_saved
+
+ if [info exists et_vect_floatuint_cvt_saved] {
+ verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
+ } else {
+ set et_vect_floatuint_cvt_saved 0
+ if { ([istarget powerpc*-*-*]
+ && ![istarget powerpc-*-linux*paired*]) } {
+ set et_vect_floatuint_cvt_saved 1
+ }
+ }
+
+ verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
+ return $et_vect_floatuint_cvt_saved
+}
+
# Return 1 is this is an arm target using 32-bit instructions
proc check_effective_target_arm32 { } {
return [check_no_compiler_messages arm32 assembly {
}
}
+# Return 1 if this is an ARM target supporting -mfpu=vfp
+# -mfloat-abi=hard. Some multilibs may be incompatible with these
+# options.
+
+proc check_effective_target_arm_hard_vfp_ok { } {
+ if { [check_effective_target_arm32] } {
+ return [check_no_compiler_messages arm_hard_vfp_ok executable {
+ int main() { return 0;}
+ } "-mfpu=vfp -mfloat-abi=hard"]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is an ARM target supporting -mfpu=neon
# -mfloat-abi=softfp. Some multilibs may be incompatible with these
# options.
proc check_effective_target_arm_neon_ok { } {
if { [check_effective_target_arm32] } {
return [check_no_compiler_messages arm_neon_ok object {
+ #include "arm_neon.h"
int dummy;
} "-mfpu=neon -mfloat-abi=softfp"]
} else {
} "-mthumb"]
}
+# Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
+# used.
+
+proc check_effective_target_arm_thumb2_ok { } {
+ return [check_no_compiler_messages arm_thumb2_ok assembly {
+ #if !defined(__thumb2__)
+ #error FOO
+ #endif
+ } "-mthumb"]
+}
+
# Return 1 if the target supports executing NEON instructions, 0
# otherwise. Cache the result.
}]
}
+# Return 1 if this is an ARM target that adheres to the ABI for the ARM
+# Architecture.
+
+proc check_effective_target_arm_eabi { } {
+ return [check_no_compiler_messages arm_eabi object {
+ #ifndef __ARM_EABI__
+ #error not EABI
+ #else
+ int dummy;
+ #endif
+ }]
+}
+
+# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
+# Some multilibs may be incompatible with this option.
+
+proc check_effective_target_arm_iwmmxt_ok { } {
+ if { [check_effective_target_arm32] } {
+ return [check_no_compiler_messages arm_iwmmxt_ok object {
+ int dummy;
+ } "-mcpu=iwmmxt"]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target with floating-point registers.
proc check_effective_target_powerpc_fprs { } {
}
}
+# Return 1 if this is a PowerPC target supporting -mvsx
+
+proc check_effective_target_powerpc_vsx_ok { } {
+ if { ([istarget powerpc*-*-*]
+ && ![istarget powerpc-*-linux*paired*])
+ || [istarget rs6000-*-*] } {
+ # AltiVec is not supported on AIX before 5.3.
+ if { [istarget powerpc*-*-aix4*]
+ || [istarget powerpc*-*-aix5.1*]
+ || [istarget powerpc*-*-aix5.2*] } {
+ return 0
+ }
+ return [check_no_compiler_messages powerpc_vsx_ok object {
+ int main (void) {
+#ifdef __MACH__
+ asm volatile ("xxlor vs0,vs0,vs0");
+#else
+ asm volatile ("xxlor 0,0,0");
+#endif
+ return 0;
+ }
+ } "-mvsx"]
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if this is a PowerPC target supporting -mcpu=cell.
+
+proc check_effective_target_powerpc_ppu_ok { } {
+ if [check_effective_target_powerpc_altivec_ok] {
+ return [check_no_compiler_messages cell_asm_available object {
+ int main (void) {
+#ifdef __MACH__
+ asm volatile ("lvlx v0,v0,v0");
+#else
+ asm volatile ("lvlx 0,0,0");
+#endif
+ return 0;
+ }
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target that supports SPU.
proc check_effective_target_powerpc_spu { } {
}
}
+# Return 1 if this is a PowerPC SPE target. The check includes options
+# specified by dg-options for this test, so don't cache the result.
+
+proc check_effective_target_powerpc_spe_nocache { } {
+ if { [istarget powerpc*-*-*] } {
+ return [check_no_compiler_messages_nocache powerpc_spe object {
+ #ifndef __SPE__
+ #error not SPE
+ #else
+ int dummy;
+ #endif
+ } [current_compiler_flags]]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target with SPE enabled.
proc check_effective_target_powerpc_spe { } {
}
}
+# Return 1 if this is a PowerPC 405 target. The check includes options
+# specified by dg-options for this test, so don't cache the result.
+
+proc check_effective_target_powerpc_405_nocache { } {
+ if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
+ return [check_no_compiler_messages_nocache powerpc_405 object {
+ #ifdef __PPC405__
+ int dummy;
+ #else
+ #error not a PPC405
+ #endif
+ } [current_compiler_flags]]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a SPU target with a toolchain that
# supports automatic overlay generation.
return $et_vect_no_align_saved
}
+# Return 1 if the target supports a vector misalign access, 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_hw_misalign { } {
+ global et_vect_hw_misalign_saved
+
+ if [info exists et_vect_hw_misalign_saved] {
+ verbose "check_effective_target_vect_hw_misalign: using cached result" 2
+ } else {
+ set et_vect_hw_misalign_saved 0
+ if { ([istarget x86_64-*-*]
+ || [istarget i?86-*-*]) } {
+ set et_vect_hw_misalign_saved 1
+ }
+ }
+ verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
+ return $et_vect_hw_misalign_saved
+}
+
+
# Return 1 if arrays are aligned to the vector alignment
# boundary, 0 otherwise.
#
if { [istarget ia64-*-*]
|| [istarget spu-*-*]
|| [istarget i?86-*-*]
- || [istarget x86_64-*-*]
- || [istarget powerpc*-*-*] } {
+ || [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*]
+ || [check_effective_target_arm32] } {
set et_vect_short_mult_saved 1
}
}
verbose "check_effective_target_section_anchors: using cached result" 2
} else {
set et_section_anchors_saved 0
- if { [istarget powerpc*-*-*] } {
+ if { [istarget powerpc*-*-*]
+ || [istarget arm*-*-*] } {
set et_section_anchors_saved 1
}
}
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
+ || [istarget bfin*-*linux*]
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
|| [istarget sparc64-*-*]
}
# Return 1 if target has the basic signed and unsigned types in
-# <stdint.h>, 0 otherwise.
+# <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
+# working <stdint.h> for all targets.
proc check_effective_target_stdint_types { } {
return [check_no_compiler_messages stdint_types assembly {
}]
}
+# Return 1 if target has the basic signed and unsigned types in
+# <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
+# these types agree with those in the header, as some systems have
+# only <inttypes.h>.
+
+proc check_effective_target_inttypes_types { } {
+ return [check_no_compiler_messages inttypes_types assembly {
+ #include <inttypes.h>
+ int8_t a; int16_t b; int32_t c; int64_t d;
+ uint8_t e; uint16_t f; uint32_t g; uint64_t h;
+ }]
+}
+
# Return 1 if programs are intended to be run on a simulator
# (i.e. slowly) rather than hardware (i.e. fast).
return $flags
}
+# Add to FLAGS all the target-specific flags needed to enable
+# full IEEE compliance mode.
+
+proc add_options_for_ieee { flags } {
+ if { [istarget "alpha*-*-*"]
+ || [istarget "sh*-*-*"] } {
+ return "$flags -mieee"
+ }
+ return $flags
+}
+
+# Add to FLAGS the flags needed to enable functions to bind locally
+# when using pic/PIC passes in the testsuite.
+
+proc add_options_for_bind_pic_locally { flags } {
+ if {[check_no_compiler_messages using_pic2 assembly {
+ #if __PIC__ != 2
+ #error FOO
+ #endif
+ }]} {
+ return "$flags -fPIE"
+ }
+ if {[check_no_compiler_messages using_pic1 assembly {
+ #if __PIC__ != 1
+ #error FOO
+ #endif
+ }]} {
+ return "$flags -fpie"
+ }
+
+ return $flags
+}
+
# Return 1 if the target provides a full C99 runtime.
proc check_effective_target_c99_runtime { } {
}
} "-lm" ]
}
+
+# Return 1 if current options generate DFP instructions, 0 otherwise.
+
+proc check_effective_target_hard_dfp {} {
+ return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
+ typedef float d64 __attribute__((mode(DD)));
+ d64 x, y, z;
+ void foo (void) { z = x + y; }
+ }]
+}
+
+# Return 1 if string.h and wchar.h headers provide C++ requires overloads
+# for strchr etc. functions.
+
+proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
+ return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
+ #include <string.h>
+ #include <wchar.h>
+ #if !defined(__cplusplus) \
+ || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
+ || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
+ ISO C++ correct string.h and wchar.h protos not supported.
+ #else
+ int i;
+ #endif
+ }]
+}
+
+# Return 1 if the compiler has been configure with link-time optimization
+# (LTO) support.
+
+proc check_effective_target_lto { } {
+ global ENABLE_LTO
+ return [info exists ENABLE_LTO]
+}
+
+# Return 1 if the MPC library is integrated with GCC, 0 otherwise.
+
+proc check_effective_target_mpc { } {
+ return [check_no_compiler_messages mpc executable {
+ extern void link_error(void);
+ int main ()
+ {
+ if (__builtin_csin(0) != 0)
+ link_error();
+ }
+ }]
+}
+
+# Return 1 if the MPC library with mpc_pow is integrated with GCC, 0 otherwise.
+
+proc check_effective_target_mpc_pow { } {
+ return [check_no_compiler_messages mpc_pow executable {
+ extern void link_error(void);
+ int main ()
+ {
+ if (__builtin_cpow(1,1) != 1)
+ link_error();
+ }
+ }]
+}
+
+# Return 1 if the MPC library with "arc" functions is integrated with GCC, 0 otherwise.
+
+proc check_effective_target_mpc_arc { } {
+ return [check_no_compiler_messages mpc_arc executable {
+ extern void link_error(void);
+ int main ()
+ {
+ if (__builtin_cacos(1) != 0)
+ link_error();
+ if (__builtin_casin(0) != 0)
+ link_error();
+ if (__builtin_catan(0) != 0)
+ link_error();
+ if (__builtin_cacosh(1) != 0)
+ link_error();
+ if (__builtin_casinh(0) != 0)
+ link_error();
+ if (__builtin_catanh(0) != 0)
+ link_error();
+ }
+ }]
+}
+
+# Return 1 if the language for the compiler under test is C.
+
+proc check_effective_target_c { } {
+ global tool
+ if [string match $tool "gcc"] {
+ return 1
+ }
+ return 0
+}
+
+# Return 1 if the language for the compiler under test is C++.
+
+proc check_effective_target_c++ { } {
+ global tool
+ if [string match $tool "g++"] {
+ return 1
+ }
+ return 0
+}