3. The print format, and type of each rtx->u.fld[] (field) in this rtx.
These formats are stored in rtx_format[].
The meaning of the formats is documented in front of this array in rtl.c
-
+
4. The class of the rtx. These are stored in rtx_class and are accessed
via the GET_RTX_CLASS macro. They are defined as follows:
DECL codes in trees. */
DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
+/* The RTL generated for a DEBUG_EXPR_DECL. It links back to the
+ DEBUG_EXPR_DECL in the first operand. */
+DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ)
+
/* ---------------------------------------------------------------------
Expressions used in constructing lists.
--------------------------------------------------------------------- */
/* ----------------------------------------------------------------------
Top level constituents of INSN, JUMP_INSN and CALL_INSN.
---------------------------------------------------------------------- */
-
+
/* Conditionally execute code.
Operand 0 is the condition that if true, the code is executed.
- Operand 1 is the code to be executed (typically a SET).
+ Operand 1 is the code to be executed (typically a SET).
Semantics are that there are no side effects if the condition
is false. This pattern is created automatically by the if_convert
genrecog.c record positions within an insn.)
UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL,
- or inside an expression.
+ or inside an expression.
UNSPEC by itself or as a component of a PARALLEL
is currently considered not deletable.
The third, fourth and fifth operands are only valid when
CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
compilations. */
-
+
DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
/* Memory prefetch, with attributes supported on some targets.
/* Indicate something is used in a way that we don't want to explain.
For example, subroutine calls will use the register
- in which the static chain is passed.
+ in which the static chain is passed.
USE can not appear as an operand of other rtx except for PARALLEL.
USE is not deletable, as it indicates that the operand
/* Indicate something is clobbered in a way that we don't want to explain.
For example, subroutine calls will clobber some physical registers
- (the ones that are by convention not saved).
+ (the ones that are by convention not saved).
CLOBBER can not appear as an operand of other rtx except for PARALLEL.
CLOBBER of a hard register appearing by itself (not within PARALLEL)
The operand is a CODE_LABEL found in the insn chain. */
DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
-/* Reference to a named label:
+/* Reference to a named label:
Operand 0: label name
Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
Operand 2: tree from which this symbol is derived, or null.
because they can be understood from the machine-mode of the
containing MEM. These operations exist in only two cases:
1. pushes onto the stack.
- 2. created automatically by the life_analysis pass in flow.c. */
+ 2. created automatically by the auto-inc-dec pass. */
DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
submodes as the input vector mode, and the number of output parts must be
an integer multiple of the number of input parts. */
DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
-
+
/* Addition with signed saturation */
DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
to the PARALLEL and the initial expressions in the PARALLEL are matched.
Operand 0 is the operand-number, as in match_operand.
Operand 1 is a predicate to apply to the PARALLEL.
- Operand 2 is a vector of expressions, each of which must match the
+ Operand 2 is a vector of expressions, each of which must match the
corresponding element in the PARALLEL. */
DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
C code to run to decide on a template to use. Otherwise, it is the
template to use.
4: C expression that must be true for split. This may start with "&&"
- in which case the split condition is the logical and of the insn
+ in which case the split condition is the logical and of the insn
condition and what follows the "&&" of this operand.
5: vector of insn patterns to place into a SEQUENCE
6: optionally, some C code to execute before generating the
insns. This might, for example, create some RTX's and store them in
elements of `recog_data.operand' for use by the vector of
insn-patterns.
- (`operands' is an alias here for `recog_data.operand').
+ (`operands' is an alias here for `recog_data.operand').
7: optionally, a vector of attributes for this insn. */
DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
insn-patterns.
(`operands' is an alias here for `recog_data.operand'). */
DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
-
+
/* Define a requirement for delay slots.
1st operand: Condition involving insn attributes that, if true,
indicates that the insn requires the number of delay slots
The first must be true for an insn to occupy that delay slot
location. The second is true for all insns that can be
annulled if the branch is true and the third is true for all
- insns that can be annulled if the branch is false.
+ insns that can be annulled if the branch is false.
Multiple DEFINE_DELAYs may be present. They indicate differing
requirements for delay slots. */
(reg X) where X is a base register. It is suitable for constraints that
describe a subset of all address references.
- When in doubt, use plain DEFINE_CONSTRAINT.
+ When in doubt, use plain DEFINE_CONSTRAINT.
Operand:
0: The name of the constraint (often, but not always, a single letter).
DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
-
+
/* Constructions for CPU pipeline description described by NDFAs. */
an asymmetric relation. CPU units or unit patterns in the strings
are separated by commas. Pattern is one unit name or unit names
separated by white-spaces.
-
+
For example, it is useful for description that slot1 is reserved
after slot0 reservation for a VLIW processor. We could describe it
by the following construction
state reservation, checking for `final_presence_set' is done on the
result reservation. This construction is useful to describe a
reservation which is actually two subsequent reservations. For
- example, if we use
+ example, if we use
(presence_set "slot1" "slot0")
o "time" which means printing additional time statistics about
generation of automata.
-
+
o "v" which means generation of file describing the result
automata. The file has suffix `.dfa' and can be used for the
description verification and debugging.
allof = allof "+" repeat
| repeat
-
+
repeat = element "*" number
| element
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