/* Expand the basic unary and binary arithmetic operations, for GNU compiler.
Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
This file is part of GCC.
See expr.h for documentation of these optabs. */
-#if GCC_VERSION >= 4000
-__extension__ struct optab optab_table[OTI_MAX]
+#if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
+__extension__ struct optab_d optab_table[OTI_MAX]
= { [0 ... OTI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1].insn_code
= CODE_FOR_nothing };
#else
/* init_insn_codes will do runtime initialization otherwise. */
-struct optab optab_table[OTI_MAX];
+struct optab_d optab_table[OTI_MAX];
#endif
rtx libfunc_table[LTI_MAX];
/* Tables of patterns for converting one mode to another. */
-#if GCC_VERSION >= 4000
-__extension__ struct convert_optab convert_optab_table[COI_MAX]
+#if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
+__extension__ struct convert_optab_d convert_optab_table[COI_MAX]
= { [0 ... COI_MAX - 1].handlers[0 ... NUM_MACHINE_MODES - 1]
[0 ... NUM_MACHINE_MODES - 1].insn_code
= CODE_FOR_nothing };
#else
/* init_convert_optab will do runtime initialization otherwise. */
-struct convert_optab convert_optab_table[COI_MAX];
+struct convert_optab_d convert_optab_table[COI_MAX];
#endif
/* Contains the optab used for each rtx code. */
optab code_to_optab[NUM_RTX_CODE + 1];
-/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
- gives the gen_function to make a branch to test that condition. */
-
-rtxfun bcc_gen_fctn[NUM_RTX_CODE];
-
-/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
- gives the insn code to make a store-condition insn
- to test that condition. */
-
-enum insn_code setcc_gen_code[NUM_RTX_CODE];
-
#ifdef HAVE_conditional_move
/* Indexed by the machine mode, gives the insn code to make a conditional
move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
enum insn_code vcond_gen_code[NUM_MACHINE_MODES];
enum insn_code vcondu_gen_code[NUM_MACHINE_MODES];
-/* The insn generating function can not take an rtx_code argument.
- TRAP_RTX is used as an rtx argument. Its code is replaced with
- the code to be used in the trap insn and all other fields are ignored. */
-static GTY(()) rtx trap_rtx;
-
-static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *,
- enum machine_mode *, int *);
+static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
+ enum machine_mode *);
static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
/* Debug facility for use in GDB. */
void debug_optab_libfuncs (void);
-#ifndef HAVE_conditional_trap
-#define HAVE_conditional_trap 0
-#define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX)
-#endif
-
/* Prefixes for the current version of decimal floating point (BID vs. DPD) */
#if ENABLE_DECIMAL_BID_FORMAT
#define DECIMAL_PREFIX "bid_"
/* Info about libfunc. We use same hashtable for normal optabs and conversion
optab. In the first case mode2 is unused. */
-struct libfunc_entry GTY(())
-{
+struct GTY(()) libfunc_entry {
size_t optab;
enum machine_mode mode1, mode2;
rtx libfunc;
part to OP. */
result = gen_reg_rtx (mode);
- emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
+ emit_clobber (result);
emit_move_insn (gen_lowpart (GET_MODE (op), result), op);
return result;
}
\f
-/* Return the optab used for computing the operation given by
- the tree code, CODE. This function is not always usable (for
- example, it cannot give complete results for multiplication
- or division) but probably ought to be relied on more widely
- throughout the expander. */
+/* Return the optab used for computing the operation given by the tree code,
+ CODE and the tree EXP. This function is not always usable (for example, it
+ cannot give complete results for multiplication or division) but probably
+ ought to be relied on more widely throughout the expander. */
optab
-optab_for_tree_code (enum tree_code code, const_tree type)
+optab_for_tree_code (enum tree_code code, const_tree type,
+ enum optab_subtype subtype)
{
bool trapv;
switch (code)
return TYPE_UNSIGNED (type) ? udiv_optab : sdiv_optab;
case LSHIFT_EXPR:
+ if (VECTOR_MODE_P (TYPE_MODE (type)))
+ {
+ if (subtype == optab_vector)
+ return TYPE_SATURATING (type) ? NULL : vashl_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
if (TYPE_SATURATING(type))
return TYPE_UNSIGNED(type) ? usashl_optab : ssashl_optab;
return ashl_optab;
case RSHIFT_EXPR:
+ if (VECTOR_MODE_P (TYPE_MODE (type)))
+ {
+ if (subtype == optab_vector)
+ return TYPE_UNSIGNED (type) ? vlshr_optab : vashr_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return TYPE_UNSIGNED (type) ? lshr_optab : ashr_optab;
case LROTATE_EXPR:
+ if (VECTOR_MODE_P (TYPE_MODE (type)))
+ {
+ if (subtype == optab_vector)
+ return vrotl_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return rotl_optab;
case RROTATE_EXPR:
+ if (VECTOR_MODE_P (TYPE_MODE (type)))
+ {
+ if (subtype == optab_vector)
+ return vrotr_optab;
+
+ gcc_assert (subtype == optab_scalar);
+ }
return rotr_optab;
case MAX_EXPR:
type-promotion (vec-unpack) 1 oprnd0 - - */
rtx
-expand_widen_pattern_expr (tree exp, rtx op0, rtx op1, rtx wide_op, rtx target,
- int unsignedp)
+expand_widen_pattern_expr (sepops ops, rtx op0, rtx op1, rtx wide_op,
+ rtx target, int unsignedp)
{
tree oprnd0, oprnd1, oprnd2;
- enum machine_mode wmode = 0, tmode0, tmode1 = 0;
+ enum machine_mode wmode = VOIDmode, tmode0, tmode1 = VOIDmode;
optab widen_pattern_optab;
int icode;
- enum machine_mode xmode0, xmode1 = 0, wxmode = 0;
+ enum machine_mode xmode0, xmode1 = VOIDmode, wxmode = VOIDmode;
rtx temp;
rtx pat;
rtx xop0, xop1, wxop;
- int nops = TREE_OPERAND_LENGTH (exp);
+ int nops = TREE_CODE_LENGTH (ops->code);
- oprnd0 = TREE_OPERAND (exp, 0);
+ oprnd0 = ops->op0;
tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
widen_pattern_optab =
- optab_for_tree_code (TREE_CODE (exp), TREE_TYPE (oprnd0));
+ optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default);
icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
gcc_assert (icode != CODE_FOR_nothing);
xmode0 = insn_data[icode].operand[1].mode;
if (nops >= 2)
{
- oprnd1 = TREE_OPERAND (exp, 1);
+ oprnd1 = ops->op1;
tmode1 = TYPE_MODE (TREE_TYPE (oprnd1));
xmode1 = insn_data[icode].operand[2].mode;
}
{
gcc_assert (tmode1 == tmode0);
gcc_assert (op1);
- oprnd2 = TREE_OPERAND (exp, 2);
+ oprnd2 = ops->op2;
wmode = TYPE_MODE (TREE_TYPE (oprnd2));
wxmode = insn_data[icode].operand[3].mode;
}
/* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
rtx
-expand_vec_shift_expr (tree vec_shift_expr, rtx target)
+expand_vec_shift_expr (sepops ops, rtx target)
{
enum insn_code icode;
rtx rtx_op1, rtx_op2;
enum machine_mode mode1;
enum machine_mode mode2;
- enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_shift_expr));
- tree vec_oprnd = TREE_OPERAND (vec_shift_expr, 0);
- tree shift_oprnd = TREE_OPERAND (vec_shift_expr, 1);
+ enum machine_mode mode = TYPE_MODE (ops->type);
+ tree vec_oprnd = ops->op0;
+ tree shift_oprnd = ops->op1;
optab shift_optab;
rtx pat;
- switch (TREE_CODE (vec_shift_expr))
+ switch (ops->code)
{
case VEC_RSHIFT_EXPR:
shift_optab = vec_shr_optab;
gcc_unreachable ();
}
- icode = (int) optab_handler (shift_optab, mode)->insn_code;
+ icode = optab_handler (shift_optab, mode)->insn_code;
gcc_assert (icode != CODE_FOR_nothing);
mode1 = insn_data[icode].operand[1].mode;
/* If we can compute the condition at compile time, pick the
appropriate subroutine. */
tmp = simplify_relational_operation (cmp_code, SImode, op1_mode, cmp1, cmp2);
- if (tmp != 0 && GET_CODE (tmp) == CONST_INT)
+ if (tmp != 0 && CONST_INT_P (tmp))
{
if (tmp == const0_rtx)
return expand_superword_shift (binoptab, outof_input, superword_op1,
If we want to multiply two two-word values and have normal and widening
multiplies of single-word values, we can do this with three smaller
- multiplications. Note that we do not make a REG_NO_CONFLICT block here
- because we are not operating on one word at a time.
+ multiplications.
The multiplication proceeds as follows:
_______________________
if (mode != VOIDmode
&& optimize
&& CONSTANT_P (x)
- && rtx_cost (x, binoptab->code) > COSTS_N_INSNS (1))
+ && rtx_cost (x, binoptab->code, optimize_insn_for_speed_p ())
+ > COSTS_N_INSNS (1))
{
- if (GET_CODE (x) == CONST_INT)
+ if (CONST_INT_P (x))
{
HOST_WIDE_INT intval = trunc_int_for_mode (INTVAL (x), mode);
if (intval != INTVAL (x))
enum optab_methods next_methods
= (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN
? OPTAB_WIDEN : methods);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
rtx libfunc;
rtx temp;
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
+ mclass = GET_MODE_CLASS (mode);
/* If subtracting an integer constant, convert this into an addition of
the negated constant. */
- if (binoptab == sub_optab && GET_CODE (op1) == CONST_INT)
+ if (binoptab == sub_optab && CONST_INT_P (op1))
{
op1 = negate_rtx (mode, op1);
binoptab = add_optab;
&& optab_handler (rotr_optab, mode)->insn_code != CODE_FOR_nothing)
|| (binoptab == rotr_optab
&& optab_handler (rotl_optab, mode)->insn_code != CODE_FOR_nothing))
- && class == MODE_INT)
+ && mclass == MODE_INT)
{
optab otheroptab = (binoptab == rotl_optab ? rotr_optab : rotl_optab);
rtx newop1;
unsigned int bits = GET_MODE_BITSIZE (mode);
- if (GET_CODE (op1) == CONST_INT)
+ if (CONST_INT_P (op1))
newop1 = GEN_INT (bits - INTVAL (op1));
else if (targetm.shift_truncation_mask (mode) == bits - 1)
newop1 = negate_rtx (mode, op1);
can open-code the operation. Check for a widening multiply at the
wider mode as well. */
- if (CLASS_HAS_WIDER_MODES_P (class)
+ if (CLASS_HAS_WIDER_MODES_P (mclass)
&& methods != OPTAB_DIRECT && methods != OPTAB_LIB)
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
|| binoptab == xor_optab
|| binoptab == add_optab || binoptab == sub_optab
|| binoptab == smul_optab || binoptab == ashl_optab)
- && class == MODE_INT)
+ && mclass == MODE_INT)
{
no_extend = 1;
xop0 = avoid_expensive_constant (mode, binoptab,
unsignedp, OPTAB_DIRECT);
if (temp)
{
- if (class != MODE_INT
+ if (mclass != MODE_INT
|| !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (wider_mode)))
{
/* These can be done a word at a time. */
if ((binoptab == and_optab || binoptab == ior_optab || binoptab == xor_optab)
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) > UNITS_PER_WORD
&& optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
{
else
equiv_value = 0;
- emit_no_conflict_block (insns, target, op0, op1, equiv_value);
+ emit_insn (insns);
return target;
}
}
/* Synthesize double word shifts from single word shifts. */
if ((binoptab == lshr_optab || binoptab == ashl_optab
|| binoptab == ashr_optab)
- && class == MODE_INT
- && (GET_CODE (op1) == CONST_INT || !optimize_size)
+ && mclass == MODE_INT
+ && (CONST_INT_P (op1) || optimize_insn_for_speed_p ())
&& GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
&& optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing
&& optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
op1_mode = GET_MODE (op1) != VOIDmode ? GET_MODE (op1) : word_mode;
/* Apply the truncation to constant shifts. */
- if (double_shift_mask > 0 && GET_CODE (op1) == CONST_INT)
+ if (double_shift_mask > 0 && CONST_INT_P (op1))
op1 = GEN_INT (INTVAL (op1) & double_shift_mask);
if (op1 == CONST0_RTX (op1_mode))
|| (shift_mask == BITS_PER_WORD - 1
&& double_shift_mask == BITS_PER_WORD * 2 - 1))
{
- rtx insns, equiv_value;
+ rtx insns;
rtx into_target, outof_target;
rtx into_input, outof_input;
int left_shift, outof_word;
insns = get_insns ();
end_sequence ();
- equiv_value = gen_rtx_fmt_ee (binoptab->code, mode, op0, op1);
- emit_no_conflict_block (insns, target, op0, op1, equiv_value);
+ emit_insn (insns);
return target;
}
end_sequence ();
/* Synthesize double word rotates from single word shifts. */
if ((binoptab == rotl_optab || binoptab == rotr_optab)
- && class == MODE_INT
- && GET_CODE (op1) == CONST_INT
+ && mclass == MODE_INT
+ && CONST_INT_P (op1)
&& GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
&& optab_handler (ashl_optab, word_mode)->insn_code != CODE_FOR_nothing
&& optab_handler (lshr_optab, word_mode)->insn_code != CODE_FOR_nothing)
if (inter != 0)
{
- /* One may be tempted to wrap the insns in a REG_NO_CONFLICT
- block to help the register allocator a bit. But a multi-word
- rotate will need all the input bits when setting the output
- bits, so there clearly is a conflict between the input and
- output registers. So we can't use a no-conflict block here. */
emit_insn (insns);
return target;
}
/* These can be done a word at a time by propagating carries. */
if ((binoptab == add_optab || binoptab == sub_optab)
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) >= 2 * UNITS_PER_WORD
&& optab_handler (binoptab, word_mode)->insn_code != CODE_FOR_nothing)
{
/* Indicate for flow that the entire target reg is being set. */
if (REG_P (target))
- emit_insn (gen_rtx_CLOBBER (VOIDmode, xtarget));
+ emit_clobber (xtarget);
/* Do the actual arithmetic. */
for (i = 0; i < nwords; i++)
try using a signed widening multiply. */
if (binoptab == smul_optab
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
&& optab_handler (smul_optab, word_mode)->insn_code != CODE_FOR_nothing
&& optab_handler (add_optab, word_mode)->insn_code != CODE_FOR_nothing)
/* Look for a wider mode of the same class for which it appears we can do
the operation. */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
|| binoptab == xor_optab
|| binoptab == add_optab || binoptab == sub_optab
|| binoptab == smul_optab || binoptab == ashl_optab)
- && class == MODE_INT)
+ && mclass == MODE_INT)
no_extend = 1;
xop0 = widen_operand (xop0, wider_mode, mode,
unsignedp, methods);
if (temp)
{
- if (class != MODE_INT
+ if (mclass != MODE_INT
|| !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (wider_mode)))
{
{
rtx temp;
optab direct_optab = unsignedp ? uoptab : soptab;
- struct optab wide_soptab;
+ struct optab_d wide_soptab;
/* Do it without widening, if possible. */
temp = expand_binop (mode, direct_optab, op0, op1, target,
if (temp || methods == OPTAB_WIDEN)
return temp;
- /* Use the right width lib call if that exists. */
+ /* Use the right width libcall if that exists. */
temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB);
if (temp || methods == OPTAB_LIB)
return temp;
- /* Must widen and use a lib call, use either signed or unsigned. */
+ /* Must widen and use a libcall, use either signed or unsigned. */
temp = expand_binop (mode, &wide_soptab, op0, op1, target,
unsignedp, methods);
if (temp != 0)
int unsignedp)
{
enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
+ mclass = GET_MODE_CLASS (mode);
if (!targ0)
targ0 = gen_reg_rtx (mode);
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
int unsignedp)
{
enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
- enum mode_class class;
+ enum mode_class mclass;
enum machine_mode wider_mode;
rtx entry_last = get_last_insn ();
rtx last;
- class = GET_MODE_CLASS (mode);
+ mclass = GET_MODE_CLASS (mode);
if (!targ0)
targ0 = gen_reg_rtx (mode);
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
static rtx
widen_clz (enum machine_mode mode, rtx op0, rtx target)
{
- enum mode_class class = GET_MODE_CLASS (mode);
- if (CLASS_HAS_WIDER_MODES_P (class))
+ enum mode_class mclass = GET_MODE_CLASS (mode);
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
enum machine_mode wider_mode;
for (wider_mode = GET_MODE_WIDER_MODE (mode);
static rtx
widen_bswap (enum machine_mode mode, rtx op0, rtx target)
{
- enum mode_class class = GET_MODE_CLASS (mode);
+ enum mode_class mclass = GET_MODE_CLASS (mode);
enum machine_mode wider_mode;
rtx x, last;
- if (!CLASS_HAS_WIDER_MODES_P (class))
+ if (!CLASS_HAS_WIDER_MODES_P (mclass))
return NULL_RTX;
for (wider_mode = GET_MODE_WIDER_MODE (mode);
if (target == 0)
target = gen_reg_rtx (mode);
if (REG_P (target))
- emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
+ emit_clobber (target);
emit_move_insn (operand_subword (target, 0, 1, mode), t0);
emit_move_insn (operand_subword (target, 1, 1, mode), t1);
static rtx
expand_parity (enum machine_mode mode, rtx op0, rtx target)
{
- enum mode_class class = GET_MODE_CLASS (mode);
- if (CLASS_HAS_WIDER_MODES_P (class))
+ enum mode_class mclass = GET_MODE_CLASS (mode);
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
enum machine_mode wider_mode;
for (wider_mode = mode; wider_mode != VOIDmode;
insns = get_insns ();
end_sequence ();
- temp = gen_rtx_fmt_e (code, mode, copy_rtx (op0));
- emit_no_conflict_block (insns, target, op0, NULL_RTX, temp);
+ emit_insn (insns);
}
else
{
expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
int unsignedp)
{
- enum mode_class class = GET_MODE_CLASS (mode);
+ enum mode_class mclass = GET_MODE_CLASS (mode);
enum machine_mode wider_mode;
rtx temp;
rtx libfunc;
goto try_libcall;
}
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
wider_mode = GET_MODE_WIDER_MODE (wider_mode))
xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
(unoptab == neg_optab
|| unoptab == one_cmpl_optab)
- && class == MODE_INT);
+ && mclass == MODE_INT);
temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
unsignedp);
if (temp)
{
- if (class != MODE_INT
+ if (mclass != MODE_INT
|| !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
GET_MODE_BITSIZE (wider_mode)))
{
/* These can be done a word at a time. */
if (unoptab == one_cmpl_optab
- && class == MODE_INT
+ && mclass == MODE_INT
&& GET_MODE_SIZE (mode) > UNITS_PER_WORD
&& optab_handler (unoptab, word_mode)->insn_code != CODE_FOR_nothing)
{
insns = get_insns ();
end_sequence ();
- emit_no_conflict_block (insns, target, op0, NULL_RTX,
- gen_rtx_fmt_e (unoptab->code, mode,
- copy_rtx (op0)));
+ emit_insn (insns);
return target;
}
if (unoptab == ffs_optab || unoptab == clz_optab || unoptab == ctz_optab
|| unoptab == popcount_optab || unoptab == parity_optab)
outmode
- = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node)));
+ = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node),
+ optab_libfunc (unoptab, mode)));
start_sequence ();
/* It can't be done in this mode. Can we do it in a wider mode? */
- if (CLASS_HAS_WIDER_MODES_P (class))
+ if (CLASS_HAS_WIDER_MODES_P (mclass))
{
for (wider_mode = GET_MODE_WIDER_MODE (mode);
wider_mode != VOIDmode;
xop0 = widen_operand (xop0, wider_mode, mode, unsignedp,
(unoptab == neg_optab
|| unoptab == one_cmpl_optab)
- && class == MODE_INT);
+ && mclass == MODE_INT);
temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX,
unsignedp);
if (temp)
{
- if (class != MODE_INT)
+ if (mclass != MODE_INT)
{
if (target == 0)
target = gen_reg_rtx (mode);
value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
where W is the width of MODE. */
- if (GET_MODE_CLASS (mode) == MODE_INT && BRANCH_COST >= 2)
+ if (GET_MODE_CLASS (mode) == MODE_INT
+ && BRANCH_COST (optimize_insn_for_speed_p (),
+ false) >= 2)
{
rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
size_int (GET_MODE_BITSIZE (mode) - 1),
return target;
}
+/* Emit code to compute the one's complement absolute value of OP0
+ (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
+ (TARGET may be NULL_RTX.) The return value says where the result
+ actually is to be found.
+
+ MODE is the mode of the operand; the mode of the result is
+ different but can be deduced from MODE. */
+
+rtx
+expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
+{
+ rtx temp;
+
+ /* Not applicable for floating point modes. */
+ if (FLOAT_MODE_P (mode))
+ return NULL_RTX;
+
+ /* If we have a MAX insn, we can do this as MAX (x, ~x). */
+ if (optab_handler (smax_optab, mode)->insn_code != CODE_FOR_nothing)
+ {
+ rtx last = get_last_insn ();
+
+ temp = expand_unop (mode, one_cmpl_optab, op0, NULL_RTX, 0);
+ if (temp != 0)
+ temp = expand_binop (mode, smax_optab, op0, temp, target, 0,
+ OPTAB_WIDEN);
+
+ if (temp != 0)
+ return temp;
+
+ delete_insns_since (last);
+ }
+
+ /* If this machine has expensive jumps, we can do one's complement
+ absolute value of X as (((signed) x >> (W-1)) ^ x). */
+
+ if (GET_MODE_CLASS (mode) == MODE_INT
+ && BRANCH_COST (optimize_insn_for_speed_p (),
+ false) >= 2)
+ {
+ rtx extended = expand_shift (RSHIFT_EXPR, mode, op0,
+ size_int (GET_MODE_BITSIZE (mode) - 1),
+ NULL_RTX, 0);
+
+ temp = expand_binop (mode, xor_optab, extended, op0, target, 0,
+ OPTAB_LIB_WIDEN);
+
+ if (temp != 0)
+ return temp;
+ }
+
+ return NULL_RTX;
+}
+
/* A subroutine of expand_copysign, perform the copysign operation using the
abs and neg primitives advertised to exist on the target. The assumption
is that we have a split register file, and leaving op0 in fp registers,
insns = get_insns ();
end_sequence ();
- emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
+ emit_insn (insns);
}
else
{
with two operands: an output TARGET and an input OP0.
TARGET *must* be nonzero, and the output is always stored there.
CODE is an rtx code such that (CODE OP0) is an rtx that describes
- the value that is stored into TARGET. */
+ the value that is stored into TARGET.
-void
-emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
+ Return false if expansion failed. */
+
+bool
+maybe_emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
{
rtx temp;
enum machine_mode mode0 = insn_data[icode].operand[1].mode;
rtx pat;
+ rtx last = get_last_insn ();
temp = target;
temp = gen_reg_rtx (GET_MODE (temp));
pat = GEN_FCN (icode) (temp, op0);
+ if (!pat)
+ {
+ delete_insns_since (last);
+ return false;
+ }
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
add_equal_note (pat, temp, code, op0, NULL_RTX);
if (temp != target)
emit_move_insn (target, temp);
+ return true;
+}
+/* Generate an instruction whose insn-code is INSN_CODE,
+ with two operands: an output TARGET and an input OP0.
+ TARGET *must* be nonzero, and the output is always stored there.
+ CODE is an rtx code such that (CODE OP0) is an rtx that describes
+ the value that is stored into TARGET. */
+
+void
+emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
+{
+ bool ok = maybe_emit_unop_insn (icode, target, op0, code);
+ gcc_assert (ok);
}
\f
struct no_conflict_data
bool must_stay;
};
-/* Called via note_stores by emit_no_conflict_block and emit_libcall_block.
- Set P->must_stay if the currently examined clobber / store has to stay
- in the list of insns that constitute the actual no_conflict block /
- libcall block. */
+/* Called via note_stores by emit_libcall_block. Set P->must_stay if
+ the currently examined clobber / store has to stay in the list of
+ insns that constitute the actual libcall block. */
static void
no_conflict_move_test (rtx dest, const_rtx set, void *p0)
{
- struct no_conflict_data *p= p0;
+ struct no_conflict_data *p= (struct no_conflict_data *) p0;
/* If this inns directly contributes to setting the target, it must stay. */
if (reg_overlap_mentioned_p (p->target, dest))
p->must_stay = true;
}
-/* Encapsulate the block starting at FIRST and ending with LAST, which is
- logically equivalent to EQUIV, so it gets manipulated as a unit if it
- is possible to do so. */
-
-void
-maybe_encapsulate_block (rtx first, rtx last, rtx equiv)
-{
- if (!flag_non_call_exceptions || !may_trap_p (equiv))
- {
- /* We can't attach the REG_LIBCALL and REG_RETVAL notes when the
- encapsulated region would not be in one basic block, i.e. when
- there is a control_flow_insn_p insn between FIRST and LAST. */
- bool attach_libcall_retval_notes = true;
- rtx insn, next = NEXT_INSN (last);
-
- for (insn = first; insn != next; insn = NEXT_INSN (insn))
- if (control_flow_insn_p (insn))
- {
- attach_libcall_retval_notes = false;
- break;
- }
-
- if (attach_libcall_retval_notes)
- {
- REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
- REG_NOTES (first));
- REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
- REG_NOTES (last));
- }
- }
-}
-
-/* Emit code to perform a series of operations on a multi-word quantity, one
- word at a time.
-
- Such a block is preceded by a CLOBBER of the output, consists of multiple
- insns, each setting one word of the output, and followed by a SET copying
- the output to itself.
-
- Each of the insns setting words of the output receives a REG_NO_CONFLICT
- note indicating that it doesn't conflict with the (also multi-word)
- inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
- notes.
-
- INSNS is a block of code generated to perform the operation, not including
- the CLOBBER and final copy. All insns that compute intermediate values
- are first emitted, followed by the block as described above.
-
- TARGET, OP0, and OP1 are the output and inputs of the operations,
- respectively. OP1 may be zero for a unary operation.
-
- EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
- on the last insn.
-
- If TARGET is not a register, INSNS is simply emitted with no special
- processing. Likewise if anything in INSNS is not an INSN or if
- there is a libcall block inside INSNS.
-
- The final insn emitted is returned. */
-
-rtx
-emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv)
-{
- rtx prev, next, first, last, insn;
-
- if (!REG_P (target) || reload_in_progress)
- return emit_insn (insns);
- else
- for (insn = insns; insn; insn = NEXT_INSN (insn))
- if (!NONJUMP_INSN_P (insn)
- || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
- return emit_insn (insns);
-
- /* First emit all insns that do not store into words of the output and remove
- these from the list. */
- for (insn = insns; insn; insn = next)
- {
- rtx note;
- struct no_conflict_data data;
-
- next = NEXT_INSN (insn);
-
- /* Some ports (cris) create a libcall regions at their own. We must
- avoid any potential nesting of LIBCALLs. */
- if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
- remove_note (insn, note);
-
- data.target = target;
- data.first = insns;
- data.insn = insn;
- data.must_stay = 0;
- note_stores (PATTERN (insn), no_conflict_move_test, &data);
- if (! data.must_stay)
- {
- if (PREV_INSN (insn))
- NEXT_INSN (PREV_INSN (insn)) = next;
- else
- insns = next;
-
- if (next)
- PREV_INSN (next) = PREV_INSN (insn);
-
- add_insn (insn);
- }
- }
-
- prev = get_last_insn ();
-
- /* Now write the CLOBBER of the output, followed by the setting of each
- of the words, followed by the final copy. */
- if (target != op0 && target != op1)
- emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
-
- for (insn = insns; insn; insn = next)
- {
- next = NEXT_INSN (insn);
- add_insn (insn);
-
- if (op1 && REG_P (op1))
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op1,
- REG_NOTES (insn));
-
- if (op0 && REG_P (op0))
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT, op0,
- REG_NOTES (insn));
- }
-
- if (optab_handler (mov_optab, GET_MODE (target))->insn_code
- != CODE_FOR_nothing)
- {
- last = emit_move_insn (target, target);
- if (equiv)
- set_unique_reg_note (last, REG_EQUAL, equiv);
- }
- else
- {
- last = get_last_insn ();
-
- /* Remove any existing REG_EQUAL note from "last", or else it will
- be mistaken for a note referring to the full contents of the
- alleged libcall value when found together with the REG_RETVAL
- note added below. An existing note can come from an insn
- expansion at "last". */
- remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
- }
-
- if (prev == 0)
- first = get_insns ();
- else
- first = NEXT_INSN (prev);
-
- maybe_encapsulate_block (first, last, equiv);
-
- return last;
-}
\f
/* Emit code to make a call to a constant function or a library call.
loading constants into registers; doing so allows them to be safely cse'ed
between blocks. Then we emit all the other insns in the block, followed by
an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
- note with an operand of EQUIV.
-
- Moving assignments to pseudos outside of the block is done to improve
- the generated code, but is not required to generate correct code,
- hence being unable to move an assignment is not grounds for not making
- a libcall block. There are two reasons why it is safe to leave these
- insns inside the block: First, we know that these pseudos cannot be
- used in generated RTL outside the block since they are created for
- temporary purposes within the block. Second, CSE will not record the
- values of anything set inside a libcall block, so we know they must
- be dead at the end of the block.
-
- Except for the first group of insns (the ones setting pseudos), the
- block is delimited by REG_RETVAL and REG_LIBCALL notes. */
+ note with an operand of EQUIV. */
+
void
emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
{
rtx final_dest = target;
- rtx prev, next, first, last, insn;
+ rtx prev, next, last, insn;
/* If this is a reg with REG_USERVAR_P set, then it could possibly turn
into a MEM later. Protect the libcall block from this change. */
/* If we're using non-call exceptions, a libcall corresponding to an
operation that may trap may also trap. */
+ /* ??? See the comment in front of make_reg_eh_region_note. */
if (flag_non_call_exceptions && may_trap_p (equiv))
{
for (insn = insns; insn; insn = NEXT_INSN (insn))
if (CALL_P (insn))
{
rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-
- if (note != 0 && INTVAL (XEXP (note, 0)) <= 0)
- remove_note (insn, note);
+ if (note)
+ {
+ int lp_nr = INTVAL (XEXP (note, 0));
+ if (lp_nr == 0 || lp_nr == INT_MIN)
+ remove_note (insn, note);
+ }
}
}
else
- /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
- reg note to indicate that this call cannot throw or execute a nonlocal
- goto (unless there is already a REG_EH_REGION note, in which case
- we update it). */
- for (insn = insns; insn; insn = NEXT_INSN (insn))
- if (CALL_P (insn))
- {
- rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-
- if (note != 0)
- XEXP (note, 0) = constm1_rtx;
- else
- REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EH_REGION, constm1_rtx,
- REG_NOTES (insn));
- }
+ {
+ /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
+ reg note to indicate that this call cannot throw or execute a nonlocal
+ goto (unless there is already a REG_EH_REGION note, in which case
+ we update it). */
+ for (insn = insns; insn; insn = NEXT_INSN (insn))
+ if (CALL_P (insn))
+ make_reg_eh_region_note_nothrow_nononlocal (insn);
+ }
/* First emit all insns that set pseudos. Remove them from the list as
we go. Avoid insns that set pseudos which were referenced in previous
for (insn = insns; insn; insn = next)
{
rtx set = single_set (insn);
- rtx note;
-
- /* Some ports (cris) create a libcall regions at their own. We must
- avoid any potential nesting of LIBCALLs. */
- if ((note = find_reg_note (insn, REG_LIBCALL, NULL)) != NULL)
- remove_note (insn, note);
- if ((note = find_reg_note (insn, REG_RETVAL, NULL)) != NULL)
- remove_note (insn, note);
next = NEXT_INSN (insn);
if (optab_handler (mov_optab, GET_MODE (target))->insn_code
!= CODE_FOR_nothing)
set_unique_reg_note (last, REG_EQUAL, copy_rtx (equiv));
- else
- {
- /* Remove any existing REG_EQUAL note from "last", or else it will
- be mistaken for a note referring to the full contents of the
- libcall value when found together with the REG_RETVAL note added
- below. An existing note can come from an insn expansion at
- "last". */
- remove_note (last, find_reg_note (last, REG_EQUAL, NULL_RTX));
- }
if (final_dest != target)
emit_move_insn (final_dest, target);
-
- if (prev == 0)
- first = get_insns ();
- else
- first = NEXT_INSN (prev);
-
- maybe_encapsulate_block (first, last, equiv);
}
\f
/* Nonzero if we can perform a comparison of mode MODE straightforwardly.
can_compare_p (enum rtx_code code, enum machine_mode mode,
enum can_compare_purpose purpose)
{
+ rtx test;
+ test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
do
{
- if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing)
- {
- if (purpose == ccp_jump)
- return bcc_gen_fctn[(int) code] != NULL;
- else if (purpose == ccp_store_flag)
- return setcc_gen_code[(int) code] != CODE_FOR_nothing;
- else
- /* There's only one cmov entry point, and it's allowed to fail. */
- return 1;
- }
+ int icode;
+
if (purpose == ccp_jump
- && optab_handler (cbranch_optab, mode)->insn_code != CODE_FOR_nothing)
- return 1;
+ && (icode = optab_handler (cbranch_optab, mode)->insn_code) != CODE_FOR_nothing
+ && insn_data[icode].operand[0].predicate (test, mode))
+ return 1;
+ if (purpose == ccp_store_flag
+ && (icode = optab_handler (cstore_optab, mode)->insn_code) != CODE_FOR_nothing
+ && insn_data[icode].operand[1].predicate (test, mode))
+ return 1;
if (purpose == ccp_cmov
&& optab_handler (cmov_optab, mode)->insn_code != CODE_FOR_nothing)
return 1;
- if (purpose == ccp_store_flag
- && optab_handler (cstore_optab, mode)->insn_code != CODE_FOR_nothing)
- return 1;
+
mode = GET_MODE_WIDER_MODE (mode);
+ PUT_MODE (test, mode);
}
while (mode != VOIDmode);
*PMODE is the mode of the inputs (in case they are const_int).
*PUNSIGNEDP nonzero says that the operands are unsigned;
- this matters if they need to be widened.
+ this matters if they need to be widened (as given by METHODS).
If they have mode BLKmode, then SIZE specifies the size of both operands.
comparisons must have already been folded. */
static void
-prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
- enum machine_mode *pmode, int *punsignedp,
- enum can_compare_purpose purpose)
+prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
+ int unsignedp, enum optab_methods methods,
+ rtx *ptest, enum machine_mode *pmode)
{
enum machine_mode mode = *pmode;
- rtx x = *px, y = *py;
- int unsignedp = *punsignedp;
- rtx libfunc;
+ rtx libfunc, test;
+ enum machine_mode cmp_mode;
+ enum mode_class mclass;
+
+ /* The other methods are not needed. */
+ gcc_assert (methods == OPTAB_DIRECT || methods == OPTAB_WIDEN
+ || methods == OPTAB_LIB_WIDEN);
- /* If we are inside an appropriately-short loop and we are optimizing,
- force expensive constants into a register. */
+ /* If we are optimizing, force expensive constants into a register. */
if (CONSTANT_P (x) && optimize
- && rtx_cost (x, COMPARE) > COSTS_N_INSNS (1))
+ && (rtx_cost (x, COMPARE, optimize_insn_for_speed_p ())
+ > COSTS_N_INSNS (1)))
x = force_reg (mode, x);
if (CONSTANT_P (y) && optimize
- && rtx_cost (y, COMPARE) > COSTS_N_INSNS (1))
+ && (rtx_cost (y, COMPARE, optimize_insn_for_speed_p ())
+ > COSTS_N_INSNS (1)))
y = force_reg (mode, y);
#ifdef HAVE_cc0
/* Don't let both operands fail to indicate the mode. */
if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode)
x = force_reg (mode, x);
+ if (mode == VOIDmode)
+ mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : GET_MODE (y);
/* Handle all BLKmode compares. */
if (mode == BLKmode)
{
- enum machine_mode cmp_mode, result_mode;
+ enum machine_mode result_mode;
enum insn_code cmp_code;
tree length_type;
rtx libfunc;
continue;
/* Must make sure the size fits the insn's mode. */
- if ((GET_CODE (size) == CONST_INT
+ if ((CONST_INT_P (size)
&& INTVAL (size) >= (1 << GET_MODE_BITSIZE (cmp_mode)))
|| (GET_MODE_BITSIZE (GET_MODE (size))
> GET_MODE_BITSIZE (cmp_mode)))
size = convert_to_mode (cmp_mode, size, 1);
emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign));
- *px = result;
- *py = const0_rtx;
- *pmode = result_mode;
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
+ *pmode = result_mode;
return;
}
+ if (methods != OPTAB_LIB && methods != OPTAB_LIB_WIDEN)
+ goto fail;
+
/* Otherwise call a library function, memcmp. */
libfunc = memcmp_libfunc;
length_type = sizetype;
size = convert_to_mode (TYPE_MODE (length_type), size,
TYPE_UNSIGNED (length_type));
- result = emit_library_call_value (libfunc, 0, LCT_PURE_MAKE_BLOCK,
+ result = emit_library_call_value (libfunc, 0, LCT_PURE,
result_mode, 3,
XEXP (x, 0), Pmode,
XEXP (y, 0), Pmode,
size, cmp_mode);
- *px = result;
- *py = const0_rtx;
+
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx);
*pmode = result_mode;
return;
}
y = force_reg (mode, y);
}
- *px = x;
- *py = y;
- if (can_compare_p (*pcomparison, mode, purpose))
- return;
+ if (GET_MODE_CLASS (mode) == MODE_CC)
+ {
+ gcc_assert (can_compare_p (comparison, CCmode, ccp_jump));
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ return;
+ }
- /* Handle a lib call just for the mode we are using. */
+ mclass = GET_MODE_CLASS (mode);
+ test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y);
+ cmp_mode = mode;
+ do
+ {
+ enum insn_code icode;
+ icode = optab_handler (cbranch_optab, cmp_mode)->insn_code;
+ if (icode != CODE_FOR_nothing
+ && insn_data[icode].operand[0].predicate (test, VOIDmode))
+ {
+ rtx last = get_last_insn ();
+ rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
+ rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
+ if (op0 && op1
+ && insn_data[icode].operand[1].predicate
+ (op0, insn_data[icode].operand[1].mode)
+ && insn_data[icode].operand[2].predicate
+ (op1, insn_data[icode].operand[2].mode))
+ {
+ XEXP (test, 0) = op0;
+ XEXP (test, 1) = op1;
+ *ptest = test;
+ *pmode = cmp_mode;
+ return;
+ }
+ delete_insns_since (last);
+ }
- libfunc = optab_libfunc (cmp_optab, mode);
- if (libfunc && !SCALAR_FLOAT_MODE_P (mode))
+ if (methods == OPTAB_DIRECT || !CLASS_HAS_WIDER_MODES_P (mclass))
+ break;
+ cmp_mode = GET_MODE_WIDER_MODE (cmp_mode);
+ }
+ while (cmp_mode != VOIDmode);
+
+ if (methods != OPTAB_LIB_WIDEN)
+ goto fail;
+
+ if (!SCALAR_FLOAT_MODE_P (mode))
{
rtx result;
+ /* Handle a libcall just for the mode we are using. */
+ libfunc = optab_libfunc (cmp_optab, mode);
+ gcc_assert (libfunc);
+
/* If we want unsigned, and this mode has a distinct unsigned
comparison routine, use that. */
if (unsignedp)
libfunc = ulibfunc;
}
- result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST_MAKE_BLOCK,
+ result = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
targetm.libgcc_cmp_return_mode (),
2, x, mode, y, mode);
case. For unsigned comparisons always compare against 1 after
biasing the unbiased result by adding 1. This gives us a way to
represent LTU. */
- *px = result;
- *pmode = word_mode;
- *py = const1_rtx;
+ x = result;
+ y = const1_rtx;
if (!TARGET_LIB_INT_CMP_BIASED)
{
- if (*punsignedp)
- *px = plus_constant (result, 1);
+ if (unsignedp)
+ x = plus_constant (result, 1);
else
- *py = const0_rtx;
+ y = const0_rtx;
}
- return;
+
+ *pmode = word_mode;
+ prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
+ ptest, pmode);
}
+ else
+ prepare_float_lib_cmp (x, y, comparison, ptest, pmode);
- gcc_assert (SCALAR_FLOAT_MODE_P (mode));
- prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
+ return;
+
+ fail:
+ *ptest = NULL_RTX;
}
/* Before emitting an insn with code ICODE, make sure that X, which is going
WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
that it is accepted by the operand predicate. Return the new value. */
-static rtx
+rtx
prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
enum machine_mode wider_mode, int unsignedp)
{
}
/* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
- we can do the comparison.
- The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
- be NULL_RTX which indicates that only a comparison is to be generated. */
+ we can do the branch. */
static void
-emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
- enum rtx_code comparison, int unsignedp, rtx label)
+emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label)
{
- rtx test = gen_rtx_fmt_ee (comparison, mode, x, y);
- enum mode_class class = GET_MODE_CLASS (mode);
- enum machine_mode wider_mode = mode;
-
- /* Try combined insns first. */
- do
- {
- enum insn_code icode;
- PUT_MODE (test, wider_mode);
-
- if (label)
- {
- icode = optab_handler (cbranch_optab, wider_mode)->insn_code;
-
- if (icode != CODE_FOR_nothing
- && insn_data[icode].operand[0].predicate (test, wider_mode))
- {
- x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
- y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
- emit_jump_insn (GEN_FCN (icode) (test, x, y, label));
- return;
- }
- }
-
- /* Handle some compares against zero. */
- icode = (int) optab_handler (tst_optab, wider_mode)->insn_code;
- if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing)
- {
- x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
- emit_insn (GEN_FCN (icode) (x));
- if (label)
- emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
- return;
- }
-
- /* Handle compares for which there is a directly suitable insn. */
-
- icode = (int) optab_handler (cmp_optab, wider_mode)->insn_code;
- if (icode != CODE_FOR_nothing)
- {
- x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
- y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
- emit_insn (GEN_FCN (icode) (x, y));
- if (label)
- emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
- return;
- }
-
- if (!CLASS_HAS_WIDER_MODES_P (class))
- break;
+ enum machine_mode optab_mode;
+ enum mode_class mclass;
+ enum insn_code icode;
- wider_mode = GET_MODE_WIDER_MODE (wider_mode);
- }
- while (wider_mode != VOIDmode);
+ mclass = GET_MODE_CLASS (mode);
+ optab_mode = (mclass == MODE_CC) ? CCmode : mode;
+ icode = optab_handler (cbranch_optab, optab_mode)->insn_code;
- gcc_unreachable ();
+ gcc_assert (icode != CODE_FOR_nothing);
+ gcc_assert (insn_data[icode].operand[0].predicate (test, VOIDmode));
+ emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label));
}
/* Generate code to compare X with Y so that the condition codes are
ensure that the comparison RTL has the canonical form.
UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
- need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
- the proper branch condition code.
+ need to be widened. UNSIGNEDP is also used to select the proper
+ branch condition code.
If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
MODE is the mode of the inputs (in case they are const_int).
- COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
- be passed unchanged to emit_cmp_insn, then potentially converted into an
- unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
+ COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
+ It will be potentially converted into an unsigned variant based on
+ UNSIGNEDP to select a proper jump instruction. */
void
emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
enum machine_mode mode, int unsignedp, rtx label)
{
rtx op0 = x, op1 = y;
+ rtx test;
/* Swap operands and condition to ensure canonical RTL. */
- if (swap_commutative_operands_p (x, y))
+ if (swap_commutative_operands_p (x, y)
+ && can_compare_p (swap_condition (comparison), mode, ccp_jump))
{
- /* If we're not emitting a branch, callers are required to pass
- operands in an order conforming to canonical RTL. We relax this
- for commutative comparisons so callers using EQ don't need to do
- swapping by hand. */
- gcc_assert (label || (comparison == swap_condition (comparison)));
-
op0 = y, op1 = x;
comparison = swap_condition (comparison);
}
-#ifdef HAVE_cc0
- /* If OP0 is still a constant, then both X and Y must be constants.
- Force X into a register to create canonical RTL. */
+ /* If OP0 is still a constant, then both X and Y must be constants
+ or the opposite comparison is not supported. Force X into a register
+ to create canonical RTL. */
if (CONSTANT_P (op0))
op0 = force_reg (mode, op0);
-#endif
if (unsignedp)
comparison = unsigned_condition (comparison);
- prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp,
- ccp_jump);
- emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label);
+ prepare_cmp_insn (op0, op1, comparison, size, unsignedp, OPTAB_LIB_WIDEN,
+ &test, &mode);
+ emit_cmp_and_jump_insn_1 (test, mode, label);
}
-/* Like emit_cmp_and_jump_insns, but generate only the comparison. */
-
-void
-emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
- enum machine_mode mode, int unsignedp)
-{
- emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0);
-}
\f
/* Emit a library call comparison between floating point X and Y.
COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
static void
-prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
- enum machine_mode *pmode, int *punsignedp)
+prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
+ rtx *ptest, enum machine_mode *pmode)
{
- enum rtx_code comparison = *pcomparison;
enum rtx_code swapped = swap_condition (comparison);
enum rtx_code reversed = reverse_condition_maybe_unordered (comparison);
- rtx x = *px;
- rtx y = *py;
enum machine_mode orig_mode = GET_MODE (x);
enum machine_mode mode, cmp_mode;
rtx value, target, insns, equiv;
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- if ((libfunc = optab_libfunc (code_to_optab[comparison], mode)))
+ if (code_to_optab[comparison]
+ && (libfunc = optab_libfunc (code_to_optab[comparison], mode)))
break;
- if ((libfunc = optab_libfunc (code_to_optab[swapped] , mode)))
+ if (code_to_optab[swapped]
+ && (libfunc = optab_libfunc (code_to_optab[swapped], mode)))
{
rtx tmp;
tmp = x; x = y; y = tmp;
break;
}
- if ((libfunc = optab_libfunc (code_to_optab[reversed], mode))
+ if (code_to_optab[reversed]
+ && (libfunc = optab_libfunc (code_to_optab[reversed], mode))
&& FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, reversed))
{
comparison = reversed;
|| FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison))
comparison = reversed_p ? EQ : NE;
- *px = target;
- *py = const0_rtx;
+ *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, target, const0_rtx);
*pmode = cmp_mode;
- *pcomparison = comparison;
- *punsignedp = 0;
}
\f
/* Generate code to indirectly jump to a location given in the rtx LOC. */
(op3, insn_data[icode].operand[3].mode))
op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
- /* Everything should now be in the suitable form, so emit the compare insn
- and then the conditional move. */
+ /* Everything should now be in the suitable form. */
- comparison
- = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
+ code = unsignedp ? unsigned_condition (code) : code;
+ comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
- /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
/* We can get const0_rtx or const_true_rtx in some circumstances. Just
return NULL and let the caller figure out how best to deal with this
situation. */
- if (GET_CODE (comparison) != code)
+ if (!COMPARISON_P (comparison))
return NULL_RTX;
- insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
+ do_pending_stack_adjust ();
+ start_sequence ();
+ prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
+ GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
+ &comparison, &cmode);
+ if (!comparison)
+ insn = NULL_RTX;
+ else
+ insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
/* If that failed, then give up. */
if (insn == 0)
- return 0;
+ {
+ end_sequence ();
+ return 0;
+ }
emit_insn (insn);
-
+ insn = get_insns ();
+ end_sequence ();
+ emit_insn (insn);
if (subtarget != target)
convert_move (target, subtarget, 0);
(op3, insn_data[icode].operand[3].mode))
op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
- /* Everything should now be in the suitable form, so emit the compare insn
- and then the conditional move. */
+ /* Everything should now be in the suitable form. */
- comparison
- = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX);
+ code = unsignedp ? unsigned_condition (code) : code;
+ comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1);
- /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
/* We can get const0_rtx or const_true_rtx in some circumstances. Just
return NULL and let the caller figure out how best to deal with this
situation. */
- if (GET_CODE (comparison) != code)
+ if (!COMPARISON_P (comparison))
return NULL_RTX;
- insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
+ do_pending_stack_adjust ();
+ start_sequence ();
+ prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1),
+ GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN,
+ &comparison, &cmode);
+ if (!comparison)
+ insn = NULL_RTX;
+ else
+ insn = GEN_FCN (icode) (subtarget, comparison, op2, op3);
/* If that failed, then give up. */
if (insn == 0)
- return 0;
+ {
+ end_sequence ();
+ return 0;
+ }
emit_insn (insn);
-
+ insn = get_insns ();
+ end_sequence ();
+ emit_insn (insn);
if (subtarget != target)
convert_move (target, subtarget, 0);
if (icode != CODE_FOR_nothing)
{
+ rtx last = get_last_insn ();
if (fmode != GET_MODE (from))
from = convert_to_mode (fmode, from, 0);
if (imode != GET_MODE (to))
target = gen_reg_rtx (imode);
- emit_unop_insn (icode, target, from,
- doing_unsigned ? UNSIGNED_FIX : FIX);
- if (target != to)
- convert_move (to, target, unsignedp);
- return;
+ if (maybe_emit_unop_insn (icode, target, from,
+ doing_unsigned ? UNSIGNED_FIX : FIX))
+ {
+ if (target != to)
+ convert_move (to, target, unsignedp);
+ return;
+ }
+ delete_insns_since (last);
}
}
icode = convert_optab_handler (tab, imode, fmode)->insn_code;
if (icode != CODE_FOR_nothing)
{
+ rtx last = get_last_insn ();
if (fmode != GET_MODE (from))
from = convert_to_mode (fmode, from, 0);
if (imode != GET_MODE (to))
target = gen_reg_rtx (imode);
- emit_unop_insn (icode, target, from, UNKNOWN);
+ if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
+ {
+ delete_insns_since (last);
+ continue;
+ }
if (target != to)
convert_move (to, target, 0);
return true;
unsigned opname_len = strlen (opname);
const char *mname = GET_MODE_NAME (mode);
unsigned mname_len = strlen (mname);
- char *libfunc_name = alloca (2 + opname_len + mname_len + 1 + 1);
+ char *libfunc_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
char *p;
const char *q;
gen_libfunc (optable, opname, suffix, mode);
if (DECIMAL_FLOAT_MODE_P (mode))
{
- dec_opname = alloca (sizeof (DECIMAL_PREFIX) + strlen (opname));
+ dec_opname = XALLOCAVEC (char, sizeof (DECIMAL_PREFIX) + strlen (opname));
/* For BID support, change the name to have either a bid_ or dpd_ prefix
depending on the low level floating format used. */
memcpy (dec_opname, DECIMAL_PREFIX, sizeof (DECIMAL_PREFIX) - 1);
if (GET_MODE_CLASS (mode) == MODE_INT)
{
int len = strlen (name);
- char *v_name = alloca (len + 2);
+ char *v_name = XALLOCAVEC (char, len + 2);
strcpy (v_name, name);
v_name[len] = 'v';
v_name[len + 1] = 0;
mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
- nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
+ nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
nondec_name[0] = '_';
nondec_name[1] = '_';
memcpy (&nondec_name[2], opname, opname_len);
nondec_suffix = nondec_name + opname_len + 2;
- dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
+ dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
dec_name[0] = '_';
dec_name[1] = '_';
memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
}
-/* Initialize the libfunc fiels of an of an intra-mode-class conversion optab.
+/* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
The string formation rules are
similar to the ones for init_libfunc, above. */
mname_len = strlen (GET_MODE_NAME (tmode)) + strlen (GET_MODE_NAME (fmode));
- nondec_name = alloca (2 + opname_len + mname_len + 1 + 1);
+ nondec_name = XALLOCAVEC (char, 2 + opname_len + mname_len + 1 + 1);
nondec_name[0] = '_';
nondec_name[1] = '_';
memcpy (&nondec_name[2], opname, opname_len);
nondec_suffix = nondec_name + opname_len + 2;
- dec_name = alloca (2 + dec_len + opname_len + mname_len + 1 + 1);
+ dec_name = XALLOCAVEC (char, 2 + dec_len + opname_len + mname_len + 1 + 1);
dec_name[0] = '_';
dec_name[1] = '_';
memcpy (&dec_name[2], DECIMAL_PREFIX, dec_len);
gen_interclass_conv_libfunc (tab, opname, tmode, fmode);
}
-rtx
-init_one_libfunc (const char *name)
+/* A table of previously-created libfuncs, hashed by name. */
+static GTY ((param_is (union tree_node))) htab_t libfunc_decls;
+
+/* Hashtable callbacks for libfunc_decls. */
+
+static hashval_t
+libfunc_decl_hash (const void *entry)
+{
+ return htab_hash_string (IDENTIFIER_POINTER (DECL_NAME ((const_tree) entry)));
+}
+
+static int
+libfunc_decl_eq (const void *entry1, const void *entry2)
{
- rtx symbol;
+ return DECL_NAME ((const_tree) entry1) == (const_tree) entry2;
+}
- /* Create a FUNCTION_DECL that can be passed to
- targetm.encode_section_info. */
+/* Build a decl for a libfunc named NAME. */
+
+tree
+build_libfunc_function (const char *name)
+{
+ tree decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
+ get_identifier (name),
+ build_function_type (integer_type_node, NULL_TREE));
/* ??? We don't have any type information except for this is
a function. Pretend this is "int foo()". */
- tree decl = build_decl (FUNCTION_DECL, get_identifier (name),
- build_function_type (integer_type_node, NULL_TREE));
DECL_ARTIFICIAL (decl) = 1;
DECL_EXTERNAL (decl) = 1;
TREE_PUBLIC (decl) = 1;
-
- symbol = XEXP (DECL_RTL (decl), 0);
+ gcc_assert (DECL_ASSEMBLER_NAME (decl));
/* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
are the flags assigned by targetm.encode_section_info. */
- SET_SYMBOL_REF_DECL (symbol, 0);
+ SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
+
+ return decl;
+}
- return symbol;
+rtx
+init_one_libfunc (const char *name)
+{
+ tree id, decl;
+ void **slot;
+ hashval_t hash;
+
+ if (libfunc_decls == NULL)
+ libfunc_decls = htab_create_ggc (37, libfunc_decl_hash,
+ libfunc_decl_eq, NULL);
+
+ /* See if we have already created a libfunc decl for this function. */
+ id = get_identifier (name);
+ hash = htab_hash_string (name);
+ slot = htab_find_slot_with_hash (libfunc_decls, id, hash, INSERT);
+ decl = (tree) *slot;
+ if (decl == NULL)
+ {
+ /* Create a new decl, so that it can be passed to
+ targetm.encode_section_info. */
+ decl = build_libfunc_function (name);
+ *slot = decl;
+ }
+ return XEXP (DECL_RTL (decl), 0);
+}
+
+/* Adjust the assembler name of libfunc NAME to ASMSPEC. */
+
+rtx
+set_user_assembler_libfunc (const char *name, const char *asmspec)
+{
+ tree id, decl;
+ void **slot;
+ hashval_t hash;
+
+ id = get_identifier (name);
+ hash = htab_hash_string (name);
+ slot = htab_find_slot_with_hash (libfunc_decls, id, hash, NO_INSERT);
+ gcc_assert (slot);
+ decl = (tree) *slot;
+ set_user_assembler_name (decl, asmspec);
+ return XEXP (DECL_RTL (decl), 0);
}
/* Call this to reset the function entry for one optab (OPTABLE) in mode
val = 0;
slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
if (*slot == NULL)
- *slot = ggc_alloc (sizeof (struct libfunc_entry));
+ *slot = GGC_NEW (struct libfunc_entry);
(*slot)->optab = (size_t) (optable - &optab_table[0]);
(*slot)->mode1 = mode;
(*slot)->mode2 = VOIDmode;
val = 0;
slot = (struct libfunc_entry **) htab_find_slot (libfunc_hash, &e, INSERT);
if (*slot == NULL)
- *slot = ggc_alloc (sizeof (struct libfunc_entry));
+ *slot = GGC_NEW (struct libfunc_entry);
(*slot)->optab = (size_t) (optable - &convert_optab_table[0]);
(*slot)->mode1 = tmode;
(*slot)->mode2 = fmode;
libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL);
/* Start by initializing all tables to contain CODE_FOR_nothing. */
- for (i = 0; i < NUM_RTX_CODE; i++)
- setcc_gen_code[i] = CODE_FOR_nothing;
-
#ifdef HAVE_conditional_move
for (i = 0; i < NUM_MACHINE_MODES; i++)
movcc_gen_code[i] = CODE_FOR_nothing;
vcondu_gen_code[i] = CODE_FOR_nothing;
}
-#if GCC_VERSION >= 4000
+#if GCC_VERSION >= 4000 && HAVE_DESIGNATED_INITIALIZERS
/* We statically initialize the insn_codes with CODE_FOR_nothing. */
if (reinit)
init_insn_codes ();
have_insn_for. */
init_optab (mov_optab, SET);
init_optab (movstrict_optab, STRICT_LOW_PART);
- init_optab (cmp_optab, COMPARE);
+ init_optab (cbranch_optab, COMPARE);
+
+ init_optab (cmov_optab, UNKNOWN);
+ init_optab (cstore_optab, UNKNOWN);
+ init_optab (ctrap_optab, UNKNOWN);
init_optab (storent_optab, UNKNOWN);
+ init_optab (cmp_optab, UNKNOWN);
init_optab (ucmp_optab, UNKNOWN);
- init_optab (tst_optab, UNKNOWN);
init_optab (eq_optab, EQ);
init_optab (ne_optab, NE);
init_optab (expm1_optab, UNKNOWN);
init_optab (ldexp_optab, UNKNOWN);
init_optab (scalb_optab, UNKNOWN);
+ init_optab (significand_optab, UNKNOWN);
init_optab (logb_optab, UNKNOWN);
init_optab (ilogb_optab, UNKNOWN);
init_optab (log_optab, UNKNOWN);
init_optab (isinf_optab, UNKNOWN);
init_optab (strlen_optab, UNKNOWN);
- init_optab (cbranch_optab, UNKNOWN);
- init_optab (cmov_optab, UNKNOWN);
- init_optab (cstore_optab, UNKNOWN);
init_optab (push_optab, UNKNOWN);
init_optab (reduc_smax_optab, UNKNOWN);
sync_new_xor_optab[i] = CODE_FOR_nothing;
sync_new_nand_optab[i] = CODE_FOR_nothing;
sync_compare_and_swap[i] = CODE_FOR_nothing;
- sync_compare_and_swap_cc[i] = CODE_FOR_nothing;
sync_lock_test_and_set[i] = CODE_FOR_nothing;
sync_lock_release[i] = CODE_FOR_nothing;
gcov_flush_libfunc = init_one_libfunc ("__gcov_flush");
- if (HAVE_conditional_trap)
- trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX);
-
/* Allow the target to add more libcalls or rename some, etc. */
targetm.init_libfuncs ();
rtx l;
o = &optab_table[i];
- l = optab_libfunc (o, j);
+ l = optab_libfunc (o, (enum machine_mode) j);
if (l)
{
gcc_assert (GET_CODE (l) == SYMBOL_REF);
rtx l;
o = &convert_optab_table[i];
- l = convert_optab_libfunc (o, j, k);
+ l = convert_optab_libfunc (o, (enum machine_mode) j,
+ (enum machine_mode) k);
if (l)
{
gcc_assert (GET_CODE (l) == SYMBOL_REF);
CODE. Return 0 on failure. */
rtx
-gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
- rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED)
+gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
{
enum machine_mode mode = GET_MODE (op1);
enum insn_code icode;
rtx insn;
-
- if (!HAVE_conditional_trap)
- return 0;
+ rtx trap_rtx;
if (mode == VOIDmode)
return 0;
- icode = optab_handler (cmp_optab, mode)->insn_code;
+ icode = optab_handler (ctrap_optab, mode)->insn_code;
if (icode == CODE_FOR_nothing)
return 0;
+ /* Some targets only accept a zero trap code. */
+ if (insn_data[icode].operand[3].predicate
+ && !insn_data[icode].operand[3].predicate (tcode, VOIDmode))
+ return 0;
+
+ do_pending_stack_adjust ();
start_sequence ();
- op1 = prepare_operand (icode, op1, 0, mode, mode, 0);
- op2 = prepare_operand (icode, op2, 1, mode, mode, 0);
- if (!op1 || !op2)
+ prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT,
+ &trap_rtx, &mode);
+ if (!trap_rtx)
+ insn = NULL_RTX;
+ else
+ insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
+ tcode);
+
+ /* If that failed, then give up. */
+ if (insn == 0)
{
end_sequence ();
return 0;
}
- emit_insn (GEN_FCN (icode) (op1, op2));
- PUT_CODE (trap_rtx, code);
- gcc_assert (HAVE_conditional_trap);
- insn = gen_conditional_trap (trap_rtx, tcode);
- if (insn)
- {
- emit_insn (insn);
- insn = get_insns ();
- }
+ emit_insn (insn);
+ insn = get_insns ();
end_sequence ();
-
return insn;
}
return gen_rtx_fmt_ee (rcode, VOIDmode, rtx_op0, rtx_op1);
}
-/* Return insn code for VEC_COND_EXPR EXPR. */
+/* Return insn code for TYPE, the type of a VEC_COND_EXPR. */
static inline enum insn_code
-get_vcond_icode (tree expr, enum machine_mode mode)
+get_vcond_icode (tree type, enum machine_mode mode)
{
enum insn_code icode = CODE_FOR_nothing;
- if (TYPE_UNSIGNED (TREE_TYPE (expr)))
+ if (TYPE_UNSIGNED (type))
icode = vcondu_gen_code[mode];
else
icode = vcond_gen_code[mode];
}
/* Return TRUE iff, appropriate vector insns are available
- for vector cond expr expr in VMODE mode. */
+ for vector cond expr with type TYPE in VMODE mode. */
bool
-expand_vec_cond_expr_p (tree expr, enum machine_mode vmode)
+expand_vec_cond_expr_p (tree type, enum machine_mode vmode)
{
- if (get_vcond_icode (expr, vmode) == CODE_FOR_nothing)
+ if (get_vcond_icode (type, vmode) == CODE_FOR_nothing)
return false;
return true;
}
-/* Generate insns for VEC_COND_EXPR. */
+/* Generate insns for a VEC_COND_EXPR, given its TYPE and its
+ three operands. */
rtx
-expand_vec_cond_expr (tree vec_cond_expr, rtx target)
+expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
+ rtx target)
{
enum insn_code icode;
rtx comparison, rtx_op1, rtx_op2, cc_op0, cc_op1;
- enum machine_mode mode = TYPE_MODE (TREE_TYPE (vec_cond_expr));
- bool unsignedp = TYPE_UNSIGNED (TREE_TYPE (vec_cond_expr));
+ enum machine_mode mode = TYPE_MODE (vec_cond_type);
+ bool unsignedp = TYPE_UNSIGNED (vec_cond_type);
- icode = get_vcond_icode (vec_cond_expr, mode);
+ icode = get_vcond_icode (vec_cond_type, mode);
if (icode == CODE_FOR_nothing)
return 0;
target = gen_reg_rtx (mode);
/* Get comparison rtx. First expand both cond expr operands. */
- comparison = vector_compare_rtx (TREE_OPERAND (vec_cond_expr, 0),
+ comparison = vector_compare_rtx (op0,
unsignedp, icode);
cc_op0 = XEXP (comparison, 0);
cc_op1 = XEXP (comparison, 1);
/* Expand both operands and force them in reg, if required. */
- rtx_op1 = expand_normal (TREE_OPERAND (vec_cond_expr, 1));
+ rtx_op1 = expand_normal (op1);
if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
&& mode != VOIDmode)
rtx_op1 = force_reg (mode, rtx_op1);
- rtx_op2 = expand_normal (TREE_OPERAND (vec_cond_expr, 2));
+ rtx_op2 = expand_normal (op2);
if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
&& mode != VOIDmode)
rtx_op2 = force_reg (mode, rtx_op2);
return expand_val_compare_and_swap_1 (mem, old_val, new_val, target, icode);
}
+/* Helper function to find the MODE_CC set in a sync_compare_and_swap
+ pattern. */
+
+static void
+find_cc_set (rtx x, const_rtx pat, void *data)
+{
+ if (REG_P (x) && GET_MODE_CLASS (GET_MODE (x)) == MODE_CC
+ && GET_CODE (pat) == SET)
+ {
+ rtx *p_cc_reg = (rtx *) data;
+ gcc_assert (!*p_cc_reg);
+ *p_cc_reg = x;
+ }
+}
+
/* Expand a compare-and-swap operation and store true into the result if
the operation was successful and false otherwise. Return the result.
Unlike other routines, TARGET is not optional. */
{
enum machine_mode mode = GET_MODE (mem);
enum insn_code icode;
- rtx subtarget, label0, label1;
+ rtx subtarget, seq, cc_reg;
/* If the target supports a compare-and-swap pattern that simultaneously
sets some flag for success, then use it. Otherwise use the regular
compare-and-swap and follow that immediately with a compare insn. */
- icode = sync_compare_and_swap_cc[mode];
- switch (icode)
- {
- default:
- subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
- NULL_RTX, icode);
- if (subtarget != NULL_RTX)
- break;
-
- /* FALLTHRU */
- case CODE_FOR_nothing:
- icode = sync_compare_and_swap[mode];
- if (icode == CODE_FOR_nothing)
- return NULL_RTX;
-
- /* Ensure that if old_val == mem, that we're not comparing
- against an old value. */
- if (MEM_P (old_val))
- old_val = force_reg (mode, old_val);
+ icode = sync_compare_and_swap[mode];
+ if (icode == CODE_FOR_nothing)
+ return NULL_RTX;
+ do
+ {
+ start_sequence ();
subtarget = expand_val_compare_and_swap_1 (mem, old_val, new_val,
- NULL_RTX, icode);
+ NULL_RTX, icode);
+ cc_reg = NULL_RTX;
if (subtarget == NULL_RTX)
- return NULL_RTX;
-
- emit_cmp_insn (subtarget, old_val, EQ, const0_rtx, mode, true);
- }
-
- /* If the target has a sane STORE_FLAG_VALUE, then go ahead and use a
- setcc instruction from the beginning. We don't work too hard here,
- but it's nice to not be stupid about initial code gen either. */
- if (STORE_FLAG_VALUE == 1)
- {
- icode = setcc_gen_code[EQ];
- if (icode != CODE_FOR_nothing)
{
- enum machine_mode cmode = insn_data[icode].operand[0].mode;
- rtx insn;
-
- subtarget = target;
- if (!insn_data[icode].operand[0].predicate (target, cmode))
- subtarget = gen_reg_rtx (cmode);
-
- insn = GEN_FCN (icode) (subtarget);
- if (insn)
- {
- emit_insn (insn);
- if (GET_MODE (target) != GET_MODE (subtarget))
- {
- convert_move (target, subtarget, 1);
- subtarget = target;
- }
- return subtarget;
- }
+ end_sequence ();
+ return NULL_RTX;
}
- }
-
- /* Without an appropriate setcc instruction, use a set of branches to
- get 1 and 0 stored into target. Presumably if the target has a
- STORE_FLAG_VALUE that isn't 1, then this will get cleaned up by ifcvt. */
- label0 = gen_label_rtx ();
- label1 = gen_label_rtx ();
+ if (have_insn_for (COMPARE, CCmode))
+ note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
+ seq = get_insns ();
+ end_sequence ();
- emit_jump_insn (bcc_gen_fctn[EQ] (label0));
- emit_move_insn (target, const0_rtx);
- emit_jump_insn (gen_jump (label1));
- emit_barrier ();
- emit_label (label0);
- emit_move_insn (target, const1_rtx);
- emit_label (label1);
+ /* We might be comparing against an old value. Try again. :-( */
+ if (!cc_reg && MEM_P (old_val))
+ {
+ seq = NULL_RTX;
+ old_val = force_reg (mode, old_val);
+ }
+ }
+ while (!seq);
- return target;
+ emit_insn (seq);
+ if (cc_reg)
+ return emit_store_flag_force (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1);
+ else
+ return emit_store_flag_force (target, EQ, subtarget, old_val, VOIDmode, 1, 1);
}
/* This is a helper function for the other atomic operations. This function
{
enum machine_mode mode = GET_MODE (mem);
enum insn_code icode;
- rtx label, cmp_reg, subtarget;
+ rtx label, cmp_reg, subtarget, cc_reg;
/* The loop we want to generate looks like
/* If the target supports a compare-and-swap pattern that simultaneously
sets some flag for success, then use it. Otherwise use the regular
compare-and-swap and follow that immediately with a compare insn. */
- icode = sync_compare_and_swap_cc[mode];
- switch (icode)
- {
- default:
- subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
- cmp_reg, icode);
- if (subtarget != NULL_RTX)
- {
- gcc_assert (subtarget == cmp_reg);
- break;
- }
+ icode = sync_compare_and_swap[mode];
+ if (icode == CODE_FOR_nothing)
+ return false;
- /* FALLTHRU */
- case CODE_FOR_nothing:
- icode = sync_compare_and_swap[mode];
- if (icode == CODE_FOR_nothing)
- return false;
+ subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
+ cmp_reg, icode);
+ if (subtarget == NULL_RTX)
+ return false;
- subtarget = expand_val_compare_and_swap_1 (mem, old_reg, new_reg,
- cmp_reg, icode);
- if (subtarget == NULL_RTX)
- return false;
+ cc_reg = NULL_RTX;
+ if (have_insn_for (COMPARE, CCmode))
+ note_stores (PATTERN (get_last_insn ()), find_cc_set, &cc_reg);
+ if (cc_reg)
+ {
+ cmp_reg = cc_reg;
+ old_reg = const0_rtx;
+ }
+ else
+ {
if (subtarget != cmp_reg)
emit_move_insn (cmp_reg, subtarget);
-
- emit_cmp_insn (cmp_reg, old_reg, EQ, const0_rtx, mode, true);
}
/* ??? Mark this jump predicted not taken? */
- emit_jump_insn (bcc_gen_fctn[NE] (label));
-
+ emit_cmp_and_jump_insns (cmp_reg, old_reg, NE, const0_rtx, GET_MODE (cmp_reg), 1,
+ label);
return true;
}
t1 = t0;
if (code == NOT)
{
- t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
- code = AND;
+ t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
+ true, OPTAB_LIB_WIDEN);
+ t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
}
- t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
- true, OPTAB_LIB_WIDEN);
-
+ else
+ t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
+ true, OPTAB_LIB_WIDEN);
insn = get_insns ();
end_sequence ();
}
if (code == NOT)
- target = expand_simple_unop (mode, NOT, target, NULL_RTX, true);
- target = expand_simple_binop (mode, code, target, val, NULL_RTX,
- true, OPTAB_LIB_WIDEN);
+ {
+ target = expand_simple_binop (mode, AND, target, val,
+ NULL_RTX, true,
+ OPTAB_LIB_WIDEN);
+ target = expand_simple_unop (mode, code, target,
+ NULL_RTX, true);
+ }
+ else
+ target = expand_simple_binop (mode, code, target, val,
+ NULL_RTX, true,
+ OPTAB_LIB_WIDEN);
}
return target;
t1 = t0;
if (code == NOT)
{
- t1 = expand_simple_unop (mode, NOT, t1, NULL_RTX, true);
- code = AND;
+ t1 = expand_simple_binop (mode, AND, t1, val, NULL_RTX,
+ true, OPTAB_LIB_WIDEN);
+ t1 = expand_simple_unop (mode, code, t1, NULL_RTX, true);
}
- t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
- true, OPTAB_LIB_WIDEN);
+ else
+ t1 = expand_simple_binop (mode, code, t1, val, NULL_RTX,
+ true, OPTAB_LIB_WIDEN);
if (after)
emit_move_insn (target, t1);
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